1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2021, Konrad Dybcio <konrad.dybcio@somainline.org> 4 * 5 * based on pinctrl-msm8916.c 6 */ 7 8 #include <linux/module.h> 9 #include <linux/of.h> 10 #include <linux/platform_device.h> 11 12 #include "pinctrl-msm.h" 13 14 static const struct pinctrl_pin_desc mdm9607_pins[] = { 15 PINCTRL_PIN(0, "GPIO_0"), 16 PINCTRL_PIN(1, "GPIO_1"), 17 PINCTRL_PIN(2, "GPIO_2"), 18 PINCTRL_PIN(3, "GPIO_3"), 19 PINCTRL_PIN(4, "GPIO_4"), 20 PINCTRL_PIN(5, "GPIO_5"), 21 PINCTRL_PIN(6, "GPIO_6"), 22 PINCTRL_PIN(7, "GPIO_7"), 23 PINCTRL_PIN(8, "GPIO_8"), 24 PINCTRL_PIN(9, "GPIO_9"), 25 PINCTRL_PIN(10, "GPIO_10"), 26 PINCTRL_PIN(11, "GPIO_11"), 27 PINCTRL_PIN(12, "GPIO_12"), 28 PINCTRL_PIN(13, "GPIO_13"), 29 PINCTRL_PIN(14, "GPIO_14"), 30 PINCTRL_PIN(15, "GPIO_15"), 31 PINCTRL_PIN(16, "GPIO_16"), 32 PINCTRL_PIN(17, "GPIO_17"), 33 PINCTRL_PIN(18, "GPIO_18"), 34 PINCTRL_PIN(19, "GPIO_19"), 35 PINCTRL_PIN(20, "GPIO_20"), 36 PINCTRL_PIN(21, "GPIO_21"), 37 PINCTRL_PIN(22, "GPIO_22"), 38 PINCTRL_PIN(23, "GPIO_23"), 39 PINCTRL_PIN(24, "GPIO_24"), 40 PINCTRL_PIN(25, "GPIO_25"), 41 PINCTRL_PIN(26, "GPIO_26"), 42 PINCTRL_PIN(27, "GPIO_27"), 43 PINCTRL_PIN(28, "GPIO_28"), 44 PINCTRL_PIN(29, "GPIO_29"), 45 PINCTRL_PIN(30, "GPIO_30"), 46 PINCTRL_PIN(31, "GPIO_31"), 47 PINCTRL_PIN(32, "GPIO_32"), 48 PINCTRL_PIN(33, "GPIO_33"), 49 PINCTRL_PIN(34, "GPIO_34"), 50 PINCTRL_PIN(35, "GPIO_35"), 51 PINCTRL_PIN(36, "GPIO_36"), 52 PINCTRL_PIN(37, "GPIO_37"), 53 PINCTRL_PIN(38, "GPIO_38"), 54 PINCTRL_PIN(39, "GPIO_39"), 55 PINCTRL_PIN(40, "GPIO_40"), 56 PINCTRL_PIN(41, "GPIO_41"), 57 PINCTRL_PIN(42, "GPIO_42"), 58 PINCTRL_PIN(43, "GPIO_43"), 59 PINCTRL_PIN(44, "GPIO_44"), 60 PINCTRL_PIN(45, "GPIO_45"), 61 PINCTRL_PIN(46, "GPIO_46"), 62 PINCTRL_PIN(47, "GPIO_47"), 63 PINCTRL_PIN(48, "GPIO_48"), 64 PINCTRL_PIN(49, "GPIO_49"), 65 PINCTRL_PIN(50, "GPIO_50"), 66 PINCTRL_PIN(51, "GPIO_51"), 67 PINCTRL_PIN(52, "GPIO_52"), 68 PINCTRL_PIN(53, "GPIO_53"), 69 PINCTRL_PIN(54, "GPIO_54"), 70 PINCTRL_PIN(55, "GPIO_55"), 71 PINCTRL_PIN(56, "GPIO_56"), 72 PINCTRL_PIN(57, "GPIO_57"), 73 PINCTRL_PIN(58, "GPIO_58"), 74 PINCTRL_PIN(59, "GPIO_59"), 75 PINCTRL_PIN(60, "GPIO_60"), 76 PINCTRL_PIN(61, "GPIO_61"), 77 PINCTRL_PIN(62, "GPIO_62"), 78 PINCTRL_PIN(63, "GPIO_63"), 79 PINCTRL_PIN(64, "GPIO_64"), 80 PINCTRL_PIN(65, "GPIO_65"), 81 PINCTRL_PIN(66, "GPIO_66"), 82 PINCTRL_PIN(67, "GPIO_67"), 83 PINCTRL_PIN(68, "GPIO_68"), 84 PINCTRL_PIN(69, "GPIO_69"), 85 PINCTRL_PIN(70, "GPIO_70"), 86 PINCTRL_PIN(71, "GPIO_71"), 87 PINCTRL_PIN(72, "GPIO_72"), 88 PINCTRL_PIN(73, "GPIO_73"), 89 PINCTRL_PIN(74, "GPIO_74"), 90 PINCTRL_PIN(75, "GPIO_75"), 91 PINCTRL_PIN(76, "GPIO_76"), 92 PINCTRL_PIN(77, "GPIO_77"), 93 PINCTRL_PIN(78, "GPIO_78"), 94 PINCTRL_PIN(79, "GPIO_79"), 95 PINCTRL_PIN(80, "SDC1_CLK"), 96 PINCTRL_PIN(81, "SDC1_CMD"), 97 PINCTRL_PIN(82, "SDC1_DATA"), 98 PINCTRL_PIN(83, "SDC2_CLK"), 99 PINCTRL_PIN(84, "SDC2_CMD"), 100 PINCTRL_PIN(85, "SDC2_DATA"), 101 PINCTRL_PIN(86, "QDSD_CLK"), 102 PINCTRL_PIN(87, "QDSD_CMD"), 103 PINCTRL_PIN(88, "QDSD_DATA0"), 104 PINCTRL_PIN(89, "QDSD_DATA1"), 105 PINCTRL_PIN(90, "QDSD_DATA2"), 106 PINCTRL_PIN(91, "QDSD_DATA3"), 107 }; 108 109 #define DECLARE_MSM_GPIO_PINS(pin) \ 110 static const unsigned int gpio##pin##_pins[] = { pin } 111 112 DECLARE_MSM_GPIO_PINS(0); 113 DECLARE_MSM_GPIO_PINS(1); 114 DECLARE_MSM_GPIO_PINS(2); 115 DECLARE_MSM_GPIO_PINS(3); 116 DECLARE_MSM_GPIO_PINS(4); 117 DECLARE_MSM_GPIO_PINS(5); 118 DECLARE_MSM_GPIO_PINS(6); 119 DECLARE_MSM_GPIO_PINS(7); 120 DECLARE_MSM_GPIO_PINS(8); 121 DECLARE_MSM_GPIO_PINS(9); 122 DECLARE_MSM_GPIO_PINS(10); 123 DECLARE_MSM_GPIO_PINS(11); 124 DECLARE_MSM_GPIO_PINS(12); 125 DECLARE_MSM_GPIO_PINS(13); 126 DECLARE_MSM_GPIO_PINS(14); 127 DECLARE_MSM_GPIO_PINS(15); 128 DECLARE_MSM_GPIO_PINS(16); 129 DECLARE_MSM_GPIO_PINS(17); 130 DECLARE_MSM_GPIO_PINS(18); 131 DECLARE_MSM_GPIO_PINS(19); 132 DECLARE_MSM_GPIO_PINS(20); 133 DECLARE_MSM_GPIO_PINS(21); 134 DECLARE_MSM_GPIO_PINS(22); 135 DECLARE_MSM_GPIO_PINS(23); 136 DECLARE_MSM_GPIO_PINS(24); 137 DECLARE_MSM_GPIO_PINS(25); 138 DECLARE_MSM_GPIO_PINS(26); 139 DECLARE_MSM_GPIO_PINS(27); 140 DECLARE_MSM_GPIO_PINS(28); 141 DECLARE_MSM_GPIO_PINS(29); 142 DECLARE_MSM_GPIO_PINS(30); 143 DECLARE_MSM_GPIO_PINS(31); 144 DECLARE_MSM_GPIO_PINS(32); 145 DECLARE_MSM_GPIO_PINS(33); 146 DECLARE_MSM_GPIO_PINS(34); 147 DECLARE_MSM_GPIO_PINS(35); 148 DECLARE_MSM_GPIO_PINS(36); 149 DECLARE_MSM_GPIO_PINS(37); 150 DECLARE_MSM_GPIO_PINS(38); 151 DECLARE_MSM_GPIO_PINS(39); 152 DECLARE_MSM_GPIO_PINS(40); 153 DECLARE_MSM_GPIO_PINS(41); 154 DECLARE_MSM_GPIO_PINS(42); 155 DECLARE_MSM_GPIO_PINS(43); 156 DECLARE_MSM_GPIO_PINS(44); 157 DECLARE_MSM_GPIO_PINS(45); 158 DECLARE_MSM_GPIO_PINS(46); 159 DECLARE_MSM_GPIO_PINS(47); 160 DECLARE_MSM_GPIO_PINS(48); 161 DECLARE_MSM_GPIO_PINS(49); 162 DECLARE_MSM_GPIO_PINS(50); 163 DECLARE_MSM_GPIO_PINS(51); 164 DECLARE_MSM_GPIO_PINS(52); 165 DECLARE_MSM_GPIO_PINS(53); 166 DECLARE_MSM_GPIO_PINS(54); 167 DECLARE_MSM_GPIO_PINS(55); 168 DECLARE_MSM_GPIO_PINS(56); 169 DECLARE_MSM_GPIO_PINS(57); 170 DECLARE_MSM_GPIO_PINS(58); 171 DECLARE_MSM_GPIO_PINS(59); 172 DECLARE_MSM_GPIO_PINS(60); 173 DECLARE_MSM_GPIO_PINS(61); 174 DECLARE_MSM_GPIO_PINS(62); 175 DECLARE_MSM_GPIO_PINS(63); 176 DECLARE_MSM_GPIO_PINS(64); 177 DECLARE_MSM_GPIO_PINS(65); 178 DECLARE_MSM_GPIO_PINS(66); 179 DECLARE_MSM_GPIO_PINS(67); 180 DECLARE_MSM_GPIO_PINS(68); 181 DECLARE_MSM_GPIO_PINS(69); 182 DECLARE_MSM_GPIO_PINS(70); 183 DECLARE_MSM_GPIO_PINS(71); 184 DECLARE_MSM_GPIO_PINS(72); 185 DECLARE_MSM_GPIO_PINS(73); 186 DECLARE_MSM_GPIO_PINS(74); 187 DECLARE_MSM_GPIO_PINS(75); 188 DECLARE_MSM_GPIO_PINS(76); 189 DECLARE_MSM_GPIO_PINS(77); 190 DECLARE_MSM_GPIO_PINS(78); 191 DECLARE_MSM_GPIO_PINS(79); 192 193 static const unsigned int sdc1_clk_pins[] = { 80 }; 194 static const unsigned int sdc1_cmd_pins[] = { 81 }; 195 static const unsigned int sdc1_data_pins[] = { 82 }; 196 static const unsigned int sdc2_clk_pins[] = { 83 }; 197 static const unsigned int sdc2_cmd_pins[] = { 84 }; 198 static const unsigned int sdc2_data_pins[] = { 85 }; 199 static const unsigned int qdsd_clk_pins[] = { 86 }; 200 static const unsigned int qdsd_cmd_pins[] = { 87 }; 201 static const unsigned int qdsd_data0_pins[] = { 88 }; 202 static const unsigned int qdsd_data1_pins[] = { 89 }; 203 static const unsigned int qdsd_data2_pins[] = { 90 }; 204 static const unsigned int qdsd_data3_pins[] = { 91 }; 205 206 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ 207 { \ 208 .grp = PINCTRL_PINGROUP("gpio" #id, \ 209 gpio##id##_pins, \ 210 ARRAY_SIZE(gpio##id##_pins)), \ 211 .funcs = (int[]){ \ 212 msm_mux_gpio, \ 213 msm_mux_##f1, \ 214 msm_mux_##f2, \ 215 msm_mux_##f3, \ 216 msm_mux_##f4, \ 217 msm_mux_##f5, \ 218 msm_mux_##f6, \ 219 msm_mux_##f7, \ 220 msm_mux_##f8, \ 221 msm_mux_##f9 \ 222 }, \ 223 .nfuncs = 10, \ 224 .ctl_reg = 0x1000 * id, \ 225 .io_reg = 0x4 + 0x1000 * id, \ 226 .intr_cfg_reg = 0x8 + 0x1000 * id, \ 227 .intr_status_reg = 0xc + 0x1000 * id, \ 228 .mux_bit = 2, \ 229 .pull_bit = 0, \ 230 .drv_bit = 6, \ 231 .oe_bit = 9, \ 232 .in_bit = 0, \ 233 .out_bit = 1, \ 234 .intr_enable_bit = 0, \ 235 .intr_status_bit = 0, \ 236 .intr_target_bit = 5, \ 237 .intr_target_kpss_val = 4, \ 238 .intr_raw_status_bit = 4, \ 239 .intr_polarity_bit = 1, \ 240 .intr_detection_bit = 2, \ 241 .intr_detection_width = 2, \ 242 } 243 244 #define SDC_PINGROUP(pg_name, ctl, pull, drv) \ 245 { \ 246 .grp = PINCTRL_PINGROUP(#pg_name, \ 247 pg_name##_pins, \ 248 ARRAY_SIZE(pg_name##_pins)), \ 249 .ctl_reg = ctl, \ 250 .io_reg = 0, \ 251 .intr_cfg_reg = 0, \ 252 .intr_status_reg = 0, \ 253 .mux_bit = -1, \ 254 .pull_bit = pull, \ 255 .drv_bit = drv, \ 256 .oe_bit = -1, \ 257 .in_bit = -1, \ 258 .out_bit = -1, \ 259 .intr_enable_bit = -1, \ 260 .intr_status_bit = -1, \ 261 .intr_target_bit = -1, \ 262 .intr_target_kpss_val = -1, \ 263 .intr_raw_status_bit = -1, \ 264 .intr_polarity_bit = -1, \ 265 .intr_detection_bit = -1, \ 266 .intr_detection_width = -1, \ 267 } 268 269 enum mdm9607_functions { 270 msm_mux_adsp_ext, 271 msm_mux_atest_bbrx0, 272 msm_mux_atest_bbrx1, 273 msm_mux_atest_char, 274 msm_mux_atest_char0, 275 msm_mux_atest_char1, 276 msm_mux_atest_char2, 277 msm_mux_atest_char3, 278 msm_mux_atest_combodac_to_gpio_native, 279 msm_mux_atest_gpsadc_dtest0_native, 280 msm_mux_atest_gpsadc_dtest1_native, 281 msm_mux_atest_tsens, 282 msm_mux_backlight_en_b, 283 msm_mux_bimc_dte0, 284 msm_mux_bimc_dte1, 285 msm_mux_blsp1_spi, 286 msm_mux_blsp2_spi, 287 msm_mux_blsp3_spi, 288 msm_mux_blsp_i2c1, 289 msm_mux_blsp_i2c2, 290 msm_mux_blsp_i2c3, 291 msm_mux_blsp_i2c4, 292 msm_mux_blsp_i2c5, 293 msm_mux_blsp_i2c6, 294 msm_mux_blsp_spi1, 295 msm_mux_blsp_spi2, 296 msm_mux_blsp_spi3, 297 msm_mux_blsp_spi4, 298 msm_mux_blsp_spi5, 299 msm_mux_blsp_spi6, 300 msm_mux_blsp_uart1, 301 msm_mux_blsp_uart2, 302 msm_mux_blsp_uart3, 303 msm_mux_blsp_uart4, 304 msm_mux_blsp_uart5, 305 msm_mux_blsp_uart6, 306 msm_mux_blsp_uim1, 307 msm_mux_blsp_uim2, 308 msm_mux_codec_int, 309 msm_mux_codec_rst, 310 msm_mux_coex_uart, 311 msm_mux_cri_trng, 312 msm_mux_cri_trng0, 313 msm_mux_cri_trng1, 314 msm_mux_dbg_out, 315 msm_mux_ebi0_wrcdc, 316 msm_mux_ebi2_a, 317 msm_mux_ebi2_a_d_8_b, 318 msm_mux_ebi2_lcd, 319 msm_mux_ebi2_lcd_cs_n_b, 320 msm_mux_ebi2_lcd_te_b, 321 msm_mux_eth_irq, 322 msm_mux_eth_rst, 323 msm_mux_gcc_gp1_clk_a, 324 msm_mux_gcc_gp1_clk_b, 325 msm_mux_gcc_gp2_clk_a, 326 msm_mux_gcc_gp2_clk_b, 327 msm_mux_gcc_gp3_clk_a, 328 msm_mux_gcc_gp3_clk_b, 329 msm_mux_gcc_plltest, 330 msm_mux_gcc_tlmm, 331 msm_mux_gmac_mdio, 332 msm_mux_gpio, 333 msm_mux_gsm0_tx, 334 msm_mux_lcd_rst, 335 msm_mux_ldo_en, 336 msm_mux_ldo_update, 337 msm_mux_m_voc, 338 msm_mux_modem_tsync, 339 msm_mux_nav_ptp_pps_in_a, 340 msm_mux_nav_ptp_pps_in_b, 341 msm_mux_nav_tsync_out_a, 342 msm_mux_nav_tsync_out_b, 343 msm_mux_pa_indicator, 344 msm_mux_pbs0, 345 msm_mux_pbs1, 346 msm_mux_pbs2, 347 msm_mux_pri_mi2s_data0_a, 348 msm_mux_pri_mi2s_data1_a, 349 msm_mux_pri_mi2s_mclk_a, 350 msm_mux_pri_mi2s_sck_a, 351 msm_mux_pri_mi2s_ws_a, 352 msm_mux_prng_rosc, 353 msm_mux_ptp_pps_out_a, 354 msm_mux_ptp_pps_out_b, 355 msm_mux_pwr_crypto_enabled_a, 356 msm_mux_pwr_crypto_enabled_b, 357 msm_mux_pwr_modem_enabled_a, 358 msm_mux_pwr_modem_enabled_b, 359 msm_mux_pwr_nav_enabled_a, 360 msm_mux_pwr_nav_enabled_b, 361 msm_mux_qdss_cti_trig_in_a0, 362 msm_mux_qdss_cti_trig_in_a1, 363 msm_mux_qdss_cti_trig_in_b0, 364 msm_mux_qdss_cti_trig_in_b1, 365 msm_mux_qdss_cti_trig_out_a0, 366 msm_mux_qdss_cti_trig_out_a1, 367 msm_mux_qdss_cti_trig_out_b0, 368 msm_mux_qdss_cti_trig_out_b1, 369 msm_mux_qdss_traceclk_a, 370 msm_mux_qdss_traceclk_b, 371 msm_mux_qdss_tracectl_a, 372 msm_mux_qdss_tracectl_b, 373 msm_mux_qdss_tracedata_a, 374 msm_mux_qdss_tracedata_b, 375 msm_mux_rcm_marker1, 376 msm_mux_rcm_marker2, 377 msm_mux_sd_write, 378 msm_mux_sec_mi2s, 379 msm_mux_sensor_en, 380 msm_mux_sensor_int2, 381 msm_mux_sensor_int3, 382 msm_mux_sensor_rst, 383 msm_mux_ssbi1, 384 msm_mux_ssbi2, 385 msm_mux_touch_rst, 386 msm_mux_ts_int, 387 msm_mux_uim1_clk, 388 msm_mux_uim1_data, 389 msm_mux_uim1_present, 390 msm_mux_uim1_reset, 391 msm_mux_uim2_clk, 392 msm_mux_uim2_data, 393 msm_mux_uim2_present, 394 msm_mux_uim2_reset, 395 msm_mux_uim_batt, 396 msm_mux_wlan_en1, 397 msm_mux__, 398 }; 399 400 static const char * const gpio_groups[] = { 401 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", 402 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14", 403 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21", 404 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", 405 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35", 406 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42", 407 "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49", 408 "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56", 409 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63", 410 "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70", 411 "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77", 412 "gpio78", "gpio79", 413 }; 414 static const char * const blsp_spi3_groups[] = { 415 "gpio0", "gpio1", "gpio2", "gpio3", 416 }; 417 static const char * const blsp_uart3_groups[] = { 418 "gpio0", "gpio1", "gpio2", "gpio3", 419 }; 420 static const char * const qdss_tracedata_a_groups[] = { 421 "gpio0", "gpio1", "gpio4", "gpio5", "gpio20", "gpio21", "gpio22", 422 "gpio23", "gpio24", "gpio25", "gpio26", "gpio75", "gpio76", "gpio77", 423 "gpio78", "gpio79", 424 }; 425 static const char * const bimc_dte1_groups[] = { 426 "gpio1", "gpio24", 427 }; 428 static const char * const blsp_i2c3_groups[] = { 429 "gpio2", "gpio3", 430 }; 431 static const char * const qdss_traceclk_a_groups[] = { 432 "gpio2", 433 }; 434 static const char * const bimc_dte0_groups[] = { 435 "gpio2", "gpio15", 436 }; 437 static const char * const qdss_cti_trig_in_a1_groups[] = { 438 "gpio3", 439 }; 440 static const char * const blsp_spi2_groups[] = { 441 "gpio4", "gpio5", "gpio6", "gpio7", 442 }; 443 static const char * const blsp_uart2_groups[] = { 444 "gpio4", "gpio5", "gpio6", "gpio7", 445 }; 446 static const char * const blsp_uim2_groups[] = { 447 "gpio4", "gpio5", 448 }; 449 static const char * const blsp_i2c2_groups[] = { 450 "gpio6", "gpio7", 451 }; 452 static const char * const qdss_tracectl_a_groups[] = { 453 "gpio6", 454 }; 455 static const char * const sensor_int2_groups[] = { 456 "gpio8", 457 }; 458 static const char * const blsp_spi5_groups[] = { 459 "gpio8", "gpio9", "gpio10", "gpio11", 460 }; 461 static const char * const blsp_uart5_groups[] = { 462 "gpio8", "gpio9", "gpio10", "gpio11", 463 }; 464 static const char * const ebi2_lcd_groups[] = { 465 "gpio8", "gpio11", "gpio74", "gpio78", 466 }; 467 static const char * const m_voc_groups[] = { 468 "gpio8", "gpio78", 469 }; 470 static const char * const sensor_int3_groups[] = { 471 "gpio9", 472 }; 473 static const char * const sensor_en_groups[] = { 474 "gpio10", 475 }; 476 static const char * const blsp_i2c5_groups[] = { 477 "gpio10", "gpio11", 478 }; 479 static const char * const ebi2_a_groups[] = { 480 "gpio10", 481 }; 482 static const char * const qdss_tracedata_b_groups[] = { 483 "gpio10", "gpio39", "gpio40", "gpio41", "gpio42", "gpio43", "gpio46", 484 "gpio47", "gpio48", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", 485 "gpio58", "gpio59", 486 }; 487 static const char * const sensor_rst_groups[] = { 488 "gpio11", 489 }; 490 static const char * const blsp2_spi_groups[] = { 491 "gpio11", "gpio13", "gpio77", 492 }; 493 static const char * const blsp_spi1_groups[] = { 494 "gpio12", "gpio13", "gpio14", "gpio15", 495 }; 496 static const char * const blsp_uart1_groups[] = { 497 "gpio12", "gpio13", "gpio14", "gpio15", 498 }; 499 static const char * const blsp_uim1_groups[] = { 500 "gpio12", "gpio13", 501 }; 502 static const char * const blsp3_spi_groups[] = { 503 "gpio12", "gpio26", "gpio76", 504 }; 505 static const char * const gcc_gp2_clk_b_groups[] = { 506 "gpio12", 507 }; 508 static const char * const gcc_gp3_clk_b_groups[] = { 509 "gpio13", 510 }; 511 static const char * const blsp_i2c1_groups[] = { 512 "gpio14", "gpio15", 513 }; 514 static const char * const gcc_gp1_clk_b_groups[] = { 515 "gpio14", 516 }; 517 static const char * const blsp_spi4_groups[] = { 518 "gpio16", "gpio17", "gpio18", "gpio19", 519 }; 520 static const char * const blsp_uart4_groups[] = { 521 "gpio16", "gpio17", "gpio18", "gpio19", 522 }; 523 static const char * const rcm_marker1_groups[] = { 524 "gpio18", 525 }; 526 static const char * const blsp_i2c4_groups[] = { 527 "gpio18", "gpio19", 528 }; 529 static const char * const qdss_cti_trig_out_a1_groups[] = { 530 "gpio18", 531 }; 532 static const char * const rcm_marker2_groups[] = { 533 "gpio19", 534 }; 535 static const char * const qdss_cti_trig_out_a0_groups[] = { 536 "gpio19", 537 }; 538 static const char * const blsp_spi6_groups[] = { 539 "gpio20", "gpio21", "gpio22", "gpio23", 540 }; 541 static const char * const blsp_uart6_groups[] = { 542 "gpio20", "gpio21", "gpio22", "gpio23", 543 }; 544 static const char * const pri_mi2s_ws_a_groups[] = { 545 "gpio20", 546 }; 547 static const char * const ebi2_lcd_te_b_groups[] = { 548 "gpio20", 549 }; 550 static const char * const blsp1_spi_groups[] = { 551 "gpio20", "gpio21", "gpio78", 552 }; 553 static const char * const backlight_en_b_groups[] = { 554 "gpio21", 555 }; 556 static const char * const pri_mi2s_data0_a_groups[] = { 557 "gpio21", 558 }; 559 static const char * const pri_mi2s_data1_a_groups[] = { 560 "gpio22", 561 }; 562 static const char * const blsp_i2c6_groups[] = { 563 "gpio22", "gpio23", 564 }; 565 static const char * const ebi2_a_d_8_b_groups[] = { 566 "gpio22", 567 }; 568 static const char * const pri_mi2s_sck_a_groups[] = { 569 "gpio23", 570 }; 571 static const char * const ebi2_lcd_cs_n_b_groups[] = { 572 "gpio23", 573 }; 574 static const char * const touch_rst_groups[] = { 575 "gpio24", 576 }; 577 static const char * const pri_mi2s_mclk_a_groups[] = { 578 "gpio24", 579 }; 580 static const char * const pwr_nav_enabled_a_groups[] = { 581 "gpio24", 582 }; 583 static const char * const ts_int_groups[] = { 584 "gpio25", 585 }; 586 static const char * const sd_write_groups[] = { 587 "gpio25", 588 }; 589 static const char * const pwr_crypto_enabled_a_groups[] = { 590 "gpio25", 591 }; 592 static const char * const codec_rst_groups[] = { 593 "gpio26", 594 }; 595 static const char * const adsp_ext_groups[] = { 596 "gpio26", 597 }; 598 static const char * const atest_combodac_to_gpio_native_groups[] = { 599 "gpio26", "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32", 600 "gpio33", "gpio34", "gpio35", "gpio41", "gpio45", "gpio49", "gpio50", 601 "gpio51", "gpio52", "gpio54", "gpio55", "gpio57", "gpio59", 602 }; 603 static const char * const uim2_data_groups[] = { 604 "gpio27", 605 }; 606 static const char * const gmac_mdio_groups[] = { 607 "gpio27", "gpio28", 608 }; 609 static const char * const gcc_gp1_clk_a_groups[] = { 610 "gpio27", 611 }; 612 static const char * const uim2_clk_groups[] = { 613 "gpio28", 614 }; 615 static const char * const gcc_gp2_clk_a_groups[] = { 616 "gpio28", 617 }; 618 static const char * const eth_irq_groups[] = { 619 "gpio29", 620 }; 621 static const char * const uim2_reset_groups[] = { 622 "gpio29", 623 }; 624 static const char * const gcc_gp3_clk_a_groups[] = { 625 "gpio29", 626 }; 627 static const char * const eth_rst_groups[] = { 628 "gpio30", 629 }; 630 static const char * const uim2_present_groups[] = { 631 "gpio30", 632 }; 633 static const char * const prng_rosc_groups[] = { 634 "gpio30", 635 }; 636 static const char * const uim1_data_groups[] = { 637 "gpio31", 638 }; 639 static const char * const uim1_clk_groups[] = { 640 "gpio32", 641 }; 642 static const char * const uim1_reset_groups[] = { 643 "gpio33", 644 }; 645 static const char * const uim1_present_groups[] = { 646 "gpio34", 647 }; 648 static const char * const gcc_plltest_groups[] = { 649 "gpio34", "gpio35", 650 }; 651 static const char * const uim_batt_groups[] = { 652 "gpio35", 653 }; 654 static const char * const coex_uart_groups[] = { 655 "gpio36", "gpio37", 656 }; 657 static const char * const codec_int_groups[] = { 658 "gpio38", 659 }; 660 static const char * const qdss_cti_trig_in_a0_groups[] = { 661 "gpio38", 662 }; 663 static const char * const atest_bbrx1_groups[] = { 664 "gpio39", 665 }; 666 static const char * const cri_trng0_groups[] = { 667 "gpio40", 668 }; 669 static const char * const atest_bbrx0_groups[] = { 670 "gpio40", 671 }; 672 static const char * const cri_trng_groups[] = { 673 "gpio42", 674 }; 675 static const char * const qdss_cti_trig_in_b0_groups[] = { 676 "gpio44", 677 }; 678 static const char * const atest_gpsadc_dtest0_native_groups[] = { 679 "gpio44", 680 }; 681 static const char * const qdss_cti_trig_out_b0_groups[] = { 682 "gpio45", 683 }; 684 static const char * const qdss_tracectl_b_groups[] = { 685 "gpio49", 686 }; 687 static const char * const qdss_traceclk_b_groups[] = { 688 "gpio50", 689 }; 690 static const char * const pa_indicator_groups[] = { 691 "gpio51", 692 }; 693 static const char * const modem_tsync_groups[] = { 694 "gpio53", 695 }; 696 static const char * const nav_tsync_out_a_groups[] = { 697 "gpio53", 698 }; 699 static const char * const nav_ptp_pps_in_a_groups[] = { 700 "gpio53", 701 }; 702 static const char * const ptp_pps_out_a_groups[] = { 703 "gpio53", 704 }; 705 static const char * const gsm0_tx_groups[] = { 706 "gpio55", 707 }; 708 static const char * const qdss_cti_trig_in_b1_groups[] = { 709 "gpio56", 710 }; 711 static const char * const cri_trng1_groups[] = { 712 "gpio57", 713 }; 714 static const char * const qdss_cti_trig_out_b1_groups[] = { 715 "gpio57", 716 }; 717 static const char * const ssbi1_groups[] = { 718 "gpio58", 719 }; 720 static const char * const atest_gpsadc_dtest1_native_groups[] = { 721 "gpio58", 722 }; 723 static const char * const ssbi2_groups[] = { 724 "gpio59", 725 }; 726 static const char * const atest_char3_groups[] = { 727 "gpio60", 728 }; 729 static const char * const atest_char2_groups[] = { 730 "gpio61", 731 }; 732 static const char * const atest_char1_groups[] = { 733 "gpio62", 734 }; 735 static const char * const atest_char0_groups[] = { 736 "gpio63", 737 }; 738 static const char * const atest_char_groups[] = { 739 "gpio64", 740 }; 741 static const char * const ebi0_wrcdc_groups[] = { 742 "gpio70", 743 }; 744 static const char * const ldo_update_groups[] = { 745 "gpio72", 746 }; 747 static const char * const gcc_tlmm_groups[] = { 748 "gpio72", 749 }; 750 static const char * const ldo_en_groups[] = { 751 "gpio73", 752 }; 753 static const char * const dbg_out_groups[] = { 754 "gpio73", 755 }; 756 static const char * const atest_tsens_groups[] = { 757 "gpio73", 758 }; 759 static const char * const lcd_rst_groups[] = { 760 "gpio74", 761 }; 762 static const char * const wlan_en1_groups[] = { 763 "gpio75", 764 }; 765 static const char * const nav_tsync_out_b_groups[] = { 766 "gpio75", 767 }; 768 static const char * const nav_ptp_pps_in_b_groups[] = { 769 "gpio75", 770 }; 771 static const char * const ptp_pps_out_b_groups[] = { 772 "gpio75", 773 }; 774 static const char * const pbs0_groups[] = { 775 "gpio76", 776 }; 777 static const char * const sec_mi2s_groups[] = { 778 "gpio76", "gpio77", "gpio78", "gpio79", 779 }; 780 static const char * const pwr_modem_enabled_a_groups[] = { 781 "gpio76", 782 }; 783 static const char * const pbs1_groups[] = { 784 "gpio77", 785 }; 786 static const char * const pwr_modem_enabled_b_groups[] = { 787 "gpio77", 788 }; 789 static const char * const pbs2_groups[] = { 790 "gpio78", 791 }; 792 static const char * const pwr_nav_enabled_b_groups[] = { 793 "gpio78", 794 }; 795 static const char * const pwr_crypto_enabled_b_groups[] = { 796 "gpio79", 797 }; 798 799 static const struct pinfunction mdm9607_functions[] = { 800 MSM_PIN_FUNCTION(adsp_ext), 801 MSM_PIN_FUNCTION(atest_bbrx0), 802 MSM_PIN_FUNCTION(atest_bbrx1), 803 MSM_PIN_FUNCTION(atest_char), 804 MSM_PIN_FUNCTION(atest_char0), 805 MSM_PIN_FUNCTION(atest_char1), 806 MSM_PIN_FUNCTION(atest_char2), 807 MSM_PIN_FUNCTION(atest_char3), 808 MSM_PIN_FUNCTION(atest_combodac_to_gpio_native), 809 MSM_PIN_FUNCTION(atest_gpsadc_dtest0_native), 810 MSM_PIN_FUNCTION(atest_gpsadc_dtest1_native), 811 MSM_PIN_FUNCTION(atest_tsens), 812 MSM_PIN_FUNCTION(backlight_en_b), 813 MSM_PIN_FUNCTION(bimc_dte0), 814 MSM_PIN_FUNCTION(bimc_dte1), 815 MSM_PIN_FUNCTION(blsp1_spi), 816 MSM_PIN_FUNCTION(blsp2_spi), 817 MSM_PIN_FUNCTION(blsp3_spi), 818 MSM_PIN_FUNCTION(blsp_i2c1), 819 MSM_PIN_FUNCTION(blsp_i2c2), 820 MSM_PIN_FUNCTION(blsp_i2c3), 821 MSM_PIN_FUNCTION(blsp_i2c4), 822 MSM_PIN_FUNCTION(blsp_i2c5), 823 MSM_PIN_FUNCTION(blsp_i2c6), 824 MSM_PIN_FUNCTION(blsp_spi1), 825 MSM_PIN_FUNCTION(blsp_spi2), 826 MSM_PIN_FUNCTION(blsp_spi3), 827 MSM_PIN_FUNCTION(blsp_spi4), 828 MSM_PIN_FUNCTION(blsp_spi5), 829 MSM_PIN_FUNCTION(blsp_spi6), 830 MSM_PIN_FUNCTION(blsp_uart1), 831 MSM_PIN_FUNCTION(blsp_uart2), 832 MSM_PIN_FUNCTION(blsp_uart3), 833 MSM_PIN_FUNCTION(blsp_uart4), 834 MSM_PIN_FUNCTION(blsp_uart5), 835 MSM_PIN_FUNCTION(blsp_uart6), 836 MSM_PIN_FUNCTION(blsp_uim1), 837 MSM_PIN_FUNCTION(blsp_uim2), 838 MSM_PIN_FUNCTION(codec_int), 839 MSM_PIN_FUNCTION(codec_rst), 840 MSM_PIN_FUNCTION(coex_uart), 841 MSM_PIN_FUNCTION(cri_trng), 842 MSM_PIN_FUNCTION(cri_trng0), 843 MSM_PIN_FUNCTION(cri_trng1), 844 MSM_PIN_FUNCTION(dbg_out), 845 MSM_PIN_FUNCTION(ebi0_wrcdc), 846 MSM_PIN_FUNCTION(ebi2_a), 847 MSM_PIN_FUNCTION(ebi2_a_d_8_b), 848 MSM_PIN_FUNCTION(ebi2_lcd), 849 MSM_PIN_FUNCTION(ebi2_lcd_cs_n_b), 850 MSM_PIN_FUNCTION(ebi2_lcd_te_b), 851 MSM_PIN_FUNCTION(eth_irq), 852 MSM_PIN_FUNCTION(eth_rst), 853 MSM_PIN_FUNCTION(gcc_gp1_clk_a), 854 MSM_PIN_FUNCTION(gcc_gp1_clk_b), 855 MSM_PIN_FUNCTION(gcc_gp2_clk_a), 856 MSM_PIN_FUNCTION(gcc_gp2_clk_b), 857 MSM_PIN_FUNCTION(gcc_gp3_clk_a), 858 MSM_PIN_FUNCTION(gcc_gp3_clk_b), 859 MSM_PIN_FUNCTION(gcc_plltest), 860 MSM_PIN_FUNCTION(gcc_tlmm), 861 MSM_PIN_FUNCTION(gmac_mdio), 862 MSM_GPIO_PIN_FUNCTION(gpio), 863 MSM_PIN_FUNCTION(gsm0_tx), 864 MSM_PIN_FUNCTION(lcd_rst), 865 MSM_PIN_FUNCTION(ldo_en), 866 MSM_PIN_FUNCTION(ldo_update), 867 MSM_PIN_FUNCTION(m_voc), 868 MSM_PIN_FUNCTION(modem_tsync), 869 MSM_PIN_FUNCTION(nav_ptp_pps_in_a), 870 MSM_PIN_FUNCTION(nav_ptp_pps_in_b), 871 MSM_PIN_FUNCTION(nav_tsync_out_a), 872 MSM_PIN_FUNCTION(nav_tsync_out_b), 873 MSM_PIN_FUNCTION(pa_indicator), 874 MSM_PIN_FUNCTION(pbs0), 875 MSM_PIN_FUNCTION(pbs1), 876 MSM_PIN_FUNCTION(pbs2), 877 MSM_PIN_FUNCTION(pri_mi2s_data0_a), 878 MSM_PIN_FUNCTION(pri_mi2s_data1_a), 879 MSM_PIN_FUNCTION(pri_mi2s_mclk_a), 880 MSM_PIN_FUNCTION(pri_mi2s_sck_a), 881 MSM_PIN_FUNCTION(pri_mi2s_ws_a), 882 MSM_PIN_FUNCTION(prng_rosc), 883 MSM_PIN_FUNCTION(ptp_pps_out_a), 884 MSM_PIN_FUNCTION(ptp_pps_out_b), 885 MSM_PIN_FUNCTION(pwr_crypto_enabled_a), 886 MSM_PIN_FUNCTION(pwr_crypto_enabled_b), 887 MSM_PIN_FUNCTION(pwr_modem_enabled_a), 888 MSM_PIN_FUNCTION(pwr_modem_enabled_b), 889 MSM_PIN_FUNCTION(pwr_nav_enabled_a), 890 MSM_PIN_FUNCTION(pwr_nav_enabled_b), 891 MSM_PIN_FUNCTION(qdss_cti_trig_in_a0), 892 MSM_PIN_FUNCTION(qdss_cti_trig_in_a1), 893 MSM_PIN_FUNCTION(qdss_cti_trig_in_b0), 894 MSM_PIN_FUNCTION(qdss_cti_trig_in_b1), 895 MSM_PIN_FUNCTION(qdss_cti_trig_out_a0), 896 MSM_PIN_FUNCTION(qdss_cti_trig_out_a1), 897 MSM_PIN_FUNCTION(qdss_cti_trig_out_b0), 898 MSM_PIN_FUNCTION(qdss_cti_trig_out_b1), 899 MSM_PIN_FUNCTION(qdss_traceclk_a), 900 MSM_PIN_FUNCTION(qdss_traceclk_b), 901 MSM_PIN_FUNCTION(qdss_tracectl_a), 902 MSM_PIN_FUNCTION(qdss_tracectl_b), 903 MSM_PIN_FUNCTION(qdss_tracedata_a), 904 MSM_PIN_FUNCTION(qdss_tracedata_b), 905 MSM_PIN_FUNCTION(rcm_marker1), 906 MSM_PIN_FUNCTION(rcm_marker2), 907 MSM_PIN_FUNCTION(sd_write), 908 MSM_PIN_FUNCTION(sec_mi2s), 909 MSM_PIN_FUNCTION(sensor_en), 910 MSM_PIN_FUNCTION(sensor_int2), 911 MSM_PIN_FUNCTION(sensor_int3), 912 MSM_PIN_FUNCTION(sensor_rst), 913 MSM_PIN_FUNCTION(ssbi1), 914 MSM_PIN_FUNCTION(ssbi2), 915 MSM_PIN_FUNCTION(touch_rst), 916 MSM_PIN_FUNCTION(ts_int), 917 MSM_PIN_FUNCTION(uim1_clk), 918 MSM_PIN_FUNCTION(uim1_data), 919 MSM_PIN_FUNCTION(uim1_present), 920 MSM_PIN_FUNCTION(uim1_reset), 921 MSM_PIN_FUNCTION(uim2_clk), 922 MSM_PIN_FUNCTION(uim2_data), 923 MSM_PIN_FUNCTION(uim2_present), 924 MSM_PIN_FUNCTION(uim2_reset), 925 MSM_PIN_FUNCTION(uim_batt), 926 MSM_PIN_FUNCTION(wlan_en1) 927 }; 928 929 static const struct msm_pingroup mdm9607_groups[] = { 930 PINGROUP(0, blsp_uart3, blsp_spi3, _, _, _, _, _, qdss_tracedata_a, _), 931 PINGROUP(1, blsp_uart3, blsp_spi3, _, _, _, _, _, qdss_tracedata_a, bimc_dte1), 932 PINGROUP(2, blsp_uart3, blsp_i2c3, blsp_spi3, _, _, _, _, _, qdss_traceclk_a), 933 PINGROUP(3, blsp_uart3, blsp_i2c3, blsp_spi3, _, _, _, _, _, _), 934 PINGROUP(4, blsp_spi2, blsp_uart2, blsp_uim2, _, _, _, _, qdss_tracedata_a, _), 935 PINGROUP(5, blsp_spi2, blsp_uart2, blsp_uim2, _, _, _, _, qdss_tracedata_a, _), 936 PINGROUP(6, blsp_spi2, blsp_uart2, blsp_i2c2, _, _, _, _, _, _), 937 PINGROUP(7, blsp_spi2, blsp_uart2, blsp_i2c2, _, _, _, _, _, _), 938 PINGROUP(8, blsp_spi5, blsp_uart5, ebi2_lcd, m_voc, _, _, _, _, _), 939 PINGROUP(9, blsp_spi5, blsp_uart5, _, _, _, _, _, _, _), 940 PINGROUP(10, blsp_spi5, blsp_i2c5, blsp_uart5, ebi2_a, _, _, qdss_tracedata_b, _, _), 941 PINGROUP(11, blsp_spi5, blsp_i2c5, blsp_uart5, blsp2_spi, ebi2_lcd, _, _, _, _), 942 PINGROUP(12, blsp_spi1, blsp_uart1, blsp_uim1, blsp3_spi, gcc_gp2_clk_b, _, _, _, _), 943 PINGROUP(13, blsp_spi1, blsp_uart1, blsp_uim1, blsp2_spi, gcc_gp3_clk_b, _, _, _, _), 944 PINGROUP(14, blsp_spi1, blsp_uart1, blsp_i2c1, gcc_gp1_clk_b, _, _, _, _, _), 945 PINGROUP(15, blsp_spi1, blsp_uart1, blsp_i2c1, _, _, _, _, _, _), 946 PINGROUP(16, blsp_spi4, blsp_uart4, _, _, _, _, _, _, _), 947 PINGROUP(17, blsp_spi4, blsp_uart4, _, _, _, _, _, _, _), 948 PINGROUP(18, blsp_spi4, blsp_uart4, blsp_i2c4, _, _, _, _, _, _), 949 PINGROUP(19, blsp_spi4, blsp_uart4, blsp_i2c4, _, _, _, _, _, _), 950 PINGROUP(20, blsp_spi6, blsp_uart6, pri_mi2s_ws_a, ebi2_lcd_te_b, blsp1_spi, _, _, _, 951 qdss_tracedata_a), 952 PINGROUP(21, blsp_spi6, blsp_uart6, pri_mi2s_data0_a, blsp1_spi, _, _, _, _, _), 953 PINGROUP(22, blsp_spi6, blsp_uart6, pri_mi2s_data1_a, blsp_i2c6, ebi2_a_d_8_b, _, _, _, _), 954 PINGROUP(23, blsp_spi6, blsp_uart6, pri_mi2s_sck_a, blsp_i2c6, ebi2_lcd_cs_n_b, _, _, _, _), 955 PINGROUP(24, pri_mi2s_mclk_a, _, pwr_nav_enabled_a, _, _, _, _, qdss_tracedata_a, 956 bimc_dte1), 957 PINGROUP(25, sd_write, _, pwr_crypto_enabled_a, _, _, _, _, qdss_tracedata_a, _), 958 PINGROUP(26, blsp3_spi, adsp_ext, _, qdss_tracedata_a, _, atest_combodac_to_gpio_native, _, 959 _, _), 960 PINGROUP(27, uim2_data, gmac_mdio, gcc_gp1_clk_a, _, _, atest_combodac_to_gpio_native, _, _, 961 _), 962 PINGROUP(28, uim2_clk, gmac_mdio, gcc_gp2_clk_a, _, _, atest_combodac_to_gpio_native, _, _, 963 _), 964 PINGROUP(29, uim2_reset, gcc_gp3_clk_a, _, _, atest_combodac_to_gpio_native, _, _, _, _), 965 PINGROUP(30, uim2_present, prng_rosc, _, _, atest_combodac_to_gpio_native, _, _, _, _), 966 PINGROUP(31, uim1_data, _, _, atest_combodac_to_gpio_native, _, _, _, _, _), 967 PINGROUP(32, uim1_clk, _, _, atest_combodac_to_gpio_native, _, _, _, _, _), 968 PINGROUP(33, uim1_reset, _, _, atest_combodac_to_gpio_native, _, _, _, _, _), 969 PINGROUP(34, uim1_present, gcc_plltest, _, _, atest_combodac_to_gpio_native, _, _, _, _), 970 PINGROUP(35, uim_batt, gcc_plltest, _, atest_combodac_to_gpio_native, _, _, _, _, _), 971 PINGROUP(36, coex_uart, _, _, _, _, _, _, _, _), 972 PINGROUP(37, coex_uart, _, _, _, _, _, _, _, _), 973 PINGROUP(38, _, _, _, qdss_cti_trig_in_a0, _, _, _, _, _), 974 PINGROUP(39, _, _, _, qdss_tracedata_b, _, atest_bbrx1, _, _, _), 975 PINGROUP(40, _, cri_trng0, _, _, _, _, qdss_tracedata_b, _, atest_bbrx0), 976 PINGROUP(41, _, _, _, _, _, qdss_tracedata_b, _, atest_combodac_to_gpio_native, _), 977 PINGROUP(42, _, cri_trng, _, _, qdss_tracedata_b, _, _, _, _), 978 PINGROUP(43, _, _, _, _, qdss_tracedata_b, _, _, _, _), 979 PINGROUP(44, _, _, qdss_cti_trig_in_b0, _, atest_gpsadc_dtest0_native, _, _, _, _), 980 PINGROUP(45, _, _, qdss_cti_trig_out_b0, _, atest_combodac_to_gpio_native, _, _, _, _), 981 PINGROUP(46, _, _, qdss_tracedata_b, _, _, _, _, _, _), 982 PINGROUP(47, _, _, qdss_tracedata_b, _, _, _, _, _, _), 983 PINGROUP(48, _, _, qdss_tracedata_b, _, _, _, _, _, _), 984 PINGROUP(49, _, _, qdss_tracectl_b, _, atest_combodac_to_gpio_native, _, _, _, _), 985 PINGROUP(50, _, _, qdss_traceclk_b, _, atest_combodac_to_gpio_native, _, _, _, _), 986 PINGROUP(51, _, pa_indicator, _, qdss_tracedata_b, _, atest_combodac_to_gpio_native, _, _, 987 _), 988 PINGROUP(52, _, _, _, qdss_tracedata_b, _, atest_combodac_to_gpio_native, _, _, _), 989 PINGROUP(53, _, modem_tsync, nav_tsync_out_a, nav_ptp_pps_in_a, ptp_pps_out_a, 990 qdss_tracedata_b, _, _, _), 991 PINGROUP(54, _, qdss_tracedata_b, _, atest_combodac_to_gpio_native, _, _, _, _, _), 992 PINGROUP(55, gsm0_tx, _, qdss_tracedata_b, _, atest_combodac_to_gpio_native, _, _, _, _), 993 PINGROUP(56, _, _, qdss_cti_trig_in_b1, _, _, _, _, _, _), 994 PINGROUP(57, _, cri_trng1, _, qdss_cti_trig_out_b1, _, atest_combodac_to_gpio_native, _, _, 995 _), 996 PINGROUP(58, _, ssbi1, _, qdss_tracedata_b, _, atest_gpsadc_dtest1_native, _, _, _), 997 PINGROUP(59, _, ssbi2, _, qdss_tracedata_b, _, atest_combodac_to_gpio_native, _, _, _), 998 PINGROUP(60, atest_char3, _, _, _, _, _, _, _, _), 999 PINGROUP(61, atest_char2, _, _, _, _, _, _, _, _), 1000 PINGROUP(62, atest_char1, _, _, _, _, _, _, _, _), 1001 PINGROUP(63, atest_char0, _, _, _, _, _, _, _, _), 1002 PINGROUP(64, atest_char, _, _, _, _, _, _, _, _), 1003 PINGROUP(65, _, _, _, _, _, _, _, _, _), 1004 PINGROUP(66, _, _, _, _, _, _, _, _, _), 1005 PINGROUP(67, _, _, _, _, _, _, _, _, _), 1006 PINGROUP(68, _, _, _, _, _, _, _, _, _), 1007 PINGROUP(69, _, _, _, _, _, _, _, _, _), 1008 PINGROUP(70, _, _, ebi0_wrcdc, _, _, _, _, _, _), 1009 PINGROUP(71, _, _, _, _, _, _, _, _, _), 1010 PINGROUP(72, ldo_update, _, gcc_tlmm, _, _, _, _, _, _), 1011 PINGROUP(73, ldo_en, dbg_out, _, _, _, atest_tsens, _, _, _), 1012 PINGROUP(74, ebi2_lcd, _, _, _, _, _, _, _, _), 1013 PINGROUP(75, nav_tsync_out_b, nav_ptp_pps_in_b, ptp_pps_out_b, _, qdss_tracedata_a, _, _, _, 1014 _), 1015 PINGROUP(76, pbs0, sec_mi2s, blsp3_spi, pwr_modem_enabled_a, _, qdss_tracedata_a, _, _, _), 1016 PINGROUP(77, pbs1, sec_mi2s, blsp2_spi, pwr_modem_enabled_b, _, qdss_tracedata_a, _, _, _), 1017 PINGROUP(78, pbs2, sec_mi2s, blsp1_spi, ebi2_lcd, m_voc, pwr_nav_enabled_b, _, 1018 qdss_tracedata_a, _), 1019 PINGROUP(79, sec_mi2s, _, pwr_crypto_enabled_b, _, qdss_tracedata_a, _, _, _, _), 1020 SDC_PINGROUP(sdc1_clk, 0x10a000, 13, 6), 1021 SDC_PINGROUP(sdc1_cmd, 0x10a000, 11, 3), 1022 SDC_PINGROUP(sdc1_data, 0x10a000, 9, 0), 1023 SDC_PINGROUP(sdc2_clk, 0x109000, 14, 6), 1024 SDC_PINGROUP(sdc2_cmd, 0x109000, 11, 3), 1025 SDC_PINGROUP(sdc2_data, 0x109000, 9, 0), 1026 SDC_PINGROUP(qdsd_clk, 0x19c000, 3, 0), 1027 SDC_PINGROUP(qdsd_cmd, 0x19c000, 8, 5), 1028 SDC_PINGROUP(qdsd_data0, 0x19c000, 13, 10), 1029 SDC_PINGROUP(qdsd_data1, 0x19c000, 18, 15), 1030 SDC_PINGROUP(qdsd_data2, 0x19c000, 23, 20), 1031 SDC_PINGROUP(qdsd_data3, 0x19c000, 28, 25), 1032 }; 1033 1034 static const struct msm_pinctrl_soc_data mdm9607_pinctrl = { 1035 .pins = mdm9607_pins, 1036 .npins = ARRAY_SIZE(mdm9607_pins), 1037 .functions = mdm9607_functions, 1038 .nfunctions = ARRAY_SIZE(mdm9607_functions), 1039 .groups = mdm9607_groups, 1040 .ngroups = ARRAY_SIZE(mdm9607_groups), 1041 .ngpios = 80, 1042 }; 1043 1044 static int mdm9607_pinctrl_probe(struct platform_device *pdev) 1045 { 1046 return msm_pinctrl_probe(pdev, &mdm9607_pinctrl); 1047 } 1048 1049 static const struct of_device_id mdm9607_pinctrl_of_match[] = { 1050 { .compatible = "qcom,mdm9607-tlmm", }, 1051 { } 1052 }; 1053 MODULE_DEVICE_TABLE(of, mdm9607_pinctrl_of_match); 1054 1055 static struct platform_driver mdm9607_pinctrl_driver = { 1056 .driver = { 1057 .name = "mdm9607-pinctrl", 1058 .of_match_table = mdm9607_pinctrl_of_match, 1059 }, 1060 .probe = mdm9607_pinctrl_probe, 1061 }; 1062 1063 static int __init mdm9607_pinctrl_init(void) 1064 { 1065 return platform_driver_register(&mdm9607_pinctrl_driver); 1066 } 1067 arch_initcall(mdm9607_pinctrl_init); 1068 1069 static void __exit mdm9607_pinctrl_exit(void) 1070 { 1071 platform_driver_unregister(&mdm9607_pinctrl_driver); 1072 } 1073 module_exit(mdm9607_pinctrl_exit); 1074 1075 MODULE_DESCRIPTION("Qualcomm mdm9607 pinctrl driver"); 1076 MODULE_LICENSE("GPL v2"); 1077