1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2021, Konrad Dybcio <konrad.dybcio@somainline.org> 4 * 5 * based on pinctrl-msm8916.c 6 */ 7 8 #include <linux/module.h> 9 #include <linux/of.h> 10 #include <linux/platform_device.h> 11 12 #include "pinctrl-msm.h" 13 14 static const struct pinctrl_pin_desc mdm9607_pins[] = { 15 PINCTRL_PIN(0, "GPIO_0"), 16 PINCTRL_PIN(1, "GPIO_1"), 17 PINCTRL_PIN(2, "GPIO_2"), 18 PINCTRL_PIN(3, "GPIO_3"), 19 PINCTRL_PIN(4, "GPIO_4"), 20 PINCTRL_PIN(5, "GPIO_5"), 21 PINCTRL_PIN(6, "GPIO_6"), 22 PINCTRL_PIN(7, "GPIO_7"), 23 PINCTRL_PIN(8, "GPIO_8"), 24 PINCTRL_PIN(9, "GPIO_9"), 25 PINCTRL_PIN(10, "GPIO_10"), 26 PINCTRL_PIN(11, "GPIO_11"), 27 PINCTRL_PIN(12, "GPIO_12"), 28 PINCTRL_PIN(13, "GPIO_13"), 29 PINCTRL_PIN(14, "GPIO_14"), 30 PINCTRL_PIN(15, "GPIO_15"), 31 PINCTRL_PIN(16, "GPIO_16"), 32 PINCTRL_PIN(17, "GPIO_17"), 33 PINCTRL_PIN(18, "GPIO_18"), 34 PINCTRL_PIN(19, "GPIO_19"), 35 PINCTRL_PIN(20, "GPIO_20"), 36 PINCTRL_PIN(21, "GPIO_21"), 37 PINCTRL_PIN(22, "GPIO_22"), 38 PINCTRL_PIN(23, "GPIO_23"), 39 PINCTRL_PIN(24, "GPIO_24"), 40 PINCTRL_PIN(25, "GPIO_25"), 41 PINCTRL_PIN(26, "GPIO_26"), 42 PINCTRL_PIN(27, "GPIO_27"), 43 PINCTRL_PIN(28, "GPIO_28"), 44 PINCTRL_PIN(29, "GPIO_29"), 45 PINCTRL_PIN(30, "GPIO_30"), 46 PINCTRL_PIN(31, "GPIO_31"), 47 PINCTRL_PIN(32, "GPIO_32"), 48 PINCTRL_PIN(33, "GPIO_33"), 49 PINCTRL_PIN(34, "GPIO_34"), 50 PINCTRL_PIN(35, "GPIO_35"), 51 PINCTRL_PIN(36, "GPIO_36"), 52 PINCTRL_PIN(37, "GPIO_37"), 53 PINCTRL_PIN(38, "GPIO_38"), 54 PINCTRL_PIN(39, "GPIO_39"), 55 PINCTRL_PIN(40, "GPIO_40"), 56 PINCTRL_PIN(41, "GPIO_41"), 57 PINCTRL_PIN(42, "GPIO_42"), 58 PINCTRL_PIN(43, "GPIO_43"), 59 PINCTRL_PIN(44, "GPIO_44"), 60 PINCTRL_PIN(45, "GPIO_45"), 61 PINCTRL_PIN(46, "GPIO_46"), 62 PINCTRL_PIN(47, "GPIO_47"), 63 PINCTRL_PIN(48, "GPIO_48"), 64 PINCTRL_PIN(49, "GPIO_49"), 65 PINCTRL_PIN(50, "GPIO_50"), 66 PINCTRL_PIN(51, "GPIO_51"), 67 PINCTRL_PIN(52, "GPIO_52"), 68 PINCTRL_PIN(53, "GPIO_53"), 69 PINCTRL_PIN(54, "GPIO_54"), 70 PINCTRL_PIN(55, "GPIO_55"), 71 PINCTRL_PIN(56, "GPIO_56"), 72 PINCTRL_PIN(57, "GPIO_57"), 73 PINCTRL_PIN(58, "GPIO_58"), 74 PINCTRL_PIN(59, "GPIO_59"), 75 PINCTRL_PIN(60, "GPIO_60"), 76 PINCTRL_PIN(61, "GPIO_61"), 77 PINCTRL_PIN(62, "GPIO_62"), 78 PINCTRL_PIN(63, "GPIO_63"), 79 PINCTRL_PIN(64, "GPIO_64"), 80 PINCTRL_PIN(65, "GPIO_65"), 81 PINCTRL_PIN(66, "GPIO_66"), 82 PINCTRL_PIN(67, "GPIO_67"), 83 PINCTRL_PIN(68, "GPIO_68"), 84 PINCTRL_PIN(69, "GPIO_69"), 85 PINCTRL_PIN(70, "GPIO_70"), 86 PINCTRL_PIN(71, "GPIO_71"), 87 PINCTRL_PIN(72, "GPIO_72"), 88 PINCTRL_PIN(73, "GPIO_73"), 89 PINCTRL_PIN(74, "GPIO_74"), 90 PINCTRL_PIN(75, "GPIO_75"), 91 PINCTRL_PIN(76, "GPIO_76"), 92 PINCTRL_PIN(77, "GPIO_77"), 93 PINCTRL_PIN(78, "GPIO_78"), 94 PINCTRL_PIN(79, "GPIO_79"), 95 PINCTRL_PIN(80, "SDC1_CLK"), 96 PINCTRL_PIN(81, "SDC1_CMD"), 97 PINCTRL_PIN(82, "SDC1_DATA"), 98 PINCTRL_PIN(83, "SDC2_CLK"), 99 PINCTRL_PIN(84, "SDC2_CMD"), 100 PINCTRL_PIN(85, "SDC2_DATA"), 101 PINCTRL_PIN(86, "QDSD_CLK"), 102 PINCTRL_PIN(87, "QDSD_CMD"), 103 PINCTRL_PIN(88, "QDSD_DATA0"), 104 PINCTRL_PIN(89, "QDSD_DATA1"), 105 PINCTRL_PIN(90, "QDSD_DATA2"), 106 PINCTRL_PIN(91, "QDSD_DATA3"), 107 }; 108 109 #define DECLARE_MSM_GPIO_PINS(pin) \ 110 static const unsigned int gpio##pin##_pins[] = { pin } 111 112 DECLARE_MSM_GPIO_PINS(0); 113 DECLARE_MSM_GPIO_PINS(1); 114 DECLARE_MSM_GPIO_PINS(2); 115 DECLARE_MSM_GPIO_PINS(3); 116 DECLARE_MSM_GPIO_PINS(4); 117 DECLARE_MSM_GPIO_PINS(5); 118 DECLARE_MSM_GPIO_PINS(6); 119 DECLARE_MSM_GPIO_PINS(7); 120 DECLARE_MSM_GPIO_PINS(8); 121 DECLARE_MSM_GPIO_PINS(9); 122 DECLARE_MSM_GPIO_PINS(10); 123 DECLARE_MSM_GPIO_PINS(11); 124 DECLARE_MSM_GPIO_PINS(12); 125 DECLARE_MSM_GPIO_PINS(13); 126 DECLARE_MSM_GPIO_PINS(14); 127 DECLARE_MSM_GPIO_PINS(15); 128 DECLARE_MSM_GPIO_PINS(16); 129 DECLARE_MSM_GPIO_PINS(17); 130 DECLARE_MSM_GPIO_PINS(18); 131 DECLARE_MSM_GPIO_PINS(19); 132 DECLARE_MSM_GPIO_PINS(20); 133 DECLARE_MSM_GPIO_PINS(21); 134 DECLARE_MSM_GPIO_PINS(22); 135 DECLARE_MSM_GPIO_PINS(23); 136 DECLARE_MSM_GPIO_PINS(24); 137 DECLARE_MSM_GPIO_PINS(25); 138 DECLARE_MSM_GPIO_PINS(26); 139 DECLARE_MSM_GPIO_PINS(27); 140 DECLARE_MSM_GPIO_PINS(28); 141 DECLARE_MSM_GPIO_PINS(29); 142 DECLARE_MSM_GPIO_PINS(30); 143 DECLARE_MSM_GPIO_PINS(31); 144 DECLARE_MSM_GPIO_PINS(32); 145 DECLARE_MSM_GPIO_PINS(33); 146 DECLARE_MSM_GPIO_PINS(34); 147 DECLARE_MSM_GPIO_PINS(35); 148 DECLARE_MSM_GPIO_PINS(36); 149 DECLARE_MSM_GPIO_PINS(37); 150 DECLARE_MSM_GPIO_PINS(38); 151 DECLARE_MSM_GPIO_PINS(39); 152 DECLARE_MSM_GPIO_PINS(40); 153 DECLARE_MSM_GPIO_PINS(41); 154 DECLARE_MSM_GPIO_PINS(42); 155 DECLARE_MSM_GPIO_PINS(43); 156 DECLARE_MSM_GPIO_PINS(44); 157 DECLARE_MSM_GPIO_PINS(45); 158 DECLARE_MSM_GPIO_PINS(46); 159 DECLARE_MSM_GPIO_PINS(47); 160 DECLARE_MSM_GPIO_PINS(48); 161 DECLARE_MSM_GPIO_PINS(49); 162 DECLARE_MSM_GPIO_PINS(50); 163 DECLARE_MSM_GPIO_PINS(51); 164 DECLARE_MSM_GPIO_PINS(52); 165 DECLARE_MSM_GPIO_PINS(53); 166 DECLARE_MSM_GPIO_PINS(54); 167 DECLARE_MSM_GPIO_PINS(55); 168 DECLARE_MSM_GPIO_PINS(56); 169 DECLARE_MSM_GPIO_PINS(57); 170 DECLARE_MSM_GPIO_PINS(58); 171 DECLARE_MSM_GPIO_PINS(59); 172 DECLARE_MSM_GPIO_PINS(60); 173 DECLARE_MSM_GPIO_PINS(61); 174 DECLARE_MSM_GPIO_PINS(62); 175 DECLARE_MSM_GPIO_PINS(63); 176 DECLARE_MSM_GPIO_PINS(64); 177 DECLARE_MSM_GPIO_PINS(65); 178 DECLARE_MSM_GPIO_PINS(66); 179 DECLARE_MSM_GPIO_PINS(67); 180 DECLARE_MSM_GPIO_PINS(68); 181 DECLARE_MSM_GPIO_PINS(69); 182 DECLARE_MSM_GPIO_PINS(70); 183 DECLARE_MSM_GPIO_PINS(71); 184 DECLARE_MSM_GPIO_PINS(72); 185 DECLARE_MSM_GPIO_PINS(73); 186 DECLARE_MSM_GPIO_PINS(74); 187 DECLARE_MSM_GPIO_PINS(75); 188 DECLARE_MSM_GPIO_PINS(76); 189 DECLARE_MSM_GPIO_PINS(77); 190 DECLARE_MSM_GPIO_PINS(78); 191 DECLARE_MSM_GPIO_PINS(79); 192 193 static const unsigned int sdc1_clk_pins[] = { 80 }; 194 static const unsigned int sdc1_cmd_pins[] = { 81 }; 195 static const unsigned int sdc1_data_pins[] = { 82 }; 196 static const unsigned int sdc2_clk_pins[] = { 83 }; 197 static const unsigned int sdc2_cmd_pins[] = { 84 }; 198 static const unsigned int sdc2_data_pins[] = { 85 }; 199 static const unsigned int qdsd_clk_pins[] = { 86 }; 200 static const unsigned int qdsd_cmd_pins[] = { 87 }; 201 static const unsigned int qdsd_data0_pins[] = { 88 }; 202 static const unsigned int qdsd_data1_pins[] = { 89 }; 203 static const unsigned int qdsd_data2_pins[] = { 90 }; 204 static const unsigned int qdsd_data3_pins[] = { 91 }; 205 206 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ 207 { \ 208 .grp = PINCTRL_PINGROUP("gpio" #id, \ 209 gpio##id##_pins, \ 210 ARRAY_SIZE(gpio##id##_pins)), \ 211 .funcs = (int[]){ \ 212 msm_mux_gpio, \ 213 msm_mux_##f1, \ 214 msm_mux_##f2, \ 215 msm_mux_##f3, \ 216 msm_mux_##f4, \ 217 msm_mux_##f5, \ 218 msm_mux_##f6, \ 219 msm_mux_##f7, \ 220 msm_mux_##f8, \ 221 msm_mux_##f9 \ 222 }, \ 223 .nfuncs = 10, \ 224 .ctl_reg = 0x1000 * id, \ 225 .io_reg = 0x4 + 0x1000 * id, \ 226 .intr_cfg_reg = 0x8 + 0x1000 * id, \ 227 .intr_status_reg = 0xc + 0x1000 * id, \ 228 .intr_target_reg = 0x8 + 0x1000 * id, \ 229 .mux_bit = 2, \ 230 .pull_bit = 0, \ 231 .drv_bit = 6, \ 232 .oe_bit = 9, \ 233 .in_bit = 0, \ 234 .out_bit = 1, \ 235 .intr_enable_bit = 0, \ 236 .intr_status_bit = 0, \ 237 .intr_target_bit = 5, \ 238 .intr_target_kpss_val = 4, \ 239 .intr_raw_status_bit = 4, \ 240 .intr_polarity_bit = 1, \ 241 .intr_detection_bit = 2, \ 242 .intr_detection_width = 2, \ 243 } 244 245 #define SDC_PINGROUP(pg_name, ctl, pull, drv) \ 246 { \ 247 .grp = PINCTRL_PINGROUP(#pg_name, \ 248 pg_name##_pins, \ 249 ARRAY_SIZE(pg_name##_pins)), \ 250 .ctl_reg = ctl, \ 251 .io_reg = 0, \ 252 .intr_cfg_reg = 0, \ 253 .intr_status_reg = 0, \ 254 .intr_target_reg = 0, \ 255 .mux_bit = -1, \ 256 .pull_bit = pull, \ 257 .drv_bit = drv, \ 258 .oe_bit = -1, \ 259 .in_bit = -1, \ 260 .out_bit = -1, \ 261 .intr_enable_bit = -1, \ 262 .intr_status_bit = -1, \ 263 .intr_target_bit = -1, \ 264 .intr_target_kpss_val = -1, \ 265 .intr_raw_status_bit = -1, \ 266 .intr_polarity_bit = -1, \ 267 .intr_detection_bit = -1, \ 268 .intr_detection_width = -1, \ 269 } 270 271 enum mdm9607_functions { 272 msm_mux_adsp_ext, 273 msm_mux_atest_bbrx0, 274 msm_mux_atest_bbrx1, 275 msm_mux_atest_char, 276 msm_mux_atest_char0, 277 msm_mux_atest_char1, 278 msm_mux_atest_char2, 279 msm_mux_atest_char3, 280 msm_mux_atest_combodac_to_gpio_native, 281 msm_mux_atest_gpsadc_dtest0_native, 282 msm_mux_atest_gpsadc_dtest1_native, 283 msm_mux_atest_tsens, 284 msm_mux_backlight_en_b, 285 msm_mux_bimc_dte0, 286 msm_mux_bimc_dte1, 287 msm_mux_blsp1_spi, 288 msm_mux_blsp2_spi, 289 msm_mux_blsp3_spi, 290 msm_mux_blsp_i2c1, 291 msm_mux_blsp_i2c2, 292 msm_mux_blsp_i2c3, 293 msm_mux_blsp_i2c4, 294 msm_mux_blsp_i2c5, 295 msm_mux_blsp_i2c6, 296 msm_mux_blsp_spi1, 297 msm_mux_blsp_spi2, 298 msm_mux_blsp_spi3, 299 msm_mux_blsp_spi4, 300 msm_mux_blsp_spi5, 301 msm_mux_blsp_spi6, 302 msm_mux_blsp_uart1, 303 msm_mux_blsp_uart2, 304 msm_mux_blsp_uart3, 305 msm_mux_blsp_uart4, 306 msm_mux_blsp_uart5, 307 msm_mux_blsp_uart6, 308 msm_mux_blsp_uim1, 309 msm_mux_blsp_uim2, 310 msm_mux_codec_int, 311 msm_mux_codec_rst, 312 msm_mux_coex_uart, 313 msm_mux_cri_trng, 314 msm_mux_cri_trng0, 315 msm_mux_cri_trng1, 316 msm_mux_dbg_out, 317 msm_mux_ebi0_wrcdc, 318 msm_mux_ebi2_a, 319 msm_mux_ebi2_a_d_8_b, 320 msm_mux_ebi2_lcd, 321 msm_mux_ebi2_lcd_cs_n_b, 322 msm_mux_ebi2_lcd_te_b, 323 msm_mux_eth_irq, 324 msm_mux_eth_rst, 325 msm_mux_gcc_gp1_clk_a, 326 msm_mux_gcc_gp1_clk_b, 327 msm_mux_gcc_gp2_clk_a, 328 msm_mux_gcc_gp2_clk_b, 329 msm_mux_gcc_gp3_clk_a, 330 msm_mux_gcc_gp3_clk_b, 331 msm_mux_gcc_plltest, 332 msm_mux_gcc_tlmm, 333 msm_mux_gmac_mdio, 334 msm_mux_gpio, 335 msm_mux_gsm0_tx, 336 msm_mux_lcd_rst, 337 msm_mux_ldo_en, 338 msm_mux_ldo_update, 339 msm_mux_m_voc, 340 msm_mux_modem_tsync, 341 msm_mux_nav_ptp_pps_in_a, 342 msm_mux_nav_ptp_pps_in_b, 343 msm_mux_nav_tsync_out_a, 344 msm_mux_nav_tsync_out_b, 345 msm_mux_pa_indicator, 346 msm_mux_pbs0, 347 msm_mux_pbs1, 348 msm_mux_pbs2, 349 msm_mux_pri_mi2s_data0_a, 350 msm_mux_pri_mi2s_data1_a, 351 msm_mux_pri_mi2s_mclk_a, 352 msm_mux_pri_mi2s_sck_a, 353 msm_mux_pri_mi2s_ws_a, 354 msm_mux_prng_rosc, 355 msm_mux_ptp_pps_out_a, 356 msm_mux_ptp_pps_out_b, 357 msm_mux_pwr_crypto_enabled_a, 358 msm_mux_pwr_crypto_enabled_b, 359 msm_mux_pwr_modem_enabled_a, 360 msm_mux_pwr_modem_enabled_b, 361 msm_mux_pwr_nav_enabled_a, 362 msm_mux_pwr_nav_enabled_b, 363 msm_mux_qdss_cti_trig_in_a0, 364 msm_mux_qdss_cti_trig_in_a1, 365 msm_mux_qdss_cti_trig_in_b0, 366 msm_mux_qdss_cti_trig_in_b1, 367 msm_mux_qdss_cti_trig_out_a0, 368 msm_mux_qdss_cti_trig_out_a1, 369 msm_mux_qdss_cti_trig_out_b0, 370 msm_mux_qdss_cti_trig_out_b1, 371 msm_mux_qdss_traceclk_a, 372 msm_mux_qdss_traceclk_b, 373 msm_mux_qdss_tracectl_a, 374 msm_mux_qdss_tracectl_b, 375 msm_mux_qdss_tracedata_a, 376 msm_mux_qdss_tracedata_b, 377 msm_mux_rcm_marker1, 378 msm_mux_rcm_marker2, 379 msm_mux_sd_write, 380 msm_mux_sec_mi2s, 381 msm_mux_sensor_en, 382 msm_mux_sensor_int2, 383 msm_mux_sensor_int3, 384 msm_mux_sensor_rst, 385 msm_mux_ssbi1, 386 msm_mux_ssbi2, 387 msm_mux_touch_rst, 388 msm_mux_ts_int, 389 msm_mux_uim1_clk, 390 msm_mux_uim1_data, 391 msm_mux_uim1_present, 392 msm_mux_uim1_reset, 393 msm_mux_uim2_clk, 394 msm_mux_uim2_data, 395 msm_mux_uim2_present, 396 msm_mux_uim2_reset, 397 msm_mux_uim_batt, 398 msm_mux_wlan_en1, 399 msm_mux__, 400 }; 401 402 static const char * const gpio_groups[] = { 403 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", 404 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14", 405 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21", 406 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", 407 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35", 408 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42", 409 "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49", 410 "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56", 411 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63", 412 "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70", 413 "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77", 414 "gpio78", "gpio79", 415 }; 416 static const char * const blsp_spi3_groups[] = { 417 "gpio0", "gpio1", "gpio2", "gpio3", 418 }; 419 static const char * const blsp_uart3_groups[] = { 420 "gpio0", "gpio1", "gpio2", "gpio3", 421 }; 422 static const char * const qdss_tracedata_a_groups[] = { 423 "gpio0", "gpio1", "gpio4", "gpio5", "gpio20", "gpio21", "gpio22", 424 "gpio23", "gpio24", "gpio25", "gpio26", "gpio75", "gpio76", "gpio77", 425 "gpio78", "gpio79", 426 }; 427 static const char * const bimc_dte1_groups[] = { 428 "gpio1", "gpio24", 429 }; 430 static const char * const blsp_i2c3_groups[] = { 431 "gpio2", "gpio3", 432 }; 433 static const char * const qdss_traceclk_a_groups[] = { 434 "gpio2", 435 }; 436 static const char * const bimc_dte0_groups[] = { 437 "gpio2", "gpio15", 438 }; 439 static const char * const qdss_cti_trig_in_a1_groups[] = { 440 "gpio3", 441 }; 442 static const char * const blsp_spi2_groups[] = { 443 "gpio4", "gpio5", "gpio6", "gpio7", 444 }; 445 static const char * const blsp_uart2_groups[] = { 446 "gpio4", "gpio5", "gpio6", "gpio7", 447 }; 448 static const char * const blsp_uim2_groups[] = { 449 "gpio4", "gpio5", 450 }; 451 static const char * const blsp_i2c2_groups[] = { 452 "gpio6", "gpio7", 453 }; 454 static const char * const qdss_tracectl_a_groups[] = { 455 "gpio6", 456 }; 457 static const char * const sensor_int2_groups[] = { 458 "gpio8", 459 }; 460 static const char * const blsp_spi5_groups[] = { 461 "gpio8", "gpio9", "gpio10", "gpio11", 462 }; 463 static const char * const blsp_uart5_groups[] = { 464 "gpio8", "gpio9", "gpio10", "gpio11", 465 }; 466 static const char * const ebi2_lcd_groups[] = { 467 "gpio8", "gpio11", "gpio74", "gpio78", 468 }; 469 static const char * const m_voc_groups[] = { 470 "gpio8", "gpio78", 471 }; 472 static const char * const sensor_int3_groups[] = { 473 "gpio9", 474 }; 475 static const char * const sensor_en_groups[] = { 476 "gpio10", 477 }; 478 static const char * const blsp_i2c5_groups[] = { 479 "gpio10", "gpio11", 480 }; 481 static const char * const ebi2_a_groups[] = { 482 "gpio10", 483 }; 484 static const char * const qdss_tracedata_b_groups[] = { 485 "gpio10", "gpio39", "gpio40", "gpio41", "gpio42", "gpio43", "gpio46", 486 "gpio47", "gpio48", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", 487 "gpio58", "gpio59", 488 }; 489 static const char * const sensor_rst_groups[] = { 490 "gpio11", 491 }; 492 static const char * const blsp2_spi_groups[] = { 493 "gpio11", "gpio13", "gpio77", 494 }; 495 static const char * const blsp_spi1_groups[] = { 496 "gpio12", "gpio13", "gpio14", "gpio15", 497 }; 498 static const char * const blsp_uart1_groups[] = { 499 "gpio12", "gpio13", "gpio14", "gpio15", 500 }; 501 static const char * const blsp_uim1_groups[] = { 502 "gpio12", "gpio13", 503 }; 504 static const char * const blsp3_spi_groups[] = { 505 "gpio12", "gpio26", "gpio76", 506 }; 507 static const char * const gcc_gp2_clk_b_groups[] = { 508 "gpio12", 509 }; 510 static const char * const gcc_gp3_clk_b_groups[] = { 511 "gpio13", 512 }; 513 static const char * const blsp_i2c1_groups[] = { 514 "gpio14", "gpio15", 515 }; 516 static const char * const gcc_gp1_clk_b_groups[] = { 517 "gpio14", 518 }; 519 static const char * const blsp_spi4_groups[] = { 520 "gpio16", "gpio17", "gpio18", "gpio19", 521 }; 522 static const char * const blsp_uart4_groups[] = { 523 "gpio16", "gpio17", "gpio18", "gpio19", 524 }; 525 static const char * const rcm_marker1_groups[] = { 526 "gpio18", 527 }; 528 static const char * const blsp_i2c4_groups[] = { 529 "gpio18", "gpio19", 530 }; 531 static const char * const qdss_cti_trig_out_a1_groups[] = { 532 "gpio18", 533 }; 534 static const char * const rcm_marker2_groups[] = { 535 "gpio19", 536 }; 537 static const char * const qdss_cti_trig_out_a0_groups[] = { 538 "gpio19", 539 }; 540 static const char * const blsp_spi6_groups[] = { 541 "gpio20", "gpio21", "gpio22", "gpio23", 542 }; 543 static const char * const blsp_uart6_groups[] = { 544 "gpio20", "gpio21", "gpio22", "gpio23", 545 }; 546 static const char * const pri_mi2s_ws_a_groups[] = { 547 "gpio20", 548 }; 549 static const char * const ebi2_lcd_te_b_groups[] = { 550 "gpio20", 551 }; 552 static const char * const blsp1_spi_groups[] = { 553 "gpio20", "gpio21", "gpio78", 554 }; 555 static const char * const backlight_en_b_groups[] = { 556 "gpio21", 557 }; 558 static const char * const pri_mi2s_data0_a_groups[] = { 559 "gpio21", 560 }; 561 static const char * const pri_mi2s_data1_a_groups[] = { 562 "gpio22", 563 }; 564 static const char * const blsp_i2c6_groups[] = { 565 "gpio22", "gpio23", 566 }; 567 static const char * const ebi2_a_d_8_b_groups[] = { 568 "gpio22", 569 }; 570 static const char * const pri_mi2s_sck_a_groups[] = { 571 "gpio23", 572 }; 573 static const char * const ebi2_lcd_cs_n_b_groups[] = { 574 "gpio23", 575 }; 576 static const char * const touch_rst_groups[] = { 577 "gpio24", 578 }; 579 static const char * const pri_mi2s_mclk_a_groups[] = { 580 "gpio24", 581 }; 582 static const char * const pwr_nav_enabled_a_groups[] = { 583 "gpio24", 584 }; 585 static const char * const ts_int_groups[] = { 586 "gpio25", 587 }; 588 static const char * const sd_write_groups[] = { 589 "gpio25", 590 }; 591 static const char * const pwr_crypto_enabled_a_groups[] = { 592 "gpio25", 593 }; 594 static const char * const codec_rst_groups[] = { 595 "gpio26", 596 }; 597 static const char * const adsp_ext_groups[] = { 598 "gpio26", 599 }; 600 static const char * const atest_combodac_to_gpio_native_groups[] = { 601 "gpio26", "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32", 602 "gpio33", "gpio34", "gpio35", "gpio41", "gpio45", "gpio49", "gpio50", 603 "gpio51", "gpio52", "gpio54", "gpio55", "gpio57", "gpio59", 604 }; 605 static const char * const uim2_data_groups[] = { 606 "gpio27", 607 }; 608 static const char * const gmac_mdio_groups[] = { 609 "gpio27", "gpio28", 610 }; 611 static const char * const gcc_gp1_clk_a_groups[] = { 612 "gpio27", 613 }; 614 static const char * const uim2_clk_groups[] = { 615 "gpio28", 616 }; 617 static const char * const gcc_gp2_clk_a_groups[] = { 618 "gpio28", 619 }; 620 static const char * const eth_irq_groups[] = { 621 "gpio29", 622 }; 623 static const char * const uim2_reset_groups[] = { 624 "gpio29", 625 }; 626 static const char * const gcc_gp3_clk_a_groups[] = { 627 "gpio29", 628 }; 629 static const char * const eth_rst_groups[] = { 630 "gpio30", 631 }; 632 static const char * const uim2_present_groups[] = { 633 "gpio30", 634 }; 635 static const char * const prng_rosc_groups[] = { 636 "gpio30", 637 }; 638 static const char * const uim1_data_groups[] = { 639 "gpio31", 640 }; 641 static const char * const uim1_clk_groups[] = { 642 "gpio32", 643 }; 644 static const char * const uim1_reset_groups[] = { 645 "gpio33", 646 }; 647 static const char * const uim1_present_groups[] = { 648 "gpio34", 649 }; 650 static const char * const gcc_plltest_groups[] = { 651 "gpio34", "gpio35", 652 }; 653 static const char * const uim_batt_groups[] = { 654 "gpio35", 655 }; 656 static const char * const coex_uart_groups[] = { 657 "gpio36", "gpio37", 658 }; 659 static const char * const codec_int_groups[] = { 660 "gpio38", 661 }; 662 static const char * const qdss_cti_trig_in_a0_groups[] = { 663 "gpio38", 664 }; 665 static const char * const atest_bbrx1_groups[] = { 666 "gpio39", 667 }; 668 static const char * const cri_trng0_groups[] = { 669 "gpio40", 670 }; 671 static const char * const atest_bbrx0_groups[] = { 672 "gpio40", 673 }; 674 static const char * const cri_trng_groups[] = { 675 "gpio42", 676 }; 677 static const char * const qdss_cti_trig_in_b0_groups[] = { 678 "gpio44", 679 }; 680 static const char * const atest_gpsadc_dtest0_native_groups[] = { 681 "gpio44", 682 }; 683 static const char * const qdss_cti_trig_out_b0_groups[] = { 684 "gpio45", 685 }; 686 static const char * const qdss_tracectl_b_groups[] = { 687 "gpio49", 688 }; 689 static const char * const qdss_traceclk_b_groups[] = { 690 "gpio50", 691 }; 692 static const char * const pa_indicator_groups[] = { 693 "gpio51", 694 }; 695 static const char * const modem_tsync_groups[] = { 696 "gpio53", 697 }; 698 static const char * const nav_tsync_out_a_groups[] = { 699 "gpio53", 700 }; 701 static const char * const nav_ptp_pps_in_a_groups[] = { 702 "gpio53", 703 }; 704 static const char * const ptp_pps_out_a_groups[] = { 705 "gpio53", 706 }; 707 static const char * const gsm0_tx_groups[] = { 708 "gpio55", 709 }; 710 static const char * const qdss_cti_trig_in_b1_groups[] = { 711 "gpio56", 712 }; 713 static const char * const cri_trng1_groups[] = { 714 "gpio57", 715 }; 716 static const char * const qdss_cti_trig_out_b1_groups[] = { 717 "gpio57", 718 }; 719 static const char * const ssbi1_groups[] = { 720 "gpio58", 721 }; 722 static const char * const atest_gpsadc_dtest1_native_groups[] = { 723 "gpio58", 724 }; 725 static const char * const ssbi2_groups[] = { 726 "gpio59", 727 }; 728 static const char * const atest_char3_groups[] = { 729 "gpio60", 730 }; 731 static const char * const atest_char2_groups[] = { 732 "gpio61", 733 }; 734 static const char * const atest_char1_groups[] = { 735 "gpio62", 736 }; 737 static const char * const atest_char0_groups[] = { 738 "gpio63", 739 }; 740 static const char * const atest_char_groups[] = { 741 "gpio64", 742 }; 743 static const char * const ebi0_wrcdc_groups[] = { 744 "gpio70", 745 }; 746 static const char * const ldo_update_groups[] = { 747 "gpio72", 748 }; 749 static const char * const gcc_tlmm_groups[] = { 750 "gpio72", 751 }; 752 static const char * const ldo_en_groups[] = { 753 "gpio73", 754 }; 755 static const char * const dbg_out_groups[] = { 756 "gpio73", 757 }; 758 static const char * const atest_tsens_groups[] = { 759 "gpio73", 760 }; 761 static const char * const lcd_rst_groups[] = { 762 "gpio74", 763 }; 764 static const char * const wlan_en1_groups[] = { 765 "gpio75", 766 }; 767 static const char * const nav_tsync_out_b_groups[] = { 768 "gpio75", 769 }; 770 static const char * const nav_ptp_pps_in_b_groups[] = { 771 "gpio75", 772 }; 773 static const char * const ptp_pps_out_b_groups[] = { 774 "gpio75", 775 }; 776 static const char * const pbs0_groups[] = { 777 "gpio76", 778 }; 779 static const char * const sec_mi2s_groups[] = { 780 "gpio76", "gpio77", "gpio78", "gpio79", 781 }; 782 static const char * const pwr_modem_enabled_a_groups[] = { 783 "gpio76", 784 }; 785 static const char * const pbs1_groups[] = { 786 "gpio77", 787 }; 788 static const char * const pwr_modem_enabled_b_groups[] = { 789 "gpio77", 790 }; 791 static const char * const pbs2_groups[] = { 792 "gpio78", 793 }; 794 static const char * const pwr_nav_enabled_b_groups[] = { 795 "gpio78", 796 }; 797 static const char * const pwr_crypto_enabled_b_groups[] = { 798 "gpio79", 799 }; 800 801 static const struct pinfunction mdm9607_functions[] = { 802 MSM_PIN_FUNCTION(adsp_ext), 803 MSM_PIN_FUNCTION(atest_bbrx0), 804 MSM_PIN_FUNCTION(atest_bbrx1), 805 MSM_PIN_FUNCTION(atest_char), 806 MSM_PIN_FUNCTION(atest_char0), 807 MSM_PIN_FUNCTION(atest_char1), 808 MSM_PIN_FUNCTION(atest_char2), 809 MSM_PIN_FUNCTION(atest_char3), 810 MSM_PIN_FUNCTION(atest_combodac_to_gpio_native), 811 MSM_PIN_FUNCTION(atest_gpsadc_dtest0_native), 812 MSM_PIN_FUNCTION(atest_gpsadc_dtest1_native), 813 MSM_PIN_FUNCTION(atest_tsens), 814 MSM_PIN_FUNCTION(backlight_en_b), 815 MSM_PIN_FUNCTION(bimc_dte0), 816 MSM_PIN_FUNCTION(bimc_dte1), 817 MSM_PIN_FUNCTION(blsp1_spi), 818 MSM_PIN_FUNCTION(blsp2_spi), 819 MSM_PIN_FUNCTION(blsp3_spi), 820 MSM_PIN_FUNCTION(blsp_i2c1), 821 MSM_PIN_FUNCTION(blsp_i2c2), 822 MSM_PIN_FUNCTION(blsp_i2c3), 823 MSM_PIN_FUNCTION(blsp_i2c4), 824 MSM_PIN_FUNCTION(blsp_i2c5), 825 MSM_PIN_FUNCTION(blsp_i2c6), 826 MSM_PIN_FUNCTION(blsp_spi1), 827 MSM_PIN_FUNCTION(blsp_spi2), 828 MSM_PIN_FUNCTION(blsp_spi3), 829 MSM_PIN_FUNCTION(blsp_spi4), 830 MSM_PIN_FUNCTION(blsp_spi5), 831 MSM_PIN_FUNCTION(blsp_spi6), 832 MSM_PIN_FUNCTION(blsp_uart1), 833 MSM_PIN_FUNCTION(blsp_uart2), 834 MSM_PIN_FUNCTION(blsp_uart3), 835 MSM_PIN_FUNCTION(blsp_uart4), 836 MSM_PIN_FUNCTION(blsp_uart5), 837 MSM_PIN_FUNCTION(blsp_uart6), 838 MSM_PIN_FUNCTION(blsp_uim1), 839 MSM_PIN_FUNCTION(blsp_uim2), 840 MSM_PIN_FUNCTION(codec_int), 841 MSM_PIN_FUNCTION(codec_rst), 842 MSM_PIN_FUNCTION(coex_uart), 843 MSM_PIN_FUNCTION(cri_trng), 844 MSM_PIN_FUNCTION(cri_trng0), 845 MSM_PIN_FUNCTION(cri_trng1), 846 MSM_PIN_FUNCTION(dbg_out), 847 MSM_PIN_FUNCTION(ebi0_wrcdc), 848 MSM_PIN_FUNCTION(ebi2_a), 849 MSM_PIN_FUNCTION(ebi2_a_d_8_b), 850 MSM_PIN_FUNCTION(ebi2_lcd), 851 MSM_PIN_FUNCTION(ebi2_lcd_cs_n_b), 852 MSM_PIN_FUNCTION(ebi2_lcd_te_b), 853 MSM_PIN_FUNCTION(eth_irq), 854 MSM_PIN_FUNCTION(eth_rst), 855 MSM_PIN_FUNCTION(gcc_gp1_clk_a), 856 MSM_PIN_FUNCTION(gcc_gp1_clk_b), 857 MSM_PIN_FUNCTION(gcc_gp2_clk_a), 858 MSM_PIN_FUNCTION(gcc_gp2_clk_b), 859 MSM_PIN_FUNCTION(gcc_gp3_clk_a), 860 MSM_PIN_FUNCTION(gcc_gp3_clk_b), 861 MSM_PIN_FUNCTION(gcc_plltest), 862 MSM_PIN_FUNCTION(gcc_tlmm), 863 MSM_PIN_FUNCTION(gmac_mdio), 864 MSM_PIN_FUNCTION(gpio), 865 MSM_PIN_FUNCTION(gsm0_tx), 866 MSM_PIN_FUNCTION(lcd_rst), 867 MSM_PIN_FUNCTION(ldo_en), 868 MSM_PIN_FUNCTION(ldo_update), 869 MSM_PIN_FUNCTION(m_voc), 870 MSM_PIN_FUNCTION(modem_tsync), 871 MSM_PIN_FUNCTION(nav_ptp_pps_in_a), 872 MSM_PIN_FUNCTION(nav_ptp_pps_in_b), 873 MSM_PIN_FUNCTION(nav_tsync_out_a), 874 MSM_PIN_FUNCTION(nav_tsync_out_b), 875 MSM_PIN_FUNCTION(pa_indicator), 876 MSM_PIN_FUNCTION(pbs0), 877 MSM_PIN_FUNCTION(pbs1), 878 MSM_PIN_FUNCTION(pbs2), 879 MSM_PIN_FUNCTION(pri_mi2s_data0_a), 880 MSM_PIN_FUNCTION(pri_mi2s_data1_a), 881 MSM_PIN_FUNCTION(pri_mi2s_mclk_a), 882 MSM_PIN_FUNCTION(pri_mi2s_sck_a), 883 MSM_PIN_FUNCTION(pri_mi2s_ws_a), 884 MSM_PIN_FUNCTION(prng_rosc), 885 MSM_PIN_FUNCTION(ptp_pps_out_a), 886 MSM_PIN_FUNCTION(ptp_pps_out_b), 887 MSM_PIN_FUNCTION(pwr_crypto_enabled_a), 888 MSM_PIN_FUNCTION(pwr_crypto_enabled_b), 889 MSM_PIN_FUNCTION(pwr_modem_enabled_a), 890 MSM_PIN_FUNCTION(pwr_modem_enabled_b), 891 MSM_PIN_FUNCTION(pwr_nav_enabled_a), 892 MSM_PIN_FUNCTION(pwr_nav_enabled_b), 893 MSM_PIN_FUNCTION(qdss_cti_trig_in_a0), 894 MSM_PIN_FUNCTION(qdss_cti_trig_in_a1), 895 MSM_PIN_FUNCTION(qdss_cti_trig_in_b0), 896 MSM_PIN_FUNCTION(qdss_cti_trig_in_b1), 897 MSM_PIN_FUNCTION(qdss_cti_trig_out_a0), 898 MSM_PIN_FUNCTION(qdss_cti_trig_out_a1), 899 MSM_PIN_FUNCTION(qdss_cti_trig_out_b0), 900 MSM_PIN_FUNCTION(qdss_cti_trig_out_b1), 901 MSM_PIN_FUNCTION(qdss_traceclk_a), 902 MSM_PIN_FUNCTION(qdss_traceclk_b), 903 MSM_PIN_FUNCTION(qdss_tracectl_a), 904 MSM_PIN_FUNCTION(qdss_tracectl_b), 905 MSM_PIN_FUNCTION(qdss_tracedata_a), 906 MSM_PIN_FUNCTION(qdss_tracedata_b), 907 MSM_PIN_FUNCTION(rcm_marker1), 908 MSM_PIN_FUNCTION(rcm_marker2), 909 MSM_PIN_FUNCTION(sd_write), 910 MSM_PIN_FUNCTION(sec_mi2s), 911 MSM_PIN_FUNCTION(sensor_en), 912 MSM_PIN_FUNCTION(sensor_int2), 913 MSM_PIN_FUNCTION(sensor_int3), 914 MSM_PIN_FUNCTION(sensor_rst), 915 MSM_PIN_FUNCTION(ssbi1), 916 MSM_PIN_FUNCTION(ssbi2), 917 MSM_PIN_FUNCTION(touch_rst), 918 MSM_PIN_FUNCTION(ts_int), 919 MSM_PIN_FUNCTION(uim1_clk), 920 MSM_PIN_FUNCTION(uim1_data), 921 MSM_PIN_FUNCTION(uim1_present), 922 MSM_PIN_FUNCTION(uim1_reset), 923 MSM_PIN_FUNCTION(uim2_clk), 924 MSM_PIN_FUNCTION(uim2_data), 925 MSM_PIN_FUNCTION(uim2_present), 926 MSM_PIN_FUNCTION(uim2_reset), 927 MSM_PIN_FUNCTION(uim_batt), 928 MSM_PIN_FUNCTION(wlan_en1) 929 }; 930 931 static const struct msm_pingroup mdm9607_groups[] = { 932 PINGROUP(0, blsp_uart3, blsp_spi3, _, _, _, _, _, qdss_tracedata_a, _), 933 PINGROUP(1, blsp_uart3, blsp_spi3, _, _, _, _, _, qdss_tracedata_a, bimc_dte1), 934 PINGROUP(2, blsp_uart3, blsp_i2c3, blsp_spi3, _, _, _, _, _, qdss_traceclk_a), 935 PINGROUP(3, blsp_uart3, blsp_i2c3, blsp_spi3, _, _, _, _, _, _), 936 PINGROUP(4, blsp_spi2, blsp_uart2, blsp_uim2, _, _, _, _, qdss_tracedata_a, _), 937 PINGROUP(5, blsp_spi2, blsp_uart2, blsp_uim2, _, _, _, _, qdss_tracedata_a, _), 938 PINGROUP(6, blsp_spi2, blsp_uart2, blsp_i2c2, _, _, _, _, _, _), 939 PINGROUP(7, blsp_spi2, blsp_uart2, blsp_i2c2, _, _, _, _, _, _), 940 PINGROUP(8, blsp_spi5, blsp_uart5, ebi2_lcd, m_voc, _, _, _, _, _), 941 PINGROUP(9, blsp_spi5, blsp_uart5, _, _, _, _, _, _, _), 942 PINGROUP(10, blsp_spi5, blsp_i2c5, blsp_uart5, ebi2_a, _, _, qdss_tracedata_b, _, _), 943 PINGROUP(11, blsp_spi5, blsp_i2c5, blsp_uart5, blsp2_spi, ebi2_lcd, _, _, _, _), 944 PINGROUP(12, blsp_spi1, blsp_uart1, blsp_uim1, blsp3_spi, gcc_gp2_clk_b, _, _, _, _), 945 PINGROUP(13, blsp_spi1, blsp_uart1, blsp_uim1, blsp2_spi, gcc_gp3_clk_b, _, _, _, _), 946 PINGROUP(14, blsp_spi1, blsp_uart1, blsp_i2c1, gcc_gp1_clk_b, _, _, _, _, _), 947 PINGROUP(15, blsp_spi1, blsp_uart1, blsp_i2c1, _, _, _, _, _, _), 948 PINGROUP(16, blsp_spi4, blsp_uart4, _, _, _, _, _, _, _), 949 PINGROUP(17, blsp_spi4, blsp_uart4, _, _, _, _, _, _, _), 950 PINGROUP(18, blsp_spi4, blsp_uart4, blsp_i2c4, _, _, _, _, _, _), 951 PINGROUP(19, blsp_spi4, blsp_uart4, blsp_i2c4, _, _, _, _, _, _), 952 PINGROUP(20, blsp_spi6, blsp_uart6, pri_mi2s_ws_a, ebi2_lcd_te_b, blsp1_spi, _, _, _, 953 qdss_tracedata_a), 954 PINGROUP(21, blsp_spi6, blsp_uart6, pri_mi2s_data0_a, blsp1_spi, _, _, _, _, _), 955 PINGROUP(22, blsp_spi6, blsp_uart6, pri_mi2s_data1_a, blsp_i2c6, ebi2_a_d_8_b, _, _, _, _), 956 PINGROUP(23, blsp_spi6, blsp_uart6, pri_mi2s_sck_a, blsp_i2c6, ebi2_lcd_cs_n_b, _, _, _, _), 957 PINGROUP(24, pri_mi2s_mclk_a, _, pwr_nav_enabled_a, _, _, _, _, qdss_tracedata_a, 958 bimc_dte1), 959 PINGROUP(25, sd_write, _, pwr_crypto_enabled_a, _, _, _, _, qdss_tracedata_a, _), 960 PINGROUP(26, blsp3_spi, adsp_ext, _, qdss_tracedata_a, _, atest_combodac_to_gpio_native, _, 961 _, _), 962 PINGROUP(27, uim2_data, gmac_mdio, gcc_gp1_clk_a, _, _, atest_combodac_to_gpio_native, _, _, 963 _), 964 PINGROUP(28, uim2_clk, gmac_mdio, gcc_gp2_clk_a, _, _, atest_combodac_to_gpio_native, _, _, 965 _), 966 PINGROUP(29, uim2_reset, gcc_gp3_clk_a, _, _, atest_combodac_to_gpio_native, _, _, _, _), 967 PINGROUP(30, uim2_present, prng_rosc, _, _, atest_combodac_to_gpio_native, _, _, _, _), 968 PINGROUP(31, uim1_data, _, _, atest_combodac_to_gpio_native, _, _, _, _, _), 969 PINGROUP(32, uim1_clk, _, _, atest_combodac_to_gpio_native, _, _, _, _, _), 970 PINGROUP(33, uim1_reset, _, _, atest_combodac_to_gpio_native, _, _, _, _, _), 971 PINGROUP(34, uim1_present, gcc_plltest, _, _, atest_combodac_to_gpio_native, _, _, _, _), 972 PINGROUP(35, uim_batt, gcc_plltest, _, atest_combodac_to_gpio_native, _, _, _, _, _), 973 PINGROUP(36, coex_uart, _, _, _, _, _, _, _, _), 974 PINGROUP(37, coex_uart, _, _, _, _, _, _, _, _), 975 PINGROUP(38, _, _, _, qdss_cti_trig_in_a0, _, _, _, _, _), 976 PINGROUP(39, _, _, _, qdss_tracedata_b, _, atest_bbrx1, _, _, _), 977 PINGROUP(40, _, cri_trng0, _, _, _, _, qdss_tracedata_b, _, atest_bbrx0), 978 PINGROUP(41, _, _, _, _, _, qdss_tracedata_b, _, atest_combodac_to_gpio_native, _), 979 PINGROUP(42, _, cri_trng, _, _, qdss_tracedata_b, _, _, _, _), 980 PINGROUP(43, _, _, _, _, qdss_tracedata_b, _, _, _, _), 981 PINGROUP(44, _, _, qdss_cti_trig_in_b0, _, atest_gpsadc_dtest0_native, _, _, _, _), 982 PINGROUP(45, _, _, qdss_cti_trig_out_b0, _, atest_combodac_to_gpio_native, _, _, _, _), 983 PINGROUP(46, _, _, qdss_tracedata_b, _, _, _, _, _, _), 984 PINGROUP(47, _, _, qdss_tracedata_b, _, _, _, _, _, _), 985 PINGROUP(48, _, _, qdss_tracedata_b, _, _, _, _, _, _), 986 PINGROUP(49, _, _, qdss_tracectl_b, _, atest_combodac_to_gpio_native, _, _, _, _), 987 PINGROUP(50, _, _, qdss_traceclk_b, _, atest_combodac_to_gpio_native, _, _, _, _), 988 PINGROUP(51, _, pa_indicator, _, qdss_tracedata_b, _, atest_combodac_to_gpio_native, _, _, 989 _), 990 PINGROUP(52, _, _, _, qdss_tracedata_b, _, atest_combodac_to_gpio_native, _, _, _), 991 PINGROUP(53, _, modem_tsync, nav_tsync_out_a, nav_ptp_pps_in_a, ptp_pps_out_a, 992 qdss_tracedata_b, _, _, _), 993 PINGROUP(54, _, qdss_tracedata_b, _, atest_combodac_to_gpio_native, _, _, _, _, _), 994 PINGROUP(55, gsm0_tx, _, qdss_tracedata_b, _, atest_combodac_to_gpio_native, _, _, _, _), 995 PINGROUP(56, _, _, qdss_cti_trig_in_b1, _, _, _, _, _, _), 996 PINGROUP(57, _, cri_trng1, _, qdss_cti_trig_out_b1, _, atest_combodac_to_gpio_native, _, _, 997 _), 998 PINGROUP(58, _, ssbi1, _, qdss_tracedata_b, _, atest_gpsadc_dtest1_native, _, _, _), 999 PINGROUP(59, _, ssbi2, _, qdss_tracedata_b, _, atest_combodac_to_gpio_native, _, _, _), 1000 PINGROUP(60, atest_char3, _, _, _, _, _, _, _, _), 1001 PINGROUP(61, atest_char2, _, _, _, _, _, _, _, _), 1002 PINGROUP(62, atest_char1, _, _, _, _, _, _, _, _), 1003 PINGROUP(63, atest_char0, _, _, _, _, _, _, _, _), 1004 PINGROUP(64, atest_char, _, _, _, _, _, _, _, _), 1005 PINGROUP(65, _, _, _, _, _, _, _, _, _), 1006 PINGROUP(66, _, _, _, _, _, _, _, _, _), 1007 PINGROUP(67, _, _, _, _, _, _, _, _, _), 1008 PINGROUP(68, _, _, _, _, _, _, _, _, _), 1009 PINGROUP(69, _, _, _, _, _, _, _, _, _), 1010 PINGROUP(70, _, _, ebi0_wrcdc, _, _, _, _, _, _), 1011 PINGROUP(71, _, _, _, _, _, _, _, _, _), 1012 PINGROUP(72, ldo_update, _, gcc_tlmm, _, _, _, _, _, _), 1013 PINGROUP(73, ldo_en, dbg_out, _, _, _, atest_tsens, _, _, _), 1014 PINGROUP(74, ebi2_lcd, _, _, _, _, _, _, _, _), 1015 PINGROUP(75, nav_tsync_out_b, nav_ptp_pps_in_b, ptp_pps_out_b, _, qdss_tracedata_a, _, _, _, 1016 _), 1017 PINGROUP(76, pbs0, sec_mi2s, blsp3_spi, pwr_modem_enabled_a, _, qdss_tracedata_a, _, _, _), 1018 PINGROUP(77, pbs1, sec_mi2s, blsp2_spi, pwr_modem_enabled_b, _, qdss_tracedata_a, _, _, _), 1019 PINGROUP(78, pbs2, sec_mi2s, blsp1_spi, ebi2_lcd, m_voc, pwr_nav_enabled_b, _, 1020 qdss_tracedata_a, _), 1021 PINGROUP(79, sec_mi2s, _, pwr_crypto_enabled_b, _, qdss_tracedata_a, _, _, _, _), 1022 SDC_PINGROUP(sdc1_clk, 0x10a000, 13, 6), 1023 SDC_PINGROUP(sdc1_cmd, 0x10a000, 11, 3), 1024 SDC_PINGROUP(sdc1_data, 0x10a000, 9, 0), 1025 SDC_PINGROUP(sdc2_clk, 0x109000, 14, 6), 1026 SDC_PINGROUP(sdc2_cmd, 0x109000, 11, 3), 1027 SDC_PINGROUP(sdc2_data, 0x109000, 9, 0), 1028 SDC_PINGROUP(qdsd_clk, 0x19c000, 3, 0), 1029 SDC_PINGROUP(qdsd_cmd, 0x19c000, 8, 5), 1030 SDC_PINGROUP(qdsd_data0, 0x19c000, 13, 10), 1031 SDC_PINGROUP(qdsd_data1, 0x19c000, 18, 15), 1032 SDC_PINGROUP(qdsd_data2, 0x19c000, 23, 20), 1033 SDC_PINGROUP(qdsd_data3, 0x19c000, 28, 25), 1034 }; 1035 1036 static const struct msm_pinctrl_soc_data mdm9607_pinctrl = { 1037 .pins = mdm9607_pins, 1038 .npins = ARRAY_SIZE(mdm9607_pins), 1039 .functions = mdm9607_functions, 1040 .nfunctions = ARRAY_SIZE(mdm9607_functions), 1041 .groups = mdm9607_groups, 1042 .ngroups = ARRAY_SIZE(mdm9607_groups), 1043 .ngpios = 80, 1044 }; 1045 1046 static int mdm9607_pinctrl_probe(struct platform_device *pdev) 1047 { 1048 return msm_pinctrl_probe(pdev, &mdm9607_pinctrl); 1049 } 1050 1051 static const struct of_device_id mdm9607_pinctrl_of_match[] = { 1052 { .compatible = "qcom,mdm9607-tlmm", }, 1053 { } 1054 }; 1055 1056 static struct platform_driver mdm9607_pinctrl_driver = { 1057 .driver = { 1058 .name = "mdm9607-pinctrl", 1059 .of_match_table = mdm9607_pinctrl_of_match, 1060 }, 1061 .probe = mdm9607_pinctrl_probe, 1062 .remove_new = msm_pinctrl_remove, 1063 }; 1064 1065 static int __init mdm9607_pinctrl_init(void) 1066 { 1067 return platform_driver_register(&mdm9607_pinctrl_driver); 1068 } 1069 arch_initcall(mdm9607_pinctrl_init); 1070 1071 static void __exit mdm9607_pinctrl_exit(void) 1072 { 1073 platform_driver_unregister(&mdm9607_pinctrl_driver); 1074 } 1075 module_exit(mdm9607_pinctrl_exit); 1076 1077 MODULE_DESCRIPTION("Qualcomm mdm9607 pinctrl driver"); 1078 MODULE_LICENSE("GPL v2"); 1079 MODULE_DEVICE_TABLE(of, mdm9607_pinctrl_of_match); 1080