xref: /linux/drivers/pinctrl/qcom/pinctrl-lpass-lpi.h (revision 68a052239fc4b351e961f698b824f7654a346091)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
4  * Copyright (c) 2020 Linaro Ltd.
5  */
6 #ifndef __PINCTRL_LPASS_LPI_H__
7 #define __PINCTRL_LPASS_LPI_H__
8 
9 #include <linux/array_size.h>
10 #include <linux/bits.h>
11 
12 #include "../core.h"
13 
14 struct platform_device;
15 
16 struct pinctrl_pin_desc;
17 
18 #define LPI_SLEW_RATE_CTL_REG	0xa000
19 #define LPI_TLMM_REG_OFFSET		0x1000
20 #define LPI_SLEW_RATE_MAX		0x03
21 #define LPI_SLEW_BITS_SIZE		0x02
22 #define LPI_SLEW_RATE_MASK		GENMASK(1, 0)
23 #define LPI_GPIO_CFG_REG		0x00
24 #define LPI_GPIO_PULL_MASK		GENMASK(1, 0)
25 #define LPI_GPIO_FUNCTION_MASK		GENMASK(5, 2)
26 #define LPI_GPIO_OUT_STRENGTH_MASK	GENMASK(8, 6)
27 #define LPI_GPIO_OE_MASK		BIT(9)
28 #define LPI_GPIO_VALUE_REG		0x04
29 #define LPI_GPIO_VALUE_IN_MASK		BIT(0)
30 #define LPI_GPIO_VALUE_OUT_MASK		BIT(1)
31 
32 #define LPI_GPIO_BIAS_DISABLE		0x0
33 #define LPI_GPIO_PULL_DOWN		0x1
34 #define LPI_GPIO_KEEPER			0x2
35 #define LPI_GPIO_PULL_UP		0x3
36 #define LPI_GPIO_DS_TO_VAL(v)		(v / 2 - 1)
37 #define LPI_NO_SLEW				-1
38 
39 #define LPI_FUNCTION(fname)			                \
40 	[LPI_MUX_##fname] = {		                \
41 		.name = #fname,				\
42 		.groups = fname##_groups,               \
43 		.ngroups = ARRAY_SIZE(fname##_groups),	\
44 	}
45 
46 #define LPI_PINGROUP(id, soff, f1, f2, f3, f4)		\
47 	{						\
48 		.pin = id,				\
49 		.slew_offset = soff,			\
50 		.funcs = (int[]){			\
51 			LPI_MUX_gpio,			\
52 			LPI_MUX_##f1,			\
53 			LPI_MUX_##f2,			\
54 			LPI_MUX_##f3,			\
55 			LPI_MUX_##f4,			\
56 		},					\
57 		.nfuncs = 5,				\
58 		.pin_offset = 0,			\
59 	}
60 
61 #define LPI_PINGROUP_OFFSET(id, soff, f1, f2, f3, f4, poff)	\
62 	{							\
63 		.pin = id,					\
64 		.slew_offset = soff,				\
65 		.funcs = (int[]){				\
66 			LPI_MUX_gpio,				\
67 			LPI_MUX_##f1,				\
68 			LPI_MUX_##f2,				\
69 			LPI_MUX_##f3,				\
70 			LPI_MUX_##f4,				\
71 		},						\
72 		.nfuncs = 5,					\
73 		.pin_offset = poff,				\
74 	}
75 
76 /*
77  * Slew rate control is done in the same register as rest of the
78  * pin configuration.
79  */
80 #define LPI_FLAG_SLEW_RATE_SAME_REG			BIT(0)
81 #define LPI_FLAG_USE_PREDEFINED_PIN_OFFSET		BIT(1)
82 
83 struct lpi_pingroup {
84 	unsigned int pin;
85 	/* Bit offset in slew register for SoundWire pins only */
86 	int slew_offset;
87 	unsigned int *funcs;
88 	unsigned int nfuncs;
89 	unsigned int pin_offset;
90 };
91 
92 struct lpi_function {
93 	const char *name;
94 	const char * const *groups;
95 	unsigned int ngroups;
96 };
97 
98 struct lpi_pinctrl_variant_data {
99 	const struct pinctrl_pin_desc *pins;
100 	int npins;
101 	const struct lpi_pingroup *groups;
102 	int ngroups;
103 	const struct lpi_function *functions;
104 	int nfunctions;
105 	unsigned int flags;
106 };
107 
108 int lpi_pinctrl_probe(struct platform_device *pdev);
109 void lpi_pinctrl_remove(struct platform_device *pdev);
110 
111 #endif /*__PINCTRL_LPASS_LPI_H__*/
112