1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2017, The Linux Foundation. All rights reserved. 4 */ 5 6 #include <linux/module.h> 7 #include <linux/of.h> 8 #include <linux/platform_device.h> 9 10 #include "pinctrl-msm.h" 11 12 #define REG_SIZE 0x1000 13 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ 14 { \ 15 .grp = PINCTRL_PINGROUP("gpio" #id, \ 16 gpio##id##_pins, \ 17 ARRAY_SIZE(gpio##id##_pins)), \ 18 .funcs = (int[]){ \ 19 msm_mux_gpio, /* gpio mode */ \ 20 msm_mux_##f1, \ 21 msm_mux_##f2, \ 22 msm_mux_##f3, \ 23 msm_mux_##f4, \ 24 msm_mux_##f5, \ 25 msm_mux_##f6, \ 26 msm_mux_##f7, \ 27 msm_mux_##f8, \ 28 msm_mux_##f9 \ 29 }, \ 30 .nfuncs = 10, \ 31 .ctl_reg = REG_SIZE * id, \ 32 .io_reg = 0x4 + REG_SIZE * id, \ 33 .intr_cfg_reg = 0x8 + REG_SIZE * id, \ 34 .intr_status_reg = 0xc + REG_SIZE * id, \ 35 .mux_bit = 2, \ 36 .pull_bit = 0, \ 37 .drv_bit = 6, \ 38 .oe_bit = 9, \ 39 .in_bit = 0, \ 40 .out_bit = 1, \ 41 .intr_enable_bit = 0, \ 42 .intr_status_bit = 0, \ 43 .intr_target_bit = 5, \ 44 .intr_target_kpss_val = 3, \ 45 .intr_raw_status_bit = 4, \ 46 .intr_polarity_bit = 1, \ 47 .intr_detection_bit = 2, \ 48 .intr_detection_width = 2, \ 49 } 50 51 static const struct pinctrl_pin_desc ipq8074_pins[] = { 52 PINCTRL_PIN(0, "GPIO_0"), 53 PINCTRL_PIN(1, "GPIO_1"), 54 PINCTRL_PIN(2, "GPIO_2"), 55 PINCTRL_PIN(3, "GPIO_3"), 56 PINCTRL_PIN(4, "GPIO_4"), 57 PINCTRL_PIN(5, "GPIO_5"), 58 PINCTRL_PIN(6, "GPIO_6"), 59 PINCTRL_PIN(7, "GPIO_7"), 60 PINCTRL_PIN(8, "GPIO_8"), 61 PINCTRL_PIN(9, "GPIO_9"), 62 PINCTRL_PIN(10, "GPIO_10"), 63 PINCTRL_PIN(11, "GPIO_11"), 64 PINCTRL_PIN(12, "GPIO_12"), 65 PINCTRL_PIN(13, "GPIO_13"), 66 PINCTRL_PIN(14, "GPIO_14"), 67 PINCTRL_PIN(15, "GPIO_15"), 68 PINCTRL_PIN(16, "GPIO_16"), 69 PINCTRL_PIN(17, "GPIO_17"), 70 PINCTRL_PIN(18, "GPIO_18"), 71 PINCTRL_PIN(19, "GPIO_19"), 72 PINCTRL_PIN(20, "GPIO_20"), 73 PINCTRL_PIN(21, "GPIO_21"), 74 PINCTRL_PIN(22, "GPIO_22"), 75 PINCTRL_PIN(23, "GPIO_23"), 76 PINCTRL_PIN(24, "GPIO_24"), 77 PINCTRL_PIN(25, "GPIO_25"), 78 PINCTRL_PIN(26, "GPIO_26"), 79 PINCTRL_PIN(27, "GPIO_27"), 80 PINCTRL_PIN(28, "GPIO_28"), 81 PINCTRL_PIN(29, "GPIO_29"), 82 PINCTRL_PIN(30, "GPIO_30"), 83 PINCTRL_PIN(31, "GPIO_31"), 84 PINCTRL_PIN(32, "GPIO_32"), 85 PINCTRL_PIN(33, "GPIO_33"), 86 PINCTRL_PIN(34, "GPIO_34"), 87 PINCTRL_PIN(35, "GPIO_35"), 88 PINCTRL_PIN(36, "GPIO_36"), 89 PINCTRL_PIN(37, "GPIO_37"), 90 PINCTRL_PIN(38, "GPIO_38"), 91 PINCTRL_PIN(39, "GPIO_39"), 92 PINCTRL_PIN(40, "GPIO_40"), 93 PINCTRL_PIN(41, "GPIO_41"), 94 PINCTRL_PIN(42, "GPIO_42"), 95 PINCTRL_PIN(43, "GPIO_43"), 96 PINCTRL_PIN(44, "GPIO_44"), 97 PINCTRL_PIN(45, "GPIO_45"), 98 PINCTRL_PIN(46, "GPIO_46"), 99 PINCTRL_PIN(47, "GPIO_47"), 100 PINCTRL_PIN(48, "GPIO_48"), 101 PINCTRL_PIN(49, "GPIO_49"), 102 PINCTRL_PIN(50, "GPIO_50"), 103 PINCTRL_PIN(51, "GPIO_51"), 104 PINCTRL_PIN(52, "GPIO_52"), 105 PINCTRL_PIN(53, "GPIO_53"), 106 PINCTRL_PIN(54, "GPIO_54"), 107 PINCTRL_PIN(55, "GPIO_55"), 108 PINCTRL_PIN(56, "GPIO_56"), 109 PINCTRL_PIN(57, "GPIO_57"), 110 PINCTRL_PIN(58, "GPIO_58"), 111 PINCTRL_PIN(59, "GPIO_59"), 112 PINCTRL_PIN(60, "GPIO_60"), 113 PINCTRL_PIN(61, "GPIO_61"), 114 PINCTRL_PIN(62, "GPIO_62"), 115 PINCTRL_PIN(63, "GPIO_63"), 116 PINCTRL_PIN(64, "GPIO_64"), 117 PINCTRL_PIN(65, "GPIO_65"), 118 PINCTRL_PIN(66, "GPIO_66"), 119 PINCTRL_PIN(67, "GPIO_67"), 120 PINCTRL_PIN(68, "GPIO_68"), 121 PINCTRL_PIN(69, "GPIO_69"), 122 }; 123 124 #define DECLARE_MSM_GPIO_PINS(pin) \ 125 static const unsigned int gpio##pin##_pins[] = { pin } 126 DECLARE_MSM_GPIO_PINS(0); 127 DECLARE_MSM_GPIO_PINS(1); 128 DECLARE_MSM_GPIO_PINS(2); 129 DECLARE_MSM_GPIO_PINS(3); 130 DECLARE_MSM_GPIO_PINS(4); 131 DECLARE_MSM_GPIO_PINS(5); 132 DECLARE_MSM_GPIO_PINS(6); 133 DECLARE_MSM_GPIO_PINS(7); 134 DECLARE_MSM_GPIO_PINS(8); 135 DECLARE_MSM_GPIO_PINS(9); 136 DECLARE_MSM_GPIO_PINS(10); 137 DECLARE_MSM_GPIO_PINS(11); 138 DECLARE_MSM_GPIO_PINS(12); 139 DECLARE_MSM_GPIO_PINS(13); 140 DECLARE_MSM_GPIO_PINS(14); 141 DECLARE_MSM_GPIO_PINS(15); 142 DECLARE_MSM_GPIO_PINS(16); 143 DECLARE_MSM_GPIO_PINS(17); 144 DECLARE_MSM_GPIO_PINS(18); 145 DECLARE_MSM_GPIO_PINS(19); 146 DECLARE_MSM_GPIO_PINS(20); 147 DECLARE_MSM_GPIO_PINS(21); 148 DECLARE_MSM_GPIO_PINS(22); 149 DECLARE_MSM_GPIO_PINS(23); 150 DECLARE_MSM_GPIO_PINS(24); 151 DECLARE_MSM_GPIO_PINS(25); 152 DECLARE_MSM_GPIO_PINS(26); 153 DECLARE_MSM_GPIO_PINS(27); 154 DECLARE_MSM_GPIO_PINS(28); 155 DECLARE_MSM_GPIO_PINS(29); 156 DECLARE_MSM_GPIO_PINS(30); 157 DECLARE_MSM_GPIO_PINS(31); 158 DECLARE_MSM_GPIO_PINS(32); 159 DECLARE_MSM_GPIO_PINS(33); 160 DECLARE_MSM_GPIO_PINS(34); 161 DECLARE_MSM_GPIO_PINS(35); 162 DECLARE_MSM_GPIO_PINS(36); 163 DECLARE_MSM_GPIO_PINS(37); 164 DECLARE_MSM_GPIO_PINS(38); 165 DECLARE_MSM_GPIO_PINS(39); 166 DECLARE_MSM_GPIO_PINS(40); 167 DECLARE_MSM_GPIO_PINS(41); 168 DECLARE_MSM_GPIO_PINS(42); 169 DECLARE_MSM_GPIO_PINS(43); 170 DECLARE_MSM_GPIO_PINS(44); 171 DECLARE_MSM_GPIO_PINS(45); 172 DECLARE_MSM_GPIO_PINS(46); 173 DECLARE_MSM_GPIO_PINS(47); 174 DECLARE_MSM_GPIO_PINS(48); 175 DECLARE_MSM_GPIO_PINS(49); 176 DECLARE_MSM_GPIO_PINS(50); 177 DECLARE_MSM_GPIO_PINS(51); 178 DECLARE_MSM_GPIO_PINS(52); 179 DECLARE_MSM_GPIO_PINS(53); 180 DECLARE_MSM_GPIO_PINS(54); 181 DECLARE_MSM_GPIO_PINS(55); 182 DECLARE_MSM_GPIO_PINS(56); 183 DECLARE_MSM_GPIO_PINS(57); 184 DECLARE_MSM_GPIO_PINS(58); 185 DECLARE_MSM_GPIO_PINS(59); 186 DECLARE_MSM_GPIO_PINS(60); 187 DECLARE_MSM_GPIO_PINS(61); 188 DECLARE_MSM_GPIO_PINS(62); 189 DECLARE_MSM_GPIO_PINS(63); 190 DECLARE_MSM_GPIO_PINS(64); 191 DECLARE_MSM_GPIO_PINS(65); 192 DECLARE_MSM_GPIO_PINS(66); 193 DECLARE_MSM_GPIO_PINS(67); 194 DECLARE_MSM_GPIO_PINS(68); 195 DECLARE_MSM_GPIO_PINS(69); 196 197 enum ipq8074_functions { 198 msm_mux_atest_char, 199 msm_mux_atest_char0, 200 msm_mux_atest_char1, 201 msm_mux_atest_char2, 202 msm_mux_atest_char3, 203 msm_mux_audio_rxbclk, 204 msm_mux_audio_rxd, 205 msm_mux_audio_rxfsync, 206 msm_mux_audio_rxmclk, 207 msm_mux_audio_txbclk, 208 msm_mux_audio_txd, 209 msm_mux_audio_txfsync, 210 msm_mux_audio_txmclk, 211 msm_mux_blsp0_i2c, 212 msm_mux_blsp0_spi, 213 msm_mux_blsp0_uart, 214 msm_mux_blsp1_i2c, 215 msm_mux_blsp1_spi, 216 msm_mux_blsp1_uart, 217 msm_mux_blsp2_i2c, 218 msm_mux_blsp2_spi, 219 msm_mux_blsp2_uart, 220 msm_mux_blsp3_i2c, 221 msm_mux_blsp3_spi, 222 msm_mux_blsp3_spi0, 223 msm_mux_blsp3_spi1, 224 msm_mux_blsp3_spi2, 225 msm_mux_blsp3_spi3, 226 msm_mux_blsp3_uart, 227 msm_mux_blsp4_i2c0, 228 msm_mux_blsp4_i2c1, 229 msm_mux_blsp4_spi0, 230 msm_mux_blsp4_spi1, 231 msm_mux_blsp4_uart0, 232 msm_mux_blsp4_uart1, 233 msm_mux_blsp5_i2c, 234 msm_mux_blsp5_spi, 235 msm_mux_blsp5_uart, 236 msm_mux_burn0, 237 msm_mux_burn1, 238 msm_mux_cri_trng, 239 msm_mux_cri_trng0, 240 msm_mux_cri_trng1, 241 msm_mux_cxc0, 242 msm_mux_cxc1, 243 msm_mux_dbg_out, 244 msm_mux_gcc_plltest, 245 msm_mux_gcc_tlmm, 246 msm_mux_gpio, 247 msm_mux_ldo_en, 248 msm_mux_ldo_update, 249 msm_mux_led0, 250 msm_mux_led1, 251 msm_mux_led2, 252 msm_mux_mac0_sa0, 253 msm_mux_mac0_sa1, 254 msm_mux_mac1_sa0, 255 msm_mux_mac1_sa1, 256 msm_mux_mac1_sa2, 257 msm_mux_mac1_sa3, 258 msm_mux_mac2_sa0, 259 msm_mux_mac2_sa1, 260 msm_mux_mdc, 261 msm_mux_mdio, 262 msm_mux_pcie0_clk, 263 msm_mux_pcie0_rst, 264 msm_mux_pcie0_wake, 265 msm_mux_pcie1_clk, 266 msm_mux_pcie1_rst, 267 msm_mux_pcie1_wake, 268 msm_mux_pcm_drx, 269 msm_mux_pcm_dtx, 270 msm_mux_pcm_fsync, 271 msm_mux_pcm_pclk, 272 msm_mux_pcm_zsi0, 273 msm_mux_pcm_zsi1, 274 msm_mux_prng_rosc, 275 msm_mux_pta1_0, 276 msm_mux_pta1_1, 277 msm_mux_pta1_2, 278 msm_mux_pta2_0, 279 msm_mux_pta2_1, 280 msm_mux_pta2_2, 281 msm_mux_pwm0, 282 msm_mux_pwm1, 283 msm_mux_pwm2, 284 msm_mux_pwm3, 285 msm_mux_qdss_cti_trig_in_a0, 286 msm_mux_qdss_cti_trig_in_a1, 287 msm_mux_qdss_cti_trig_in_b0, 288 msm_mux_qdss_cti_trig_in_b1, 289 msm_mux_qdss_cti_trig_out_a0, 290 msm_mux_qdss_cti_trig_out_a1, 291 msm_mux_qdss_cti_trig_out_b0, 292 msm_mux_qdss_cti_trig_out_b1, 293 msm_mux_qdss_traceclk_a, 294 msm_mux_qdss_traceclk_b, 295 msm_mux_qdss_tracectl_a, 296 msm_mux_qdss_tracectl_b, 297 msm_mux_qdss_tracedata_a, 298 msm_mux_qdss_tracedata_b, 299 msm_mux_qpic, 300 msm_mux_rx0, 301 msm_mux_rx1, 302 msm_mux_rx2, 303 msm_mux_sd_card, 304 msm_mux_sd_write, 305 msm_mux_tsens_max, 306 msm_mux_wci2a, 307 msm_mux_wci2b, 308 msm_mux_wci2c, 309 msm_mux_wci2d, 310 msm_mux_NA, 311 }; 312 313 static const char * const qpic_groups[] = { 314 "gpio0", /* LCD_TE */ 315 "gpio1", /* BUSY_N */ 316 "gpio2", /* LCD_RS_N */ 317 "gpio3", /* WE_N */ 318 "gpio4", /* OE_N */ 319 "gpio5", /* DATA[0] */ 320 "gpio6", /* DATA[1] */ 321 "gpio7", /* DATA[2] */ 322 "gpio8", /* DATA[3] */ 323 "gpio9", /* CS_CSR_LCD */ 324 "gpio10", /* CLE */ 325 "gpio11", /* NAND_CS_N */ 326 "gpio12", /* DATA[4] */ 327 "gpio13", /* DATA[5] */ 328 "gpio14", /* DATA[6] */ 329 "gpio15", /* DATA[7] */ 330 "gpio16", /* DATA[8] */ 331 "gpio17", /* ALE */ 332 }; 333 334 static const char * const blsp5_i2c_groups[] = { 335 "gpio0", "gpio2", 336 }; 337 338 static const char * const blsp5_spi_groups[] = { 339 "gpio0", "gpio2", "gpio9", "gpio16", 340 }; 341 342 static const char * const wci2a_groups[] = { 343 "gpio0", "gpio2", 344 }; 345 346 static const char * const blsp3_spi3_groups[] = { 347 "gpio0", "gpio2", "gpio9", 348 }; 349 350 static const char * const burn0_groups[] = { 351 "gpio0", 352 }; 353 354 static const char * const pcm_zsi0_groups[] = { 355 "gpio1", 356 }; 357 358 static const char * const blsp5_uart_groups[] = { 359 "gpio0", "gpio2", "gpio9", "gpio16", 360 }; 361 362 static const char * const mac1_sa2_groups[] = { 363 "gpio1", "gpio11", 364 }; 365 366 static const char * const blsp3_spi0_groups[] = { 367 "gpio1", "gpio3", "gpio4", 368 }; 369 370 static const char * const burn1_groups[] = { 371 "gpio1", 372 }; 373 374 static const char * const mac0_sa1_groups[] = { 375 "gpio3", "gpio4", 376 }; 377 378 static const char * const qdss_cti_trig_out_b0_groups[] = { 379 "gpio3", 380 }; 381 382 static const char * const qdss_cti_trig_in_b0_groups[] = { 383 "gpio4", 384 }; 385 386 static const char * const blsp4_uart0_groups[] = { 387 "gpio5", "gpio6", "gpio7", "gpio8", 388 }; 389 390 static const char * const blsp4_i2c0_groups[] = { 391 "gpio5", "gpio6", 392 }; 393 394 static const char * const blsp4_spi0_groups[] = { 395 "gpio5", "gpio6", "gpio7", "gpio8", 396 }; 397 398 static const char * const mac2_sa1_groups[] = { 399 "gpio5", "gpio6", 400 }; 401 402 static const char * const qdss_cti_trig_out_b1_groups[] = { 403 "gpio5", 404 }; 405 406 static const char * const qdss_cti_trig_in_b1_groups[] = { 407 "gpio6", 408 }; 409 410 static const char * const cxc0_groups[] = { 411 "gpio9", "gpio16", 412 }; 413 414 static const char * const mac1_sa3_groups[] = { 415 "gpio9", "gpio16", 416 }; 417 418 static const char * const qdss_cti_trig_in_a1_groups[] = { 419 "gpio9", 420 }; 421 422 static const char * const qdss_cti_trig_out_a1_groups[] = { 423 "gpio10", 424 }; 425 426 static const char * const wci2c_groups[] = { 427 "gpio11", "gpio17", 428 }; 429 430 static const char * const qdss_cti_trig_in_a0_groups[] = { 431 "gpio11", 432 }; 433 434 static const char * const qdss_cti_trig_out_a0_groups[] = { 435 "gpio12", 436 }; 437 438 static const char * const qdss_traceclk_b_groups[] = { 439 "gpio14", 440 }; 441 442 static const char * const qdss_tracectl_b_groups[] = { 443 "gpio15", 444 }; 445 446 static const char * const pcm_zsi1_groups[] = { 447 "gpio16", 448 }; 449 450 static const char * const qdss_tracedata_b_groups[] = { 451 "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21", "gpio22", 452 "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", "gpio29", 453 "gpio30", "gpio31", 454 }; 455 456 static const char * const led0_groups[] = { 457 "gpio18", 458 }; 459 460 static const char * const pwm0_groups[] = { 461 "gpio18", "gpio21", "gpio25", "gpio29", "gpio63", 462 }; 463 464 static const char * const led1_groups[] = { 465 "gpio19", 466 }; 467 468 static const char * const pwm1_groups[] = { 469 "gpio19", "gpio22", "gpio26", "gpio30", "gpio64", 470 }; 471 472 static const char * const led2_groups[] = { 473 "gpio20", 474 }; 475 476 static const char * const pwm2_groups[] = { 477 "gpio20", "gpio23", "gpio27", "gpio31", "gpio66", 478 }; 479 480 static const char * const blsp4_uart1_groups[] = { 481 "gpio21", "gpio22", "gpio23", "gpio24", 482 }; 483 484 static const char * const blsp4_i2c1_groups[] = { 485 "gpio21", "gpio22", 486 }; 487 488 static const char * const blsp4_spi1_groups[] = { 489 "gpio21", "gpio22", "gpio23", "gpio24", 490 }; 491 492 static const char * const wci2d_groups[] = { 493 "gpio21", "gpio22", 494 }; 495 496 static const char * const mac1_sa1_groups[] = { 497 "gpio21", "gpio22", 498 }; 499 500 static const char * const blsp3_spi2_groups[] = { 501 "gpio21", "gpio22", "gpio23", 502 }; 503 504 static const char * const pwm3_groups[] = { 505 "gpio24", "gpio28", "gpio32", "gpio67", 506 }; 507 508 static const char * const audio_txmclk_groups[] = { 509 "gpio25", 510 }; 511 512 static const char * const audio_txbclk_groups[] = { 513 "gpio26", 514 }; 515 516 static const char * const audio_txfsync_groups[] = { 517 "gpio27", 518 }; 519 520 static const char * const audio_txd_groups[] = { 521 "gpio28", 522 }; 523 524 static const char * const audio_rxmclk_groups[] = { 525 "gpio29", 526 }; 527 528 static const char * const atest_char0_groups[] = { 529 "gpio29", 530 }; 531 532 static const char * const audio_rxbclk_groups[] = { 533 "gpio30", 534 }; 535 536 static const char * const atest_char1_groups[] = { 537 "gpio30", 538 }; 539 540 static const char * const audio_rxfsync_groups[] = { 541 "gpio31", 542 }; 543 544 static const char * const atest_char2_groups[] = { 545 "gpio31", 546 }; 547 548 static const char * const audio_rxd_groups[] = { 549 "gpio32", 550 }; 551 552 static const char * const atest_char3_groups[] = { 553 "gpio32", 554 }; 555 556 static const char * const pcm_drx_groups[] = { 557 "gpio33", 558 }; 559 560 static const char * const mac1_sa0_groups[] = { 561 "gpio33", "gpio34", 562 }; 563 564 static const char * const mac0_sa0_groups[] = { 565 "gpio33", "gpio34", 566 }; 567 568 static const char * const pcm_dtx_groups[] = { 569 "gpio34", 570 }; 571 572 static const char * const pcm_fsync_groups[] = { 573 "gpio35", 574 }; 575 576 static const char * const mac2_sa0_groups[] = { 577 "gpio35", "gpio36", 578 }; 579 580 static const char * const qdss_traceclk_a_groups[] = { 581 "gpio35", 582 }; 583 584 static const char * const pcm_pclk_groups[] = { 585 "gpio36", 586 }; 587 588 static const char * const qdss_tracectl_a_groups[] = { 589 "gpio36", 590 }; 591 592 static const char * const atest_char_groups[] = { 593 "gpio37", 594 }; 595 596 static const char * const qdss_tracedata_a_groups[] = { 597 "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42", "gpio43", 598 "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49", "gpio50", 599 "gpio51", "gpio52", 600 }; 601 602 static const char * const blsp0_uart_groups[] = { 603 "gpio38", "gpio39", "gpio40", "gpio41", 604 }; 605 606 static const char * const blsp0_i2c_groups[] = { 607 "gpio38", "gpio39", 608 }; 609 610 static const char * const blsp0_spi_groups[] = { 611 "gpio38", "gpio39", "gpio40", "gpio41", 612 }; 613 614 static const char * const blsp1_uart_groups[] = { 615 "gpio42", "gpio43", "gpio44", "gpio45", 616 }; 617 618 static const char * const blsp1_i2c_groups[] = { 619 "gpio42", "gpio43", 620 }; 621 622 static const char * const blsp1_spi_groups[] = { 623 "gpio42", "gpio43", "gpio44", "gpio45", 624 }; 625 626 static const char * const blsp2_uart_groups[] = { 627 "gpio46", "gpio47", "gpio48", "gpio49", 628 }; 629 630 static const char * const blsp2_i2c_groups[] = { 631 "gpio46", "gpio47", 632 }; 633 634 static const char * const blsp2_spi_groups[] = { 635 "gpio46", "gpio47", "gpio48", "gpio49", 636 }; 637 638 static const char * const blsp3_uart_groups[] = { 639 "gpio50", "gpio51", "gpio52", "gpio53", 640 }; 641 642 static const char * const blsp3_i2c_groups[] = { 643 "gpio50", "gpio51", 644 }; 645 646 static const char * const blsp3_spi_groups[] = { 647 "gpio50", "gpio51", "gpio52", "gpio53", 648 }; 649 650 static const char * const pta2_0_groups[] = { 651 "gpio54", 652 }; 653 654 static const char * const wci2b_groups[] = { 655 "gpio54", "gpio56", 656 }; 657 658 static const char * const cxc1_groups[] = { 659 "gpio54", "gpio56", 660 }; 661 662 static const char * const blsp3_spi1_groups[] = { 663 "gpio54", "gpio55", "gpio56", 664 }; 665 666 static const char * const pta2_1_groups[] = { 667 "gpio55", 668 }; 669 670 static const char * const pta2_2_groups[] = { 671 "gpio56", 672 }; 673 674 static const char * const pcie0_clk_groups[] = { 675 "gpio57", 676 }; 677 678 static const char * const dbg_out_groups[] = { 679 "gpio57", 680 }; 681 682 static const char * const cri_trng0_groups[] = { 683 "gpio57", 684 }; 685 686 static const char * const pcie0_rst_groups[] = { 687 "gpio58", 688 }; 689 690 static const char * const cri_trng1_groups[] = { 691 "gpio58", 692 }; 693 694 static const char * const pcie0_wake_groups[] = { 695 "gpio59", 696 }; 697 698 static const char * const cri_trng_groups[] = { 699 "gpio59", 700 }; 701 702 static const char * const pcie1_clk_groups[] = { 703 "gpio60", 704 }; 705 706 static const char * const rx2_groups[] = { 707 "gpio60", 708 }; 709 710 static const char * const ldo_update_groups[] = { 711 "gpio60", 712 }; 713 714 static const char * const pcie1_rst_groups[] = { 715 "gpio61", 716 }; 717 718 static const char * const ldo_en_groups[] = { 719 "gpio61", 720 }; 721 722 static const char * const pcie1_wake_groups[] = { 723 "gpio62", 724 }; 725 726 static const char * const gcc_plltest_groups[] = { 727 "gpio62", "gpio63", 728 }; 729 730 static const char * const sd_card_groups[] = { 731 "gpio63", 732 }; 733 734 static const char * const pta1_1_groups[] = { 735 "gpio64", 736 }; 737 738 static const char * const rx1_groups[] = { 739 "gpio64", 740 }; 741 742 static const char * const pta1_2_groups[] = { 743 "gpio65", 744 }; 745 746 static const char * const gcc_tlmm_groups[] = { 747 "gpio65", 748 }; 749 750 static const char * const pta1_0_groups[] = { 751 "gpio66", 752 }; 753 754 static const char * const prng_rosc_groups[] = { 755 "gpio66", 756 }; 757 758 static const char * const sd_write_groups[] = { 759 "gpio67", 760 }; 761 762 static const char * const rx0_groups[] = { 763 "gpio67", 764 }; 765 766 static const char * const tsens_max_groups[] = { 767 "gpio67", 768 }; 769 770 static const char * const mdc_groups[] = { 771 "gpio68", 772 }; 773 774 static const char * const mdio_groups[] = { 775 "gpio69", 776 }; 777 778 static const char * const gpio_groups[] = { 779 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", 780 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14", 781 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21", 782 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", 783 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35", 784 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42", 785 "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49", 786 "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56", 787 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63", 788 "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", 789 }; 790 791 static const struct pinfunction ipq8074_functions[] = { 792 MSM_PIN_FUNCTION(atest_char), 793 MSM_PIN_FUNCTION(atest_char0), 794 MSM_PIN_FUNCTION(atest_char1), 795 MSM_PIN_FUNCTION(atest_char2), 796 MSM_PIN_FUNCTION(atest_char3), 797 MSM_PIN_FUNCTION(audio_rxbclk), 798 MSM_PIN_FUNCTION(audio_rxd), 799 MSM_PIN_FUNCTION(audio_rxfsync), 800 MSM_PIN_FUNCTION(audio_rxmclk), 801 MSM_PIN_FUNCTION(audio_txbclk), 802 MSM_PIN_FUNCTION(audio_txd), 803 MSM_PIN_FUNCTION(audio_txfsync), 804 MSM_PIN_FUNCTION(audio_txmclk), 805 MSM_PIN_FUNCTION(blsp0_i2c), 806 MSM_PIN_FUNCTION(blsp0_spi), 807 MSM_PIN_FUNCTION(blsp0_uart), 808 MSM_PIN_FUNCTION(blsp1_i2c), 809 MSM_PIN_FUNCTION(blsp1_spi), 810 MSM_PIN_FUNCTION(blsp1_uart), 811 MSM_PIN_FUNCTION(blsp2_i2c), 812 MSM_PIN_FUNCTION(blsp2_spi), 813 MSM_PIN_FUNCTION(blsp2_uart), 814 MSM_PIN_FUNCTION(blsp3_i2c), 815 MSM_PIN_FUNCTION(blsp3_spi), 816 MSM_PIN_FUNCTION(blsp3_spi0), 817 MSM_PIN_FUNCTION(blsp3_spi1), 818 MSM_PIN_FUNCTION(blsp3_spi2), 819 MSM_PIN_FUNCTION(blsp3_spi3), 820 MSM_PIN_FUNCTION(blsp3_uart), 821 MSM_PIN_FUNCTION(blsp4_i2c0), 822 MSM_PIN_FUNCTION(blsp4_i2c1), 823 MSM_PIN_FUNCTION(blsp4_spi0), 824 MSM_PIN_FUNCTION(blsp4_spi1), 825 MSM_PIN_FUNCTION(blsp4_uart0), 826 MSM_PIN_FUNCTION(blsp4_uart1), 827 MSM_PIN_FUNCTION(blsp5_i2c), 828 MSM_PIN_FUNCTION(blsp5_spi), 829 MSM_PIN_FUNCTION(blsp5_uart), 830 MSM_PIN_FUNCTION(burn0), 831 MSM_PIN_FUNCTION(burn1), 832 MSM_PIN_FUNCTION(cri_trng), 833 MSM_PIN_FUNCTION(cri_trng0), 834 MSM_PIN_FUNCTION(cri_trng1), 835 MSM_PIN_FUNCTION(cxc0), 836 MSM_PIN_FUNCTION(cxc1), 837 MSM_PIN_FUNCTION(dbg_out), 838 MSM_PIN_FUNCTION(gcc_plltest), 839 MSM_PIN_FUNCTION(gcc_tlmm), 840 MSM_GPIO_PIN_FUNCTION(gpio), 841 MSM_PIN_FUNCTION(ldo_en), 842 MSM_PIN_FUNCTION(ldo_update), 843 MSM_PIN_FUNCTION(led0), 844 MSM_PIN_FUNCTION(led1), 845 MSM_PIN_FUNCTION(led2), 846 MSM_PIN_FUNCTION(mac0_sa0), 847 MSM_PIN_FUNCTION(mac0_sa1), 848 MSM_PIN_FUNCTION(mac1_sa0), 849 MSM_PIN_FUNCTION(mac1_sa1), 850 MSM_PIN_FUNCTION(mac1_sa2), 851 MSM_PIN_FUNCTION(mac1_sa3), 852 MSM_PIN_FUNCTION(mac2_sa0), 853 MSM_PIN_FUNCTION(mac2_sa1), 854 MSM_PIN_FUNCTION(mdc), 855 MSM_PIN_FUNCTION(mdio), 856 MSM_PIN_FUNCTION(pcie0_clk), 857 MSM_PIN_FUNCTION(pcie0_rst), 858 MSM_PIN_FUNCTION(pcie0_wake), 859 MSM_PIN_FUNCTION(pcie1_clk), 860 MSM_PIN_FUNCTION(pcie1_rst), 861 MSM_PIN_FUNCTION(pcie1_wake), 862 MSM_PIN_FUNCTION(pcm_drx), 863 MSM_PIN_FUNCTION(pcm_dtx), 864 MSM_PIN_FUNCTION(pcm_fsync), 865 MSM_PIN_FUNCTION(pcm_pclk), 866 MSM_PIN_FUNCTION(pcm_zsi0), 867 MSM_PIN_FUNCTION(pcm_zsi1), 868 MSM_PIN_FUNCTION(prng_rosc), 869 MSM_PIN_FUNCTION(pta1_0), 870 MSM_PIN_FUNCTION(pta1_1), 871 MSM_PIN_FUNCTION(pta1_2), 872 MSM_PIN_FUNCTION(pta2_0), 873 MSM_PIN_FUNCTION(pta2_1), 874 MSM_PIN_FUNCTION(pta2_2), 875 MSM_PIN_FUNCTION(pwm0), 876 MSM_PIN_FUNCTION(pwm1), 877 MSM_PIN_FUNCTION(pwm2), 878 MSM_PIN_FUNCTION(pwm3), 879 MSM_PIN_FUNCTION(qdss_cti_trig_in_a0), 880 MSM_PIN_FUNCTION(qdss_cti_trig_in_a1), 881 MSM_PIN_FUNCTION(qdss_cti_trig_in_b0), 882 MSM_PIN_FUNCTION(qdss_cti_trig_in_b1), 883 MSM_PIN_FUNCTION(qdss_cti_trig_out_a0), 884 MSM_PIN_FUNCTION(qdss_cti_trig_out_a1), 885 MSM_PIN_FUNCTION(qdss_cti_trig_out_b0), 886 MSM_PIN_FUNCTION(qdss_cti_trig_out_b1), 887 MSM_PIN_FUNCTION(qdss_traceclk_a), 888 MSM_PIN_FUNCTION(qdss_traceclk_b), 889 MSM_PIN_FUNCTION(qdss_tracectl_a), 890 MSM_PIN_FUNCTION(qdss_tracectl_b), 891 MSM_PIN_FUNCTION(qdss_tracedata_a), 892 MSM_PIN_FUNCTION(qdss_tracedata_b), 893 MSM_PIN_FUNCTION(qpic), 894 MSM_PIN_FUNCTION(rx0), 895 MSM_PIN_FUNCTION(rx1), 896 MSM_PIN_FUNCTION(rx2), 897 MSM_PIN_FUNCTION(sd_card), 898 MSM_PIN_FUNCTION(sd_write), 899 MSM_PIN_FUNCTION(tsens_max), 900 MSM_PIN_FUNCTION(wci2a), 901 MSM_PIN_FUNCTION(wci2b), 902 MSM_PIN_FUNCTION(wci2c), 903 MSM_PIN_FUNCTION(wci2d), 904 }; 905 906 static const struct msm_pingroup ipq8074_groups[] = { 907 PINGROUP(0, qpic, blsp5_uart, blsp5_i2c, blsp5_spi, wci2a, 908 blsp3_spi3, NA, burn0, NA), 909 PINGROUP(1, qpic, pcm_zsi0, mac1_sa2, blsp3_spi0, NA, burn1, NA, NA, 910 NA), 911 PINGROUP(2, qpic, blsp5_uart, blsp5_i2c, blsp5_spi, wci2a, 912 blsp3_spi3, NA, NA, NA), 913 PINGROUP(3, qpic, mac0_sa1, blsp3_spi0, qdss_cti_trig_out_b0, NA, NA, 914 NA, NA, NA), 915 PINGROUP(4, qpic, mac0_sa1, blsp3_spi0, qdss_cti_trig_in_b0, NA, NA, 916 NA, NA, NA), 917 PINGROUP(5, qpic, blsp4_uart0, blsp4_i2c0, blsp4_spi0, mac2_sa1, 918 qdss_cti_trig_out_b1, NA, NA, NA), 919 PINGROUP(6, qpic, blsp4_uart0, blsp4_i2c0, blsp4_spi0, mac2_sa1, 920 qdss_cti_trig_in_b1, NA, NA, NA), 921 PINGROUP(7, qpic, blsp4_uart0, blsp4_spi0, NA, NA, NA, NA, NA, NA), 922 PINGROUP(8, qpic, blsp4_uart0, blsp4_spi0, NA, NA, NA, NA, NA, NA), 923 PINGROUP(9, qpic, blsp5_uart, blsp5_spi, cxc0, mac1_sa3, blsp3_spi3, 924 qdss_cti_trig_in_a1, NA, NA), 925 PINGROUP(10, qpic, qdss_cti_trig_out_a1, NA, NA, NA, NA, NA, NA, 926 NA), 927 PINGROUP(11, qpic, wci2c, mac1_sa2, qdss_cti_trig_in_a0, NA, NA, NA, 928 NA, NA), 929 PINGROUP(12, qpic, qdss_cti_trig_out_a0, NA, NA, NA, NA, NA, NA, 930 NA), 931 PINGROUP(13, qpic, NA, NA, NA, NA, NA, NA, NA, NA), 932 PINGROUP(14, qpic, qdss_traceclk_b, NA, NA, NA, NA, NA, NA, NA), 933 PINGROUP(15, qpic, qdss_tracectl_b, NA, NA, NA, NA, NA, NA, NA), 934 PINGROUP(16, qpic, blsp5_uart, pcm_zsi1, blsp5_spi, cxc0, mac1_sa3, 935 qdss_tracedata_b, NA, NA), 936 PINGROUP(17, qpic, wci2c, qdss_tracedata_b, NA, NA, NA, NA, NA, NA), 937 PINGROUP(18, led0, pwm0, qdss_tracedata_b, NA, NA, NA, NA, NA, NA), 938 PINGROUP(19, led1, pwm1, NA, qdss_tracedata_b, NA, NA, NA, NA, NA), 939 PINGROUP(20, led2, pwm2, NA, qdss_tracedata_b, NA, NA, NA, NA, NA), 940 PINGROUP(21, pwm0, blsp4_uart1, blsp4_i2c1, blsp4_spi1, wci2d, mac1_sa1, 941 blsp3_spi2, NA, qdss_tracedata_b), 942 PINGROUP(22, pwm1, blsp4_uart1, blsp4_i2c1, blsp4_spi1, wci2d, mac1_sa1, 943 blsp3_spi2, NA, qdss_tracedata_b), 944 PINGROUP(23, pwm2, blsp4_uart1, blsp4_spi1, blsp3_spi2, NA, 945 qdss_tracedata_b, NA, NA, NA), 946 PINGROUP(24, pwm3, blsp4_uart1, blsp4_spi1, NA, qdss_tracedata_b, NA, 947 NA, NA, NA), 948 PINGROUP(25, audio_txmclk, pwm0, NA, qdss_tracedata_b, NA, NA, NA, NA, 949 NA), 950 PINGROUP(26, audio_txbclk, pwm1, NA, qdss_tracedata_b, NA, NA, NA, NA, 951 NA), 952 PINGROUP(27, audio_txfsync, pwm2, NA, qdss_tracedata_b, NA, NA, NA, 953 NA, NA), 954 PINGROUP(28, audio_txd, pwm3, NA, qdss_tracedata_b, NA, NA, NA, NA, 955 NA), 956 PINGROUP(29, audio_rxmclk, pwm0, atest_char0, NA, qdss_tracedata_b, 957 NA, NA, NA, NA), 958 PINGROUP(30, audio_rxbclk, pwm1, atest_char1, NA, qdss_tracedata_b, 959 NA, NA, NA, NA), 960 PINGROUP(31, audio_rxfsync, pwm2, atest_char2, NA, qdss_tracedata_b, 961 NA, NA, NA, NA), 962 PINGROUP(32, audio_rxd, pwm3, atest_char3, NA, NA, NA, NA, NA, NA), 963 PINGROUP(33, pcm_drx, mac1_sa0, mac0_sa0, NA, NA, NA, NA, NA, NA), 964 PINGROUP(34, pcm_dtx, mac1_sa0, mac0_sa0, NA, NA, NA, NA, NA, NA), 965 PINGROUP(35, pcm_fsync, mac2_sa0, qdss_traceclk_a, NA, NA, NA, NA, NA, NA), 966 PINGROUP(36, pcm_pclk, mac2_sa0, NA, qdss_tracectl_a, NA, NA, NA, NA, NA), 967 PINGROUP(37, atest_char, NA, qdss_tracedata_a, NA, NA, NA, NA, NA, NA), 968 PINGROUP(38, blsp0_uart, blsp0_i2c, blsp0_spi, NA, qdss_tracedata_a, 969 NA, NA, NA, NA), 970 PINGROUP(39, blsp0_uart, blsp0_i2c, blsp0_spi, NA, qdss_tracedata_a, 971 NA, NA, NA, NA), 972 PINGROUP(40, blsp0_uart, blsp0_spi, NA, qdss_tracedata_a, NA, NA, NA, 973 NA, NA), 974 PINGROUP(41, blsp0_uart, blsp0_spi, NA, qdss_tracedata_a, NA, NA, NA, 975 NA, NA), 976 PINGROUP(42, blsp1_uart, blsp1_i2c, blsp1_spi, NA, qdss_tracedata_a, 977 NA, NA, NA, NA), 978 PINGROUP(43, blsp1_uart, blsp1_i2c, blsp1_spi, NA, qdss_tracedata_a, 979 NA, NA, NA, NA), 980 PINGROUP(44, blsp1_uart, blsp1_spi, NA, qdss_tracedata_a, NA, NA, NA, 981 NA, NA), 982 PINGROUP(45, blsp1_uart, blsp1_spi, qdss_tracedata_a, NA, NA, NA, NA, 983 NA, NA), 984 PINGROUP(46, blsp2_uart, blsp2_i2c, blsp2_spi, qdss_tracedata_a, NA, 985 NA, NA, NA, NA), 986 PINGROUP(47, blsp2_uart, blsp2_i2c, blsp2_spi, NA, qdss_tracedata_a, 987 NA, NA, NA, NA), 988 PINGROUP(48, blsp2_uart, blsp2_spi, NA, qdss_tracedata_a, NA, NA, NA, 989 NA, NA), 990 PINGROUP(49, blsp2_uart, blsp2_spi, NA, qdss_tracedata_a, NA, NA, NA, 991 NA, NA), 992 PINGROUP(50, blsp3_uart, blsp3_i2c, blsp3_spi, NA, qdss_tracedata_a, 993 NA, NA, NA, NA), 994 PINGROUP(51, blsp3_uart, blsp3_i2c, blsp3_spi, NA, qdss_tracedata_a, 995 NA, NA, NA, NA), 996 PINGROUP(52, blsp3_uart, blsp3_spi, NA, qdss_tracedata_a, NA, NA, NA, 997 NA, NA), 998 PINGROUP(53, blsp3_uart, blsp3_spi, NA, NA, NA, NA, NA, NA, NA), 999 PINGROUP(54, pta2_0, wci2b, cxc1, blsp3_spi1, NA, NA, NA, NA, NA), 1000 PINGROUP(55, pta2_1, blsp3_spi1, NA, NA, NA, NA, NA, NA, NA), 1001 PINGROUP(56, pta2_2, wci2b, cxc1, blsp3_spi1, NA, NA, NA, NA, NA), 1002 PINGROUP(57, pcie0_clk, NA, dbg_out, cri_trng0, NA, NA, NA, NA, NA), 1003 PINGROUP(58, pcie0_rst, NA, cri_trng1, NA, NA, NA, NA, NA, NA), 1004 PINGROUP(59, pcie0_wake, NA, cri_trng, NA, NA, NA, NA, NA, NA), 1005 PINGROUP(60, pcie1_clk, rx2, ldo_update, NA, NA, NA, NA, NA, NA), 1006 PINGROUP(61, pcie1_rst, ldo_en, NA, NA, NA, NA, NA, NA, NA), 1007 PINGROUP(62, pcie1_wake, gcc_plltest, NA, NA, NA, NA, NA, NA, NA), 1008 PINGROUP(63, sd_card, pwm0, NA, gcc_plltest, NA, NA, NA, NA, NA), 1009 PINGROUP(64, pta1_1, pwm1, NA, rx1, NA, NA, NA, NA, NA), 1010 PINGROUP(65, pta1_2, NA, gcc_tlmm, NA, NA, NA, NA, NA, NA), 1011 PINGROUP(66, pta1_0, pwm2, prng_rosc, NA, NA, NA, NA, NA, NA), 1012 PINGROUP(67, sd_write, pwm3, rx0, tsens_max, NA, NA, NA, NA, NA), 1013 PINGROUP(68, mdc, NA, NA, NA, NA, NA, NA, NA, NA), 1014 PINGROUP(69, mdio, NA, NA, NA, NA, NA, NA, NA, NA), 1015 }; 1016 1017 static const struct msm_pinctrl_soc_data ipq8074_pinctrl = { 1018 .pins = ipq8074_pins, 1019 .npins = ARRAY_SIZE(ipq8074_pins), 1020 .functions = ipq8074_functions, 1021 .nfunctions = ARRAY_SIZE(ipq8074_functions), 1022 .groups = ipq8074_groups, 1023 .ngroups = ARRAY_SIZE(ipq8074_groups), 1024 .ngpios = 70, 1025 }; 1026 1027 static int ipq8074_pinctrl_probe(struct platform_device *pdev) 1028 { 1029 return msm_pinctrl_probe(pdev, &ipq8074_pinctrl); 1030 } 1031 1032 static const struct of_device_id ipq8074_pinctrl_of_match[] = { 1033 { .compatible = "qcom,ipq8074-pinctrl", }, 1034 { }, 1035 }; 1036 MODULE_DEVICE_TABLE(of, ipq8074_pinctrl_of_match); 1037 1038 static struct platform_driver ipq8074_pinctrl_driver = { 1039 .driver = { 1040 .name = "ipq8074-pinctrl", 1041 .of_match_table = ipq8074_pinctrl_of_match, 1042 }, 1043 .probe = ipq8074_pinctrl_probe, 1044 }; 1045 1046 static int __init ipq8074_pinctrl_init(void) 1047 { 1048 return platform_driver_register(&ipq8074_pinctrl_driver); 1049 } 1050 arch_initcall(ipq8074_pinctrl_init); 1051 1052 static void __exit ipq8074_pinctrl_exit(void) 1053 { 1054 platform_driver_unregister(&ipq8074_pinctrl_driver); 1055 } 1056 module_exit(ipq8074_pinctrl_exit); 1057 1058 MODULE_DESCRIPTION("Qualcomm ipq8074 pinctrl driver"); 1059 MODULE_LICENSE("GPL v2"); 1060