1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 /* 3 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. 4 */ 5 6 #include <linux/module.h> 7 #include <linux/of.h> 8 #include <linux/platform_device.h> 9 #include <linux/pinctrl/pinctrl.h> 10 11 #include "pinctrl-msm.h" 12 13 #define FUNCTION(fname) \ 14 [msm_mux_##fname] = { \ 15 .name = #fname, \ 16 .groups = fname##_groups, \ 17 .ngroups = ARRAY_SIZE(fname##_groups), \ 18 } 19 20 #define REG_SIZE 0x1000 21 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ 22 { \ 23 .name = "gpio" #id, \ 24 .pins = gpio##id##_pins, \ 25 .npins = (unsigned int)ARRAY_SIZE(gpio##id##_pins), \ 26 .funcs = (int[]){ \ 27 msm_mux_gpio, /* gpio mode */ \ 28 msm_mux_##f1, \ 29 msm_mux_##f2, \ 30 msm_mux_##f3, \ 31 msm_mux_##f4, \ 32 msm_mux_##f5, \ 33 msm_mux_##f6, \ 34 msm_mux_##f7, \ 35 msm_mux_##f8, \ 36 msm_mux_##f9 \ 37 }, \ 38 .nfuncs = 10, \ 39 .ctl_reg = REG_SIZE * id, \ 40 .io_reg = 0x4 + REG_SIZE * id, \ 41 .intr_cfg_reg = 0x8 + REG_SIZE * id, \ 42 .intr_status_reg = 0xc + REG_SIZE * id, \ 43 .intr_target_reg = 0x8 + REG_SIZE * id, \ 44 .mux_bit = 2, \ 45 .pull_bit = 0, \ 46 .drv_bit = 6, \ 47 .oe_bit = 9, \ 48 .in_bit = 0, \ 49 .out_bit = 1, \ 50 .intr_enable_bit = 0, \ 51 .intr_status_bit = 0, \ 52 .intr_target_bit = 5, \ 53 .intr_target_kpss_val = 3, \ 54 .intr_raw_status_bit = 4, \ 55 .intr_polarity_bit = 1, \ 56 .intr_detection_bit = 2, \ 57 .intr_detection_width = 2, \ 58 } 59 60 static const struct pinctrl_pin_desc ipq5332_pins[] = { 61 PINCTRL_PIN(0, "GPIO_0"), 62 PINCTRL_PIN(1, "GPIO_1"), 63 PINCTRL_PIN(2, "GPIO_2"), 64 PINCTRL_PIN(3, "GPIO_3"), 65 PINCTRL_PIN(4, "GPIO_4"), 66 PINCTRL_PIN(5, "GPIO_5"), 67 PINCTRL_PIN(6, "GPIO_6"), 68 PINCTRL_PIN(7, "GPIO_7"), 69 PINCTRL_PIN(8, "GPIO_8"), 70 PINCTRL_PIN(9, "GPIO_9"), 71 PINCTRL_PIN(10, "GPIO_10"), 72 PINCTRL_PIN(11, "GPIO_11"), 73 PINCTRL_PIN(12, "GPIO_12"), 74 PINCTRL_PIN(13, "GPIO_13"), 75 PINCTRL_PIN(14, "GPIO_14"), 76 PINCTRL_PIN(15, "GPIO_15"), 77 PINCTRL_PIN(16, "GPIO_16"), 78 PINCTRL_PIN(17, "GPIO_17"), 79 PINCTRL_PIN(18, "GPIO_18"), 80 PINCTRL_PIN(19, "GPIO_19"), 81 PINCTRL_PIN(20, "GPIO_20"), 82 PINCTRL_PIN(21, "GPIO_21"), 83 PINCTRL_PIN(22, "GPIO_22"), 84 PINCTRL_PIN(23, "GPIO_23"), 85 PINCTRL_PIN(24, "GPIO_24"), 86 PINCTRL_PIN(25, "GPIO_25"), 87 PINCTRL_PIN(26, "GPIO_26"), 88 PINCTRL_PIN(27, "GPIO_27"), 89 PINCTRL_PIN(28, "GPIO_28"), 90 PINCTRL_PIN(29, "GPIO_29"), 91 PINCTRL_PIN(30, "GPIO_30"), 92 PINCTRL_PIN(31, "GPIO_31"), 93 PINCTRL_PIN(32, "GPIO_32"), 94 PINCTRL_PIN(33, "GPIO_33"), 95 PINCTRL_PIN(34, "GPIO_34"), 96 PINCTRL_PIN(35, "GPIO_35"), 97 PINCTRL_PIN(36, "GPIO_36"), 98 PINCTRL_PIN(37, "GPIO_37"), 99 PINCTRL_PIN(38, "GPIO_38"), 100 PINCTRL_PIN(39, "GPIO_39"), 101 PINCTRL_PIN(40, "GPIO_40"), 102 PINCTRL_PIN(41, "GPIO_41"), 103 PINCTRL_PIN(42, "GPIO_42"), 104 PINCTRL_PIN(43, "GPIO_43"), 105 PINCTRL_PIN(44, "GPIO_44"), 106 PINCTRL_PIN(45, "GPIO_45"), 107 PINCTRL_PIN(46, "GPIO_46"), 108 PINCTRL_PIN(47, "GPIO_47"), 109 PINCTRL_PIN(48, "GPIO_48"), 110 PINCTRL_PIN(49, "GPIO_49"), 111 PINCTRL_PIN(50, "GPIO_50"), 112 PINCTRL_PIN(51, "GPIO_51"), 113 PINCTRL_PIN(52, "GPIO_52"), 114 }; 115 116 #define DECLARE_MSM_GPIO_PINS(pin) \ 117 static const unsigned int gpio##pin##_pins[] = { pin } 118 DECLARE_MSM_GPIO_PINS(0); 119 DECLARE_MSM_GPIO_PINS(1); 120 DECLARE_MSM_GPIO_PINS(2); 121 DECLARE_MSM_GPIO_PINS(3); 122 DECLARE_MSM_GPIO_PINS(4); 123 DECLARE_MSM_GPIO_PINS(5); 124 DECLARE_MSM_GPIO_PINS(6); 125 DECLARE_MSM_GPIO_PINS(7); 126 DECLARE_MSM_GPIO_PINS(8); 127 DECLARE_MSM_GPIO_PINS(9); 128 DECLARE_MSM_GPIO_PINS(10); 129 DECLARE_MSM_GPIO_PINS(11); 130 DECLARE_MSM_GPIO_PINS(12); 131 DECLARE_MSM_GPIO_PINS(13); 132 DECLARE_MSM_GPIO_PINS(14); 133 DECLARE_MSM_GPIO_PINS(15); 134 DECLARE_MSM_GPIO_PINS(16); 135 DECLARE_MSM_GPIO_PINS(17); 136 DECLARE_MSM_GPIO_PINS(18); 137 DECLARE_MSM_GPIO_PINS(19); 138 DECLARE_MSM_GPIO_PINS(20); 139 DECLARE_MSM_GPIO_PINS(21); 140 DECLARE_MSM_GPIO_PINS(22); 141 DECLARE_MSM_GPIO_PINS(23); 142 DECLARE_MSM_GPIO_PINS(24); 143 DECLARE_MSM_GPIO_PINS(25); 144 DECLARE_MSM_GPIO_PINS(26); 145 DECLARE_MSM_GPIO_PINS(27); 146 DECLARE_MSM_GPIO_PINS(28); 147 DECLARE_MSM_GPIO_PINS(29); 148 DECLARE_MSM_GPIO_PINS(30); 149 DECLARE_MSM_GPIO_PINS(31); 150 DECLARE_MSM_GPIO_PINS(32); 151 DECLARE_MSM_GPIO_PINS(33); 152 DECLARE_MSM_GPIO_PINS(34); 153 DECLARE_MSM_GPIO_PINS(35); 154 DECLARE_MSM_GPIO_PINS(36); 155 DECLARE_MSM_GPIO_PINS(37); 156 DECLARE_MSM_GPIO_PINS(38); 157 DECLARE_MSM_GPIO_PINS(39); 158 DECLARE_MSM_GPIO_PINS(40); 159 DECLARE_MSM_GPIO_PINS(41); 160 DECLARE_MSM_GPIO_PINS(42); 161 DECLARE_MSM_GPIO_PINS(43); 162 DECLARE_MSM_GPIO_PINS(44); 163 DECLARE_MSM_GPIO_PINS(45); 164 DECLARE_MSM_GPIO_PINS(46); 165 DECLARE_MSM_GPIO_PINS(47); 166 DECLARE_MSM_GPIO_PINS(48); 167 DECLARE_MSM_GPIO_PINS(49); 168 DECLARE_MSM_GPIO_PINS(50); 169 DECLARE_MSM_GPIO_PINS(51); 170 DECLARE_MSM_GPIO_PINS(52); 171 172 enum ipq5332_functions { 173 msm_mux_atest_char, 174 msm_mux_atest_char0, 175 msm_mux_atest_char1, 176 msm_mux_atest_char2, 177 msm_mux_atest_char3, 178 msm_mux_atest_tic, 179 msm_mux_audio_pri, 180 msm_mux_audio_pri0, 181 msm_mux_audio_pri1, 182 msm_mux_audio_sec, 183 msm_mux_audio_sec0, 184 msm_mux_audio_sec1, 185 msm_mux_blsp0_i2c, 186 msm_mux_blsp0_spi, 187 msm_mux_blsp0_uart0, 188 msm_mux_blsp0_uart1, 189 msm_mux_blsp1_i2c0, 190 msm_mux_blsp1_i2c1, 191 msm_mux_blsp1_spi0, 192 msm_mux_blsp1_spi1, 193 msm_mux_blsp1_uart0, 194 msm_mux_blsp1_uart1, 195 msm_mux_blsp1_uart2, 196 msm_mux_blsp2_i2c0, 197 msm_mux_blsp2_i2c1, 198 msm_mux_blsp2_spi, 199 msm_mux_blsp2_spi0, 200 msm_mux_blsp2_spi1, 201 msm_mux_core_voltage, 202 msm_mux_cri_trng0, 203 msm_mux_cri_trng1, 204 msm_mux_cri_trng2, 205 msm_mux_cri_trng3, 206 msm_mux_cxc_clk, 207 msm_mux_cxc_data, 208 msm_mux_dbg_out, 209 msm_mux_gcc_plltest, 210 msm_mux_gcc_tlmm, 211 msm_mux_gpio, 212 msm_mux_lock_det, 213 msm_mux_mac0, 214 msm_mux_mac1, 215 msm_mux_mdc0, 216 msm_mux_mdc1, 217 msm_mux_mdio0, 218 msm_mux_mdio1, 219 msm_mux_pc, 220 msm_mux_pcie0_clk, 221 msm_mux_pcie0_wake, 222 msm_mux_pcie1_clk, 223 msm_mux_pcie1_wake, 224 msm_mux_pcie2_clk, 225 msm_mux_pcie2_wake, 226 msm_mux_pll_test, 227 msm_mux_prng_rosc0, 228 msm_mux_prng_rosc1, 229 msm_mux_prng_rosc2, 230 msm_mux_prng_rosc3, 231 msm_mux_pta, 232 msm_mux_pwm0, 233 msm_mux_pwm1, 234 msm_mux_pwm2, 235 msm_mux_pwm3, 236 msm_mux_qdss_cti_trig_in_a0, 237 msm_mux_qdss_cti_trig_in_a1, 238 msm_mux_qdss_cti_trig_in_b0, 239 msm_mux_qdss_cti_trig_in_b1, 240 msm_mux_qdss_cti_trig_out_a0, 241 msm_mux_qdss_cti_trig_out_a1, 242 msm_mux_qdss_cti_trig_out_b0, 243 msm_mux_qdss_cti_trig_out_b1, 244 msm_mux_qdss_traceclk_a, 245 msm_mux_qdss_traceclk_b, 246 msm_mux_qdss_tracectl_a, 247 msm_mux_qdss_tracectl_b, 248 msm_mux_qdss_tracedata_a, 249 msm_mux_qdss_tracedata_b, 250 msm_mux_qspi_data, 251 msm_mux_qspi_clk, 252 msm_mux_qspi_cs, 253 msm_mux_resout, 254 msm_mux_rx0, 255 msm_mux_rx1, 256 msm_mux_sdc_data, 257 msm_mux_sdc_clk, 258 msm_mux_sdc_cmd, 259 msm_mux_tsens_max, 260 msm_mux_wci_txd, 261 msm_mux_wci_rxd, 262 msm_mux_wsi_clk, 263 msm_mux_wsi_clk3, 264 msm_mux_wsi_data, 265 msm_mux_wsi_data3, 266 msm_mux_wsis_reset, 267 msm_mux_xfem, 268 msm_mux__, 269 }; 270 271 static const char * const gpio_groups[] = { 272 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", 273 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14", 274 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21", 275 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", 276 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35", 277 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42", 278 "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49", 279 "gpio50", "gpio51", "gpio52", 280 }; 281 282 static const char * const atest_char_groups[] = { 283 "gpio46", 284 }; 285 286 static const char * const atest_char0_groups[] = { 287 "gpio0", 288 }; 289 290 static const char * const atest_char1_groups[] = { 291 "gpio1", 292 }; 293 294 static const char * const atest_char2_groups[] = { 295 "gpio2", 296 }; 297 298 static const char * const atest_char3_groups[] = { 299 "gpio3", 300 }; 301 302 static const char * const atest_tic_groups[] = { 303 "gpio9", 304 }; 305 306 static const char * const audio_pri_groups[] = { 307 "gpio29", "gpio30", "gpio31", "gpio32", 308 }; 309 310 static const char * const audio_pri0_groups[] = { 311 "gpio34", "gpio34", 312 }; 313 314 static const char * const audio_pri1_groups[] = { 315 "gpio43", "gpio43", 316 }; 317 318 static const char * const audio_sec_groups[] = { 319 "gpio33", "gpio34", "gpio35", "gpio36", 320 }; 321 322 static const char * const audio_sec0_groups[] = { 323 "gpio30", "gpio30", 324 }; 325 326 static const char * const audio_sec1_groups[] = { 327 "gpio45", "gpio45", 328 }; 329 330 static const char * const blsp0_i2c_groups[] = { 331 "gpio16", "gpio17", 332 }; 333 334 static const char * const blsp0_spi_groups[] = { 335 "gpio14", "gpio15", "gpio16", "gpio17", 336 }; 337 338 static const char * const blsp0_uart0_groups[] = { 339 "gpio18", "gpio19", 340 }; 341 342 static const char * const blsp0_uart1_groups[] = { 343 "gpio27", "gpio28", 344 }; 345 346 static const char * const blsp1_i2c0_groups[] = { 347 "gpio29", "gpio30", 348 }; 349 350 static const char * const blsp1_i2c1_groups[] = { 351 "gpio40", "gpio41", 352 }; 353 354 static const char * const blsp1_spi0_groups[] = { 355 "gpio29", "gpio30", "gpio31", "gpio32", 356 }; 357 358 static const char * const blsp1_spi1_groups[] = { 359 "gpio25", "gpio26", "gpio27", "gpio28", 360 }; 361 362 static const char * const blsp1_uart0_groups[] = { 363 "gpio14", "gpio15", "gpio16", "gpio17", 364 }; 365 366 static const char * const blsp1_uart1_groups[] = { 367 "gpio25", "gpio26", "gpio27", "gpio28", 368 }; 369 370 static const char * const blsp1_uart2_groups[] = { 371 "gpio33", "gpio34", "gpio35", "gpio36", 372 }; 373 374 static const char * const blsp2_i2c0_groups[] = { 375 "gpio43", "gpio45", 376 }; 377 378 static const char * const blsp2_i2c1_groups[] = { 379 "gpio33", "gpio34", 380 }; 381 382 static const char * const blsp2_spi_groups[] = { 383 "gpio37", 384 }; 385 386 static const char * const blsp2_spi0_groups[] = { 387 "gpio33", "gpio34", "gpio35", "gpio36", 388 }; 389 390 static const char * const blsp2_spi1_groups[] = { 391 "gpio40", "gpio41", "gpio42", "gpio52", 392 }; 393 394 static const char * const core_voltage_groups[] = { 395 "gpio21", "gpio23", 396 }; 397 398 static const char * const cri_trng0_groups[] = { 399 "gpio17", 400 }; 401 402 static const char * const cri_trng1_groups[] = { 403 "gpio18", 404 }; 405 406 static const char * const cri_trng2_groups[] = { 407 "gpio19", 408 }; 409 410 static const char * const cri_trng3_groups[] = { 411 "gpio20", 412 }; 413 414 static const char * const cxc_clk_groups[] = { 415 "gpio49", 416 }; 417 418 static const char * const cxc_data_groups[] = { 419 "gpio50", 420 }; 421 422 static const char * const dbg_out_groups[] = { 423 "gpio48", 424 }; 425 426 static const char * const gcc_plltest_groups[] = { 427 "gpio43", "gpio45", 428 }; 429 430 static const char * const gcc_tlmm_groups[] = { 431 "gpio44", 432 }; 433 434 static const char * const lock_det_groups[] = { 435 "gpio51", 436 }; 437 438 static const char * const mac0_groups[] = { 439 "gpio18", 440 }; 441 442 static const char * const mac1_groups[] = { 443 "gpio19", 444 }; 445 446 static const char * const mdc0_groups[] = { 447 "gpio25", 448 }; 449 450 static const char * const mdc1_groups[] = { 451 "gpio27", 452 }; 453 454 static const char * const mdio0_groups[] = { 455 "gpio26", 456 }; 457 458 static const char * const mdio1_groups[] = { 459 "gpio28", 460 }; 461 462 static const char * const pc_groups[] = { 463 "gpio35", 464 }; 465 466 static const char * const pcie0_clk_groups[] = { 467 "gpio37", 468 }; 469 470 static const char * const pcie0_wake_groups[] = { 471 "gpio39", 472 }; 473 474 static const char * const pcie1_clk_groups[] = { 475 "gpio46", 476 }; 477 478 static const char * const pcie1_wake_groups[] = { 479 "gpio48", 480 }; 481 482 static const char * const pcie2_clk_groups[] = { 483 "gpio43", 484 }; 485 486 static const char * const pcie2_wake_groups[] = { 487 "gpio45", 488 }; 489 490 static const char * const pll_test_groups[] = { 491 "gpio49", 492 }; 493 494 static const char * const prng_rosc0_groups[] = { 495 "gpio22", 496 }; 497 498 static const char * const prng_rosc1_groups[] = { 499 "gpio24", 500 }; 501 502 static const char * const prng_rosc2_groups[] = { 503 "gpio25", 504 }; 505 506 static const char * const prng_rosc3_groups[] = { 507 "gpio26", 508 }; 509 510 static const char * const pta_groups[] = { 511 "gpio49", "gpio50", "gpio51", 512 }; 513 514 static const char * const pwm0_groups[] = { 515 "gpio43", "gpio44", "gpio45", "gpio46", 516 }; 517 518 static const char * const pwm1_groups[] = { 519 "gpio29", "gpio30", "gpio31", "gpio32", 520 }; 521 522 static const char * const pwm2_groups[] = { 523 "gpio25", "gpio26", "gpio27", "gpio28", 524 }; 525 526 static const char * const pwm3_groups[] = { 527 "gpio8", "gpio9", "gpio10", "gpio11", 528 }; 529 530 static const char * const qdss_cti_trig_in_a0_groups[] = { 531 "gpio5", 532 }; 533 534 static const char * const qdss_cti_trig_in_a1_groups[] = { 535 "gpio7", 536 }; 537 538 static const char * const qdss_cti_trig_in_b0_groups[] = { 539 "gpio47", 540 }; 541 542 static const char * const qdss_cti_trig_in_b1_groups[] = { 543 "gpio49", 544 }; 545 546 static const char * const qdss_cti_trig_out_a0_groups[] = { 547 "gpio4", 548 }; 549 550 static const char * const qdss_cti_trig_out_a1_groups[] = { 551 "gpio6", 552 }; 553 554 static const char * const qdss_cti_trig_out_b0_groups[] = { 555 "gpio46", 556 }; 557 558 static const char * const qdss_cti_trig_out_b1_groups[] = { 559 "gpio48", 560 }; 561 562 static const char * const qdss_traceclk_a_groups[] = { 563 "gpio8", 564 }; 565 566 static const char * const qdss_traceclk_b_groups[] = { 567 "gpio45", 568 }; 569 570 static const char * const qdss_tracectl_a_groups[] = { 571 "gpio9", 572 }; 573 574 static const char * const qdss_tracectl_b_groups[] = { 575 "gpio44", 576 }; 577 578 static const char * const qdss_tracedata_a_groups[] = { 579 "gpio10", "gpio11", "gpio12", "gpio13", "gpio14", "gpio15", "gpio16", 580 "gpio17", "gpio18", "gpio19", "gpio20", "gpio22", "gpio24", "gpio25", 581 "gpio26", "gpio27", 582 }; 583 584 static const char * const qdss_tracedata_b_groups[] = { 585 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35", 586 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42", 587 "gpio43", "gpio52", 588 }; 589 590 static const char * const qspi_clk_groups[] = { 591 "gpio13", 592 }; 593 594 static const char * const qspi_cs_groups[] = { 595 "gpio12", 596 }; 597 598 static const char * const qspi_data_groups[] = { 599 "gpio8", "gpio9", "gpio10", "gpio11", 600 }; 601 602 static const char * const resout_groups[] = { 603 "gpio20", 604 }; 605 606 static const char * const rx0_groups[] = { 607 "gpio48", 608 }; 609 610 static const char * const rx1_groups[] = { 611 "gpio45", 612 }; 613 614 static const char * const sdc_clk_groups[] = { 615 "gpio13", 616 }; 617 618 static const char * const sdc_cmd_groups[] = { 619 "gpio12", 620 }; 621 622 static const char * const sdc_data_groups[] = { 623 "gpio8", "gpio9", "gpio10", "gpio11", 624 }; 625 626 static const char * const tsens_max_groups[] = { 627 "gpio28", 628 }; 629 630 static const char * const wci_txd_groups[] = { 631 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", 632 "gpio36", "gpio43", "gpio45", 633 }; 634 635 static const char * const wci_rxd_groups[] = { 636 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", 637 "gpio35", "gpio36", "gpio43", "gpio45", 638 }; 639 640 static const char * const wsi_clk_groups[] = { 641 "gpio40", "gpio42", 642 }; 643 644 static const char * const wsi_clk3_groups[] = { 645 "gpio43", 646 }; 647 648 static const char * const wsi_data_groups[] = { 649 "gpio41", "gpio52", 650 }; 651 652 static const char * const wsi_data3_groups[] = { 653 "gpio44", 654 }; 655 656 static const char * const wsis_reset_groups[] = { 657 "gpio41", 658 }; 659 660 static const char * const xfem_groups[] = { 661 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", 662 }; 663 664 static const struct msm_function ipq5332_functions[] = { 665 FUNCTION(atest_char), 666 FUNCTION(atest_char0), 667 FUNCTION(atest_char1), 668 FUNCTION(atest_char2), 669 FUNCTION(atest_char3), 670 FUNCTION(atest_tic), 671 FUNCTION(audio_pri), 672 FUNCTION(audio_pri0), 673 FUNCTION(audio_pri1), 674 FUNCTION(audio_sec), 675 FUNCTION(audio_sec0), 676 FUNCTION(audio_sec1), 677 FUNCTION(blsp0_i2c), 678 FUNCTION(blsp0_spi), 679 FUNCTION(blsp0_uart0), 680 FUNCTION(blsp0_uart1), 681 FUNCTION(blsp1_i2c0), 682 FUNCTION(blsp1_i2c1), 683 FUNCTION(blsp1_spi0), 684 FUNCTION(blsp1_spi1), 685 FUNCTION(blsp1_uart0), 686 FUNCTION(blsp1_uart1), 687 FUNCTION(blsp1_uart2), 688 FUNCTION(blsp2_i2c0), 689 FUNCTION(blsp2_i2c1), 690 FUNCTION(blsp2_spi), 691 FUNCTION(blsp2_spi0), 692 FUNCTION(blsp2_spi1), 693 FUNCTION(core_voltage), 694 FUNCTION(cri_trng0), 695 FUNCTION(cri_trng1), 696 FUNCTION(cri_trng2), 697 FUNCTION(cri_trng3), 698 FUNCTION(cxc_clk), 699 FUNCTION(cxc_data), 700 FUNCTION(dbg_out), 701 FUNCTION(gcc_plltest), 702 FUNCTION(gcc_tlmm), 703 FUNCTION(gpio), 704 FUNCTION(lock_det), 705 FUNCTION(mac0), 706 FUNCTION(mac1), 707 FUNCTION(mdc0), 708 FUNCTION(mdc1), 709 FUNCTION(mdio0), 710 FUNCTION(mdio1), 711 FUNCTION(pc), 712 FUNCTION(pcie0_clk), 713 FUNCTION(pcie0_wake), 714 FUNCTION(pcie1_clk), 715 FUNCTION(pcie1_wake), 716 FUNCTION(pcie2_clk), 717 FUNCTION(pcie2_wake), 718 FUNCTION(pll_test), 719 FUNCTION(prng_rosc0), 720 FUNCTION(prng_rosc1), 721 FUNCTION(prng_rosc2), 722 FUNCTION(prng_rosc3), 723 FUNCTION(pta), 724 FUNCTION(pwm0), 725 FUNCTION(pwm1), 726 FUNCTION(pwm2), 727 FUNCTION(pwm3), 728 FUNCTION(qdss_cti_trig_in_a0), 729 FUNCTION(qdss_cti_trig_in_a1), 730 FUNCTION(qdss_cti_trig_in_b0), 731 FUNCTION(qdss_cti_trig_in_b1), 732 FUNCTION(qdss_cti_trig_out_a0), 733 FUNCTION(qdss_cti_trig_out_a1), 734 FUNCTION(qdss_cti_trig_out_b0), 735 FUNCTION(qdss_cti_trig_out_b1), 736 FUNCTION(qdss_traceclk_a), 737 FUNCTION(qdss_traceclk_b), 738 FUNCTION(qdss_tracectl_a), 739 FUNCTION(qdss_tracectl_b), 740 FUNCTION(qdss_tracedata_a), 741 FUNCTION(qdss_tracedata_b), 742 FUNCTION(qspi_data), 743 FUNCTION(qspi_clk), 744 FUNCTION(qspi_cs), 745 FUNCTION(resout), 746 FUNCTION(rx0), 747 FUNCTION(rx1), 748 FUNCTION(sdc_data), 749 FUNCTION(sdc_clk), 750 FUNCTION(sdc_cmd), 751 FUNCTION(tsens_max), 752 FUNCTION(wci_txd), 753 FUNCTION(wci_rxd), 754 FUNCTION(wsi_clk), 755 FUNCTION(wsi_clk3), 756 FUNCTION(wsi_data), 757 FUNCTION(wsi_data3), 758 FUNCTION(wsis_reset), 759 FUNCTION(xfem), 760 }; 761 762 static const struct msm_pingroup ipq5332_groups[] = { 763 PINGROUP(0, atest_char0, wci_txd, wci_rxd, xfem, _, _, _, _, _), 764 PINGROUP(1, atest_char1, wci_txd, wci_rxd, xfem, _, _, _, _, _), 765 PINGROUP(2, atest_char2, wci_txd, wci_rxd, xfem, _, _, _, _, _), 766 PINGROUP(3, atest_char3, wci_txd, wci_rxd, xfem, _, _, _, _, _), 767 PINGROUP(4, qdss_cti_trig_out_a0, wci_txd, wci_rxd, xfem, _, _, _, _, _), 768 PINGROUP(5, qdss_cti_trig_in_a0, wci_txd, wci_rxd, xfem, _, _, _, _, _), 769 PINGROUP(6, qdss_cti_trig_out_a1, wci_txd, wci_rxd, xfem, _, _, _, _, _), 770 PINGROUP(7, qdss_cti_trig_in_a1, wci_txd, wci_rxd, xfem, _, _, _, _, _), 771 PINGROUP(8, sdc_data, qspi_data, pwm3, qdss_traceclk_a, _, _, _, _, _), 772 PINGROUP(9, sdc_data, qspi_data, pwm3, qdss_tracectl_a, _, atest_tic, _, _, _), 773 PINGROUP(10, sdc_data, qspi_data, pwm3, qdss_tracedata_a, _, _, _, _, _), 774 PINGROUP(11, sdc_data, qspi_data, pwm3, qdss_tracedata_a, _, _, _, _, _), 775 PINGROUP(12, sdc_cmd, qspi_cs, qdss_tracedata_a, _, _, _, _, _, _), 776 PINGROUP(13, sdc_clk, qspi_clk, qdss_tracedata_a, _, _, _, _, _, _), 777 PINGROUP(14, blsp0_spi, blsp1_uart0, qdss_tracedata_a, _, _, _, _, _, _), 778 PINGROUP(15, blsp0_spi, blsp1_uart0, qdss_tracedata_a, _, _, _, _, _, _), 779 PINGROUP(16, blsp0_spi, blsp0_i2c, blsp1_uart0, _, qdss_tracedata_a, _, _, _, _), 780 PINGROUP(17, blsp0_spi, blsp0_i2c, blsp1_uart0, _, cri_trng0, qdss_tracedata_a, _, _, _), 781 PINGROUP(18, blsp0_uart0, mac0, _, cri_trng1, qdss_tracedata_a, _, _, _, _), 782 PINGROUP(19, blsp0_uart0, mac1, _, cri_trng2, qdss_tracedata_a, _, _, _, _), 783 PINGROUP(20, resout, _, cri_trng3, qdss_tracedata_a, _, _, _, _, _), 784 PINGROUP(21, core_voltage, _, _, _, _, _, _, _, _), 785 PINGROUP(22, _, prng_rosc0, qdss_tracedata_a, _, _, _, _, _, _), 786 PINGROUP(23, core_voltage, _, _, _, _, _, _, _, _), 787 PINGROUP(24, _, prng_rosc1, qdss_tracedata_a, _, _, _, _, _, _), 788 PINGROUP(25, mdc0, blsp1_uart1, blsp1_spi1, pwm2, _, _, prng_rosc2, qdss_tracedata_a, _), 789 PINGROUP(26, mdio0, blsp1_uart1, blsp1_spi1, pwm2, _, _, prng_rosc3, qdss_tracedata_a, _), 790 PINGROUP(27, mdc1, blsp0_uart1, blsp1_uart1, blsp1_spi1, pwm2, _, _, qdss_tracedata_a, _), 791 PINGROUP(28, mdio1, blsp0_uart1, blsp1_uart1, blsp1_spi1, pwm2, _, tsens_max, _, _), 792 PINGROUP(29, audio_pri, blsp1_spi0, blsp1_i2c0, pwm1, _, qdss_tracedata_b, _, _, _), 793 PINGROUP(30, audio_pri, blsp1_spi0, blsp1_i2c0, pwm1, audio_sec0, audio_sec0, _, qdss_tracedata_b, _), 794 PINGROUP(31, audio_pri, blsp1_spi0, pwm1, _, qdss_tracedata_b, _, _, _, _), 795 PINGROUP(32, audio_pri, blsp1_spi0, pwm1, _, qdss_tracedata_b, _, _, _, _), 796 PINGROUP(33, audio_sec, blsp1_uart2, blsp2_i2c1, blsp2_spi0, _, qdss_tracedata_b, _, _, _), 797 PINGROUP(34, audio_sec, blsp1_uart2, blsp2_i2c1, blsp2_spi0, audio_pri0, audio_pri0, _, qdss_tracedata_b, _), 798 PINGROUP(35, audio_sec, blsp1_uart2, pc, wci_rxd, blsp2_spi0, _, qdss_tracedata_b, _, _), 799 PINGROUP(36, audio_sec, blsp1_uart2, wci_txd, wci_rxd, blsp2_spi0, _, qdss_tracedata_b, _, _), 800 PINGROUP(37, pcie0_clk, blsp2_spi, _, qdss_tracedata_b, _, _, _, _, _), 801 PINGROUP(38, _, qdss_tracedata_b, _, _, _, _, _, _, _), 802 PINGROUP(39, pcie0_wake, _, qdss_tracedata_b, _, _, _, _, _, _), 803 PINGROUP(40, wsi_clk, blsp1_i2c1, blsp2_spi1, _, _, qdss_tracedata_b, _, _, _), 804 PINGROUP(41, wsi_data, blsp1_i2c1, blsp2_spi1, _, _, qdss_tracedata_b, _, wsis_reset, _), 805 PINGROUP(42, wsi_clk, blsp2_spi1, _, qdss_tracedata_b, _, _, _, _, _), 806 PINGROUP(43, pcie2_clk, wci_txd, wci_rxd, blsp2_i2c0, pwm0, audio_pri1, audio_pri1, _, gcc_plltest), 807 PINGROUP(44, pwm0, _, gcc_tlmm, qdss_tracectl_b, _, wsi_data3, _, _, _), 808 PINGROUP(45, pcie2_wake, wci_txd, wci_rxd, blsp2_i2c0, rx1, pwm0, audio_sec1, audio_sec1, _), 809 PINGROUP(46, pcie1_clk, atest_char, pwm0, _, qdss_cti_trig_out_b0, _, _, _, _), 810 PINGROUP(47, _, qdss_cti_trig_in_b0, _, _, _, _, _, _, _), 811 PINGROUP(48, pcie1_wake, rx0, dbg_out, qdss_cti_trig_out_b1, _, _, _, _, _), 812 PINGROUP(49, pta, cxc_clk, pll_test, _, qdss_cti_trig_in_b1, _, _, _, _), 813 PINGROUP(50, pta, cxc_data, _, _, _, _, _, _, _), 814 PINGROUP(51, pta, lock_det, _, _, _, _, _, _, _), 815 PINGROUP(52, wsi_data, blsp2_spi1, _, qdss_tracedata_b, _, _, _, _, _), 816 }; 817 818 static const struct msm_pinctrl_soc_data ipq5332_pinctrl = { 819 .pins = ipq5332_pins, 820 .npins = ARRAY_SIZE(ipq5332_pins), 821 .functions = ipq5332_functions, 822 .nfunctions = ARRAY_SIZE(ipq5332_functions), 823 .groups = ipq5332_groups, 824 .ngroups = ARRAY_SIZE(ipq5332_groups), 825 .ngpios = 53, 826 }; 827 828 static int ipq5332_pinctrl_probe(struct platform_device *pdev) 829 { 830 return msm_pinctrl_probe(pdev, &ipq5332_pinctrl); 831 } 832 833 static const struct of_device_id ipq5332_pinctrl_of_match[] = { 834 { .compatible = "qcom,ipq5332-tlmm", }, 835 { }, 836 }; 837 MODULE_DEVICE_TABLE(of, ipq5332_pinctrl_of_match); 838 839 static struct platform_driver ipq5332_pinctrl_driver = { 840 .driver = { 841 .name = "ipq5332-tlmm", 842 .of_match_table = ipq5332_pinctrl_of_match, 843 }, 844 .probe = ipq5332_pinctrl_probe, 845 .remove = msm_pinctrl_remove, 846 }; 847 848 static int __init ipq5332_pinctrl_init(void) 849 { 850 return platform_driver_register(&ipq5332_pinctrl_driver); 851 } 852 arch_initcall(ipq5332_pinctrl_init); 853 854 static void __exit ipq5332_pinctrl_exit(void) 855 { 856 platform_driver_unregister(&ipq5332_pinctrl_driver); 857 } 858 module_exit(ipq5332_pinctrl_exit); 859 860 MODULE_DESCRIPTION("QTI IPQ5332 TLMM driver"); 861 MODULE_LICENSE("GPL"); 862