1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. 4 */ 5 6 #include <linux/module.h> 7 #include <linux/of.h> 8 #include <linux/platform_device.h> 9 10 #include "pinctrl-msm.h" 11 12 #define REG_SIZE 0x1000 13 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11) \ 14 { \ 15 .grp = PINCTRL_PINGROUP("gpio" #id, \ 16 gpio##id##_pins, \ 17 ARRAY_SIZE(gpio##id##_pins)), \ 18 .funcs = (int[]){ \ 19 msm_mux_gpio, /* gpio mode */ \ 20 msm_mux_##f1, \ 21 msm_mux_##f2, \ 22 msm_mux_##f3, \ 23 msm_mux_##f4, \ 24 msm_mux_##f5, \ 25 msm_mux_##f6, \ 26 msm_mux_##f7, \ 27 msm_mux_##f8, \ 28 msm_mux_##f9, \ 29 msm_mux_##f10, \ 30 msm_mux_##f11 /* egpio mode */ \ 31 }, \ 32 .nfuncs = 12, \ 33 .ctl_reg = REG_SIZE * id, \ 34 .io_reg = 0x4 + REG_SIZE * id, \ 35 .intr_cfg_reg = 0x8 + REG_SIZE * id, \ 36 .intr_status_reg = 0xc + REG_SIZE * id, \ 37 .mux_bit = 2, \ 38 .pull_bit = 0, \ 39 .drv_bit = 6, \ 40 .egpio_enable = 12, \ 41 .egpio_present = 11, \ 42 .oe_bit = 9, \ 43 .in_bit = 0, \ 44 .out_bit = 1, \ 45 .intr_enable_bit = 0, \ 46 .intr_status_bit = 0, \ 47 .intr_wakeup_present_bit = 6, \ 48 .intr_wakeup_enable_bit = 7, \ 49 .intr_target_bit = 8, \ 50 .intr_target_width = 4, \ 51 .intr_target_kpss_val = 3, \ 52 .intr_raw_status_bit = 4, \ 53 .intr_polarity_bit = 1, \ 54 .intr_detection_bit = 2, \ 55 .intr_detection_width = 2, \ 56 } 57 58 #define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv) \ 59 { \ 60 .grp = PINCTRL_PINGROUP(#pg_name, \ 61 pg_name##_pins, \ 62 ARRAY_SIZE(pg_name##_pins)), \ 63 .ctl_reg = ctl, \ 64 .io_reg = 0, \ 65 .intr_cfg_reg = 0, \ 66 .intr_status_reg = 0, \ 67 .intr_target_reg = 0, \ 68 .mux_bit = -1, \ 69 .pull_bit = pull, \ 70 .drv_bit = drv, \ 71 .oe_bit = -1, \ 72 .in_bit = -1, \ 73 .out_bit = -1, \ 74 .intr_enable_bit = -1, \ 75 .intr_status_bit = -1, \ 76 .intr_target_bit = -1, \ 77 .intr_raw_status_bit = -1, \ 78 .intr_polarity_bit = -1, \ 79 .intr_detection_bit = -1, \ 80 .intr_detection_width = -1, \ 81 } 82 83 #define UFS_RESET(pg_name, ctl, io) \ 84 { \ 85 .grp = PINCTRL_PINGROUP(#pg_name, \ 86 pg_name##_pins, \ 87 ARRAY_SIZE(pg_name##_pins)), \ 88 .ctl_reg = ctl, \ 89 .io_reg = io, \ 90 .intr_cfg_reg = 0, \ 91 .intr_status_reg = 0, \ 92 .intr_target_reg = 0, \ 93 .mux_bit = -1, \ 94 .pull_bit = 3, \ 95 .drv_bit = 0, \ 96 .oe_bit = -1, \ 97 .in_bit = -1, \ 98 .out_bit = 0, \ 99 .intr_enable_bit = -1, \ 100 .intr_status_bit = -1, \ 101 .intr_target_bit = -1, \ 102 .intr_raw_status_bit = -1, \ 103 .intr_polarity_bit = -1, \ 104 .intr_detection_bit = -1, \ 105 .intr_detection_width = -1, \ 106 } 107 108 static const struct pinctrl_pin_desc hawi_pins[] = { 109 PINCTRL_PIN(0, "GPIO_0"), 110 PINCTRL_PIN(1, "GPIO_1"), 111 PINCTRL_PIN(2, "GPIO_2"), 112 PINCTRL_PIN(3, "GPIO_3"), 113 PINCTRL_PIN(4, "GPIO_4"), 114 PINCTRL_PIN(5, "GPIO_5"), 115 PINCTRL_PIN(6, "GPIO_6"), 116 PINCTRL_PIN(7, "GPIO_7"), 117 PINCTRL_PIN(8, "GPIO_8"), 118 PINCTRL_PIN(9, "GPIO_9"), 119 PINCTRL_PIN(10, "GPIO_10"), 120 PINCTRL_PIN(11, "GPIO_11"), 121 PINCTRL_PIN(12, "GPIO_12"), 122 PINCTRL_PIN(13, "GPIO_13"), 123 PINCTRL_PIN(14, "GPIO_14"), 124 PINCTRL_PIN(15, "GPIO_15"), 125 PINCTRL_PIN(16, "GPIO_16"), 126 PINCTRL_PIN(17, "GPIO_17"), 127 PINCTRL_PIN(18, "GPIO_18"), 128 PINCTRL_PIN(19, "GPIO_19"), 129 PINCTRL_PIN(20, "GPIO_20"), 130 PINCTRL_PIN(21, "GPIO_21"), 131 PINCTRL_PIN(22, "GPIO_22"), 132 PINCTRL_PIN(23, "GPIO_23"), 133 PINCTRL_PIN(24, "GPIO_24"), 134 PINCTRL_PIN(25, "GPIO_25"), 135 PINCTRL_PIN(26, "GPIO_26"), 136 PINCTRL_PIN(27, "GPIO_27"), 137 PINCTRL_PIN(28, "GPIO_28"), 138 PINCTRL_PIN(29, "GPIO_29"), 139 PINCTRL_PIN(30, "GPIO_30"), 140 PINCTRL_PIN(31, "GPIO_31"), 141 PINCTRL_PIN(32, "GPIO_32"), 142 PINCTRL_PIN(33, "GPIO_33"), 143 PINCTRL_PIN(34, "GPIO_34"), 144 PINCTRL_PIN(35, "GPIO_35"), 145 PINCTRL_PIN(36, "GPIO_36"), 146 PINCTRL_PIN(37, "GPIO_37"), 147 PINCTRL_PIN(38, "GPIO_38"), 148 PINCTRL_PIN(39, "GPIO_39"), 149 PINCTRL_PIN(40, "GPIO_40"), 150 PINCTRL_PIN(41, "GPIO_41"), 151 PINCTRL_PIN(42, "GPIO_42"), 152 PINCTRL_PIN(43, "GPIO_43"), 153 PINCTRL_PIN(44, "GPIO_44"), 154 PINCTRL_PIN(45, "GPIO_45"), 155 PINCTRL_PIN(46, "GPIO_46"), 156 PINCTRL_PIN(47, "GPIO_47"), 157 PINCTRL_PIN(48, "GPIO_48"), 158 PINCTRL_PIN(49, "GPIO_49"), 159 PINCTRL_PIN(50, "GPIO_50"), 160 PINCTRL_PIN(51, "GPIO_51"), 161 PINCTRL_PIN(52, "GPIO_52"), 162 PINCTRL_PIN(53, "GPIO_53"), 163 PINCTRL_PIN(54, "GPIO_54"), 164 PINCTRL_PIN(55, "GPIO_55"), 165 PINCTRL_PIN(56, "GPIO_56"), 166 PINCTRL_PIN(57, "GPIO_57"), 167 PINCTRL_PIN(58, "GPIO_58"), 168 PINCTRL_PIN(59, "GPIO_59"), 169 PINCTRL_PIN(60, "GPIO_60"), 170 PINCTRL_PIN(61, "GPIO_61"), 171 PINCTRL_PIN(62, "GPIO_62"), 172 PINCTRL_PIN(63, "GPIO_63"), 173 PINCTRL_PIN(64, "GPIO_64"), 174 PINCTRL_PIN(65, "GPIO_65"), 175 PINCTRL_PIN(66, "GPIO_66"), 176 PINCTRL_PIN(67, "GPIO_67"), 177 PINCTRL_PIN(68, "GPIO_68"), 178 PINCTRL_PIN(69, "GPIO_69"), 179 PINCTRL_PIN(70, "GPIO_70"), 180 PINCTRL_PIN(71, "GPIO_71"), 181 PINCTRL_PIN(72, "GPIO_72"), 182 PINCTRL_PIN(73, "GPIO_73"), 183 PINCTRL_PIN(74, "GPIO_74"), 184 PINCTRL_PIN(75, "GPIO_75"), 185 PINCTRL_PIN(76, "GPIO_76"), 186 PINCTRL_PIN(77, "GPIO_77"), 187 PINCTRL_PIN(78, "GPIO_78"), 188 PINCTRL_PIN(79, "GPIO_79"), 189 PINCTRL_PIN(80, "GPIO_80"), 190 PINCTRL_PIN(81, "GPIO_81"), 191 PINCTRL_PIN(82, "GPIO_82"), 192 PINCTRL_PIN(83, "GPIO_83"), 193 PINCTRL_PIN(84, "GPIO_84"), 194 PINCTRL_PIN(85, "GPIO_85"), 195 PINCTRL_PIN(86, "GPIO_86"), 196 PINCTRL_PIN(87, "GPIO_87"), 197 PINCTRL_PIN(88, "GPIO_88"), 198 PINCTRL_PIN(89, "GPIO_89"), 199 PINCTRL_PIN(90, "GPIO_90"), 200 PINCTRL_PIN(91, "GPIO_91"), 201 PINCTRL_PIN(92, "GPIO_92"), 202 PINCTRL_PIN(93, "GPIO_93"), 203 PINCTRL_PIN(94, "GPIO_94"), 204 PINCTRL_PIN(95, "GPIO_95"), 205 PINCTRL_PIN(96, "GPIO_96"), 206 PINCTRL_PIN(97, "GPIO_97"), 207 PINCTRL_PIN(98, "GPIO_98"), 208 PINCTRL_PIN(99, "GPIO_99"), 209 PINCTRL_PIN(100, "GPIO_100"), 210 PINCTRL_PIN(101, "GPIO_101"), 211 PINCTRL_PIN(102, "GPIO_102"), 212 PINCTRL_PIN(103, "GPIO_103"), 213 PINCTRL_PIN(104, "GPIO_104"), 214 PINCTRL_PIN(105, "GPIO_105"), 215 PINCTRL_PIN(106, "GPIO_106"), 216 PINCTRL_PIN(107, "GPIO_107"), 217 PINCTRL_PIN(108, "GPIO_108"), 218 PINCTRL_PIN(109, "GPIO_109"), 219 PINCTRL_PIN(110, "GPIO_110"), 220 PINCTRL_PIN(111, "GPIO_111"), 221 PINCTRL_PIN(112, "GPIO_112"), 222 PINCTRL_PIN(113, "GPIO_113"), 223 PINCTRL_PIN(114, "GPIO_114"), 224 PINCTRL_PIN(115, "GPIO_115"), 225 PINCTRL_PIN(116, "GPIO_116"), 226 PINCTRL_PIN(117, "GPIO_117"), 227 PINCTRL_PIN(118, "GPIO_118"), 228 PINCTRL_PIN(119, "GPIO_119"), 229 PINCTRL_PIN(120, "GPIO_120"), 230 PINCTRL_PIN(121, "GPIO_121"), 231 PINCTRL_PIN(122, "GPIO_122"), 232 PINCTRL_PIN(123, "GPIO_123"), 233 PINCTRL_PIN(124, "GPIO_124"), 234 PINCTRL_PIN(125, "GPIO_125"), 235 PINCTRL_PIN(126, "GPIO_126"), 236 PINCTRL_PIN(127, "GPIO_127"), 237 PINCTRL_PIN(128, "GPIO_128"), 238 PINCTRL_PIN(129, "GPIO_129"), 239 PINCTRL_PIN(130, "GPIO_130"), 240 PINCTRL_PIN(131, "GPIO_131"), 241 PINCTRL_PIN(132, "GPIO_132"), 242 PINCTRL_PIN(133, "GPIO_133"), 243 PINCTRL_PIN(134, "GPIO_134"), 244 PINCTRL_PIN(135, "GPIO_135"), 245 PINCTRL_PIN(136, "GPIO_136"), 246 PINCTRL_PIN(137, "GPIO_137"), 247 PINCTRL_PIN(138, "GPIO_138"), 248 PINCTRL_PIN(139, "GPIO_139"), 249 PINCTRL_PIN(140, "GPIO_140"), 250 PINCTRL_PIN(141, "GPIO_141"), 251 PINCTRL_PIN(142, "GPIO_142"), 252 PINCTRL_PIN(143, "GPIO_143"), 253 PINCTRL_PIN(144, "GPIO_144"), 254 PINCTRL_PIN(145, "GPIO_145"), 255 PINCTRL_PIN(146, "GPIO_146"), 256 PINCTRL_PIN(147, "GPIO_147"), 257 PINCTRL_PIN(148, "GPIO_148"), 258 PINCTRL_PIN(149, "GPIO_149"), 259 PINCTRL_PIN(150, "GPIO_150"), 260 PINCTRL_PIN(151, "GPIO_151"), 261 PINCTRL_PIN(152, "GPIO_152"), 262 PINCTRL_PIN(153, "GPIO_153"), 263 PINCTRL_PIN(154, "GPIO_154"), 264 PINCTRL_PIN(155, "GPIO_155"), 265 PINCTRL_PIN(156, "GPIO_156"), 266 PINCTRL_PIN(157, "GPIO_157"), 267 PINCTRL_PIN(158, "GPIO_158"), 268 PINCTRL_PIN(159, "GPIO_159"), 269 PINCTRL_PIN(160, "GPIO_160"), 270 PINCTRL_PIN(161, "GPIO_161"), 271 PINCTRL_PIN(162, "GPIO_162"), 272 PINCTRL_PIN(163, "GPIO_163"), 273 PINCTRL_PIN(164, "GPIO_164"), 274 PINCTRL_PIN(165, "GPIO_165"), 275 PINCTRL_PIN(166, "GPIO_166"), 276 PINCTRL_PIN(167, "GPIO_167"), 277 PINCTRL_PIN(168, "GPIO_168"), 278 PINCTRL_PIN(169, "GPIO_169"), 279 PINCTRL_PIN(170, "GPIO_170"), 280 PINCTRL_PIN(171, "GPIO_171"), 281 PINCTRL_PIN(172, "GPIO_172"), 282 PINCTRL_PIN(173, "GPIO_173"), 283 PINCTRL_PIN(174, "GPIO_174"), 284 PINCTRL_PIN(175, "GPIO_175"), 285 PINCTRL_PIN(176, "GPIO_176"), 286 PINCTRL_PIN(177, "GPIO_177"), 287 PINCTRL_PIN(178, "GPIO_178"), 288 PINCTRL_PIN(179, "GPIO_179"), 289 PINCTRL_PIN(180, "GPIO_180"), 290 PINCTRL_PIN(181, "GPIO_181"), 291 PINCTRL_PIN(182, "GPIO_182"), 292 PINCTRL_PIN(183, "GPIO_183"), 293 PINCTRL_PIN(184, "GPIO_184"), 294 PINCTRL_PIN(185, "GPIO_185"), 295 PINCTRL_PIN(186, "GPIO_186"), 296 PINCTRL_PIN(187, "GPIO_187"), 297 PINCTRL_PIN(188, "GPIO_188"), 298 PINCTRL_PIN(189, "GPIO_189"), 299 PINCTRL_PIN(190, "GPIO_190"), 300 PINCTRL_PIN(191, "GPIO_191"), 301 PINCTRL_PIN(192, "GPIO_192"), 302 PINCTRL_PIN(193, "GPIO_193"), 303 PINCTRL_PIN(194, "GPIO_194"), 304 PINCTRL_PIN(195, "GPIO_195"), 305 PINCTRL_PIN(196, "GPIO_196"), 306 PINCTRL_PIN(197, "GPIO_197"), 307 PINCTRL_PIN(198, "GPIO_198"), 308 PINCTRL_PIN(199, "GPIO_199"), 309 PINCTRL_PIN(200, "GPIO_200"), 310 PINCTRL_PIN(201, "GPIO_201"), 311 PINCTRL_PIN(202, "GPIO_202"), 312 PINCTRL_PIN(203, "GPIO_203"), 313 PINCTRL_PIN(204, "GPIO_204"), 314 PINCTRL_PIN(205, "GPIO_205"), 315 PINCTRL_PIN(206, "GPIO_206"), 316 PINCTRL_PIN(207, "GPIO_207"), 317 PINCTRL_PIN(208, "GPIO_208"), 318 PINCTRL_PIN(209, "GPIO_209"), 319 PINCTRL_PIN(210, "GPIO_210"), 320 PINCTRL_PIN(211, "GPIO_211"), 321 PINCTRL_PIN(212, "GPIO_212"), 322 PINCTRL_PIN(213, "GPIO_213"), 323 PINCTRL_PIN(214, "GPIO_214"), 324 PINCTRL_PIN(215, "GPIO_215"), 325 PINCTRL_PIN(216, "GPIO_216"), 326 PINCTRL_PIN(217, "GPIO_217"), 327 PINCTRL_PIN(218, "GPIO_218"), 328 PINCTRL_PIN(219, "GPIO_219"), 329 PINCTRL_PIN(220, "GPIO_220"), 330 PINCTRL_PIN(221, "GPIO_221"), 331 PINCTRL_PIN(222, "GPIO_222"), 332 PINCTRL_PIN(223, "GPIO_223"), 333 PINCTRL_PIN(224, "GPIO_224"), 334 PINCTRL_PIN(225, "GPIO_225"), 335 PINCTRL_PIN(226, "UFS_RESET"), 336 PINCTRL_PIN(227, "SDC2_CLK"), 337 PINCTRL_PIN(228, "SDC2_CMD"), 338 PINCTRL_PIN(229, "SDC2_DATA"), 339 }; 340 341 #define DECLARE_MSM_GPIO_PINS(pin) \ 342 static const unsigned int gpio##pin##_pins[] = { pin } 343 DECLARE_MSM_GPIO_PINS(0); 344 DECLARE_MSM_GPIO_PINS(1); 345 DECLARE_MSM_GPIO_PINS(2); 346 DECLARE_MSM_GPIO_PINS(3); 347 DECLARE_MSM_GPIO_PINS(4); 348 DECLARE_MSM_GPIO_PINS(5); 349 DECLARE_MSM_GPIO_PINS(6); 350 DECLARE_MSM_GPIO_PINS(7); 351 DECLARE_MSM_GPIO_PINS(8); 352 DECLARE_MSM_GPIO_PINS(9); 353 DECLARE_MSM_GPIO_PINS(10); 354 DECLARE_MSM_GPIO_PINS(11); 355 DECLARE_MSM_GPIO_PINS(12); 356 DECLARE_MSM_GPIO_PINS(13); 357 DECLARE_MSM_GPIO_PINS(14); 358 DECLARE_MSM_GPIO_PINS(15); 359 DECLARE_MSM_GPIO_PINS(16); 360 DECLARE_MSM_GPIO_PINS(17); 361 DECLARE_MSM_GPIO_PINS(18); 362 DECLARE_MSM_GPIO_PINS(19); 363 DECLARE_MSM_GPIO_PINS(20); 364 DECLARE_MSM_GPIO_PINS(21); 365 DECLARE_MSM_GPIO_PINS(22); 366 DECLARE_MSM_GPIO_PINS(23); 367 DECLARE_MSM_GPIO_PINS(24); 368 DECLARE_MSM_GPIO_PINS(25); 369 DECLARE_MSM_GPIO_PINS(26); 370 DECLARE_MSM_GPIO_PINS(27); 371 DECLARE_MSM_GPIO_PINS(28); 372 DECLARE_MSM_GPIO_PINS(29); 373 DECLARE_MSM_GPIO_PINS(30); 374 DECLARE_MSM_GPIO_PINS(31); 375 DECLARE_MSM_GPIO_PINS(32); 376 DECLARE_MSM_GPIO_PINS(33); 377 DECLARE_MSM_GPIO_PINS(34); 378 DECLARE_MSM_GPIO_PINS(35); 379 DECLARE_MSM_GPIO_PINS(36); 380 DECLARE_MSM_GPIO_PINS(37); 381 DECLARE_MSM_GPIO_PINS(38); 382 DECLARE_MSM_GPIO_PINS(39); 383 DECLARE_MSM_GPIO_PINS(40); 384 DECLARE_MSM_GPIO_PINS(41); 385 DECLARE_MSM_GPIO_PINS(42); 386 DECLARE_MSM_GPIO_PINS(43); 387 DECLARE_MSM_GPIO_PINS(44); 388 DECLARE_MSM_GPIO_PINS(45); 389 DECLARE_MSM_GPIO_PINS(46); 390 DECLARE_MSM_GPIO_PINS(47); 391 DECLARE_MSM_GPIO_PINS(48); 392 DECLARE_MSM_GPIO_PINS(49); 393 DECLARE_MSM_GPIO_PINS(50); 394 DECLARE_MSM_GPIO_PINS(51); 395 DECLARE_MSM_GPIO_PINS(52); 396 DECLARE_MSM_GPIO_PINS(53); 397 DECLARE_MSM_GPIO_PINS(54); 398 DECLARE_MSM_GPIO_PINS(55); 399 DECLARE_MSM_GPIO_PINS(56); 400 DECLARE_MSM_GPIO_PINS(57); 401 DECLARE_MSM_GPIO_PINS(58); 402 DECLARE_MSM_GPIO_PINS(59); 403 DECLARE_MSM_GPIO_PINS(60); 404 DECLARE_MSM_GPIO_PINS(61); 405 DECLARE_MSM_GPIO_PINS(62); 406 DECLARE_MSM_GPIO_PINS(63); 407 DECLARE_MSM_GPIO_PINS(64); 408 DECLARE_MSM_GPIO_PINS(65); 409 DECLARE_MSM_GPIO_PINS(66); 410 DECLARE_MSM_GPIO_PINS(67); 411 DECLARE_MSM_GPIO_PINS(68); 412 DECLARE_MSM_GPIO_PINS(69); 413 DECLARE_MSM_GPIO_PINS(70); 414 DECLARE_MSM_GPIO_PINS(71); 415 DECLARE_MSM_GPIO_PINS(72); 416 DECLARE_MSM_GPIO_PINS(73); 417 DECLARE_MSM_GPIO_PINS(74); 418 DECLARE_MSM_GPIO_PINS(75); 419 DECLARE_MSM_GPIO_PINS(76); 420 DECLARE_MSM_GPIO_PINS(77); 421 DECLARE_MSM_GPIO_PINS(78); 422 DECLARE_MSM_GPIO_PINS(79); 423 DECLARE_MSM_GPIO_PINS(80); 424 DECLARE_MSM_GPIO_PINS(81); 425 DECLARE_MSM_GPIO_PINS(82); 426 DECLARE_MSM_GPIO_PINS(83); 427 DECLARE_MSM_GPIO_PINS(84); 428 DECLARE_MSM_GPIO_PINS(85); 429 DECLARE_MSM_GPIO_PINS(86); 430 DECLARE_MSM_GPIO_PINS(87); 431 DECLARE_MSM_GPIO_PINS(88); 432 DECLARE_MSM_GPIO_PINS(89); 433 DECLARE_MSM_GPIO_PINS(90); 434 DECLARE_MSM_GPIO_PINS(91); 435 DECLARE_MSM_GPIO_PINS(92); 436 DECLARE_MSM_GPIO_PINS(93); 437 DECLARE_MSM_GPIO_PINS(94); 438 DECLARE_MSM_GPIO_PINS(95); 439 DECLARE_MSM_GPIO_PINS(96); 440 DECLARE_MSM_GPIO_PINS(97); 441 DECLARE_MSM_GPIO_PINS(98); 442 DECLARE_MSM_GPIO_PINS(99); 443 DECLARE_MSM_GPIO_PINS(100); 444 DECLARE_MSM_GPIO_PINS(101); 445 DECLARE_MSM_GPIO_PINS(102); 446 DECLARE_MSM_GPIO_PINS(103); 447 DECLARE_MSM_GPIO_PINS(104); 448 DECLARE_MSM_GPIO_PINS(105); 449 DECLARE_MSM_GPIO_PINS(106); 450 DECLARE_MSM_GPIO_PINS(107); 451 DECLARE_MSM_GPIO_PINS(108); 452 DECLARE_MSM_GPIO_PINS(109); 453 DECLARE_MSM_GPIO_PINS(110); 454 DECLARE_MSM_GPIO_PINS(111); 455 DECLARE_MSM_GPIO_PINS(112); 456 DECLARE_MSM_GPIO_PINS(113); 457 DECLARE_MSM_GPIO_PINS(114); 458 DECLARE_MSM_GPIO_PINS(115); 459 DECLARE_MSM_GPIO_PINS(116); 460 DECLARE_MSM_GPIO_PINS(117); 461 DECLARE_MSM_GPIO_PINS(118); 462 DECLARE_MSM_GPIO_PINS(119); 463 DECLARE_MSM_GPIO_PINS(120); 464 DECLARE_MSM_GPIO_PINS(121); 465 DECLARE_MSM_GPIO_PINS(122); 466 DECLARE_MSM_GPIO_PINS(123); 467 DECLARE_MSM_GPIO_PINS(124); 468 DECLARE_MSM_GPIO_PINS(125); 469 DECLARE_MSM_GPIO_PINS(126); 470 DECLARE_MSM_GPIO_PINS(127); 471 DECLARE_MSM_GPIO_PINS(128); 472 DECLARE_MSM_GPIO_PINS(129); 473 DECLARE_MSM_GPIO_PINS(130); 474 DECLARE_MSM_GPIO_PINS(131); 475 DECLARE_MSM_GPIO_PINS(132); 476 DECLARE_MSM_GPIO_PINS(133); 477 DECLARE_MSM_GPIO_PINS(134); 478 DECLARE_MSM_GPIO_PINS(135); 479 DECLARE_MSM_GPIO_PINS(136); 480 DECLARE_MSM_GPIO_PINS(137); 481 DECLARE_MSM_GPIO_PINS(138); 482 DECLARE_MSM_GPIO_PINS(139); 483 DECLARE_MSM_GPIO_PINS(140); 484 DECLARE_MSM_GPIO_PINS(141); 485 DECLARE_MSM_GPIO_PINS(142); 486 DECLARE_MSM_GPIO_PINS(143); 487 DECLARE_MSM_GPIO_PINS(144); 488 DECLARE_MSM_GPIO_PINS(145); 489 DECLARE_MSM_GPIO_PINS(146); 490 DECLARE_MSM_GPIO_PINS(147); 491 DECLARE_MSM_GPIO_PINS(148); 492 DECLARE_MSM_GPIO_PINS(149); 493 DECLARE_MSM_GPIO_PINS(150); 494 DECLARE_MSM_GPIO_PINS(151); 495 DECLARE_MSM_GPIO_PINS(152); 496 DECLARE_MSM_GPIO_PINS(153); 497 DECLARE_MSM_GPIO_PINS(154); 498 DECLARE_MSM_GPIO_PINS(155); 499 DECLARE_MSM_GPIO_PINS(156); 500 DECLARE_MSM_GPIO_PINS(157); 501 DECLARE_MSM_GPIO_PINS(158); 502 DECLARE_MSM_GPIO_PINS(159); 503 DECLARE_MSM_GPIO_PINS(160); 504 DECLARE_MSM_GPIO_PINS(161); 505 DECLARE_MSM_GPIO_PINS(162); 506 DECLARE_MSM_GPIO_PINS(163); 507 DECLARE_MSM_GPIO_PINS(164); 508 DECLARE_MSM_GPIO_PINS(165); 509 DECLARE_MSM_GPIO_PINS(166); 510 DECLARE_MSM_GPIO_PINS(167); 511 DECLARE_MSM_GPIO_PINS(168); 512 DECLARE_MSM_GPIO_PINS(169); 513 DECLARE_MSM_GPIO_PINS(170); 514 DECLARE_MSM_GPIO_PINS(171); 515 DECLARE_MSM_GPIO_PINS(172); 516 DECLARE_MSM_GPIO_PINS(173); 517 DECLARE_MSM_GPIO_PINS(174); 518 DECLARE_MSM_GPIO_PINS(175); 519 DECLARE_MSM_GPIO_PINS(176); 520 DECLARE_MSM_GPIO_PINS(177); 521 DECLARE_MSM_GPIO_PINS(178); 522 DECLARE_MSM_GPIO_PINS(179); 523 DECLARE_MSM_GPIO_PINS(180); 524 DECLARE_MSM_GPIO_PINS(181); 525 DECLARE_MSM_GPIO_PINS(182); 526 DECLARE_MSM_GPIO_PINS(183); 527 DECLARE_MSM_GPIO_PINS(184); 528 DECLARE_MSM_GPIO_PINS(185); 529 DECLARE_MSM_GPIO_PINS(186); 530 DECLARE_MSM_GPIO_PINS(187); 531 DECLARE_MSM_GPIO_PINS(188); 532 DECLARE_MSM_GPIO_PINS(189); 533 DECLARE_MSM_GPIO_PINS(190); 534 DECLARE_MSM_GPIO_PINS(191); 535 DECLARE_MSM_GPIO_PINS(192); 536 DECLARE_MSM_GPIO_PINS(193); 537 DECLARE_MSM_GPIO_PINS(194); 538 DECLARE_MSM_GPIO_PINS(195); 539 DECLARE_MSM_GPIO_PINS(196); 540 DECLARE_MSM_GPIO_PINS(197); 541 DECLARE_MSM_GPIO_PINS(198); 542 DECLARE_MSM_GPIO_PINS(199); 543 DECLARE_MSM_GPIO_PINS(200); 544 DECLARE_MSM_GPIO_PINS(201); 545 DECLARE_MSM_GPIO_PINS(202); 546 DECLARE_MSM_GPIO_PINS(203); 547 DECLARE_MSM_GPIO_PINS(204); 548 DECLARE_MSM_GPIO_PINS(205); 549 DECLARE_MSM_GPIO_PINS(206); 550 DECLARE_MSM_GPIO_PINS(207); 551 DECLARE_MSM_GPIO_PINS(208); 552 DECLARE_MSM_GPIO_PINS(209); 553 DECLARE_MSM_GPIO_PINS(210); 554 DECLARE_MSM_GPIO_PINS(211); 555 DECLARE_MSM_GPIO_PINS(212); 556 DECLARE_MSM_GPIO_PINS(213); 557 DECLARE_MSM_GPIO_PINS(214); 558 DECLARE_MSM_GPIO_PINS(215); 559 DECLARE_MSM_GPIO_PINS(216); 560 DECLARE_MSM_GPIO_PINS(217); 561 DECLARE_MSM_GPIO_PINS(218); 562 DECLARE_MSM_GPIO_PINS(219); 563 DECLARE_MSM_GPIO_PINS(220); 564 DECLARE_MSM_GPIO_PINS(221); 565 DECLARE_MSM_GPIO_PINS(222); 566 DECLARE_MSM_GPIO_PINS(223); 567 DECLARE_MSM_GPIO_PINS(224); 568 DECLARE_MSM_GPIO_PINS(225); 569 570 static const unsigned int ufs_reset_pins[] = { 226 }; 571 static const unsigned int sdc2_clk_pins[] = { 227 }; 572 static const unsigned int sdc2_cmd_pins[] = { 228 }; 573 static const unsigned int sdc2_data_pins[] = { 229 }; 574 575 enum hawi_functions { 576 msm_mux_gpio, 577 msm_mux_aoss_cti, 578 msm_mux_atest_char, 579 msm_mux_atest_usb, 580 msm_mux_audio_ext_mclk, 581 msm_mux_audio_ref_clk, 582 msm_mux_cam_mclk, 583 msm_mux_cci_async_in, 584 msm_mux_cci_i2c0, 585 msm_mux_cci_i2c1, 586 msm_mux_cci_i2c2, 587 msm_mux_cci_i2c3, 588 msm_mux_cci_i2c4, 589 msm_mux_cci_i2c5, 590 msm_mux_cci_timer, 591 msm_mux_coex_espmi, 592 msm_mux_coex_uart1_rx, 593 msm_mux_coex_uart1_tx, 594 msm_mux_dbg_out_clk, 595 msm_mux_ddr_bist, 596 msm_mux_ddr_pxi, 597 msm_mux_dp_hot, 598 msm_mux_egpio, 599 msm_mux_gcc_gp, 600 msm_mux_gnss_adc, 601 msm_mux_host_rst, 602 msm_mux_i2chub0_se0, 603 msm_mux_i2chub0_se1, 604 msm_mux_i2chub0_se2, 605 msm_mux_i2chub0_se3, 606 msm_mux_i2chub0_se4, 607 msm_mux_i2s0, 608 msm_mux_i2s1, 609 msm_mux_ibi_i3c, 610 msm_mux_jitter_bist, 611 msm_mux_mdp_esync0, 612 msm_mux_mdp_esync1, 613 msm_mux_mdp_esync2, 614 msm_mux_mdp_vsync, 615 msm_mux_mdp_vsync_e, 616 msm_mux_mdp_vsync_p, 617 msm_mux_mdp_vsync0_out, 618 msm_mux_mdp_vsync1_out, 619 msm_mux_mdp_vsync2_out, 620 msm_mux_mdp_vsync3_out, 621 msm_mux_mdp_vsync5_out, 622 msm_mux_modem_pps_in, 623 msm_mux_modem_pps_out, 624 msm_mux_nav_gpio, 625 msm_mux_nav_gpio0, 626 msm_mux_nav_gpio3, 627 msm_mux_nav_rffe, 628 msm_mux_pcie0_clk_req_n, 629 msm_mux_pcie0_rst_n, 630 msm_mux_pcie1_clk_req_n, 631 msm_mux_phase_flag, 632 msm_mux_pll_bist_sync, 633 msm_mux_pll_clk_aux, 634 msm_mux_qdss_cti, 635 msm_mux_qlink, 636 msm_mux_qspi, 637 msm_mux_qspi_clk, 638 msm_mux_qspi_cs, 639 msm_mux_qup1_se0, 640 msm_mux_qup1_se1, 641 msm_mux_qup1_se2, 642 msm_mux_qup1_se3, 643 msm_mux_qup1_se4, 644 msm_mux_qup1_se5, 645 msm_mux_qup1_se6, 646 msm_mux_qup1_se7, 647 msm_mux_qup2_se0, 648 msm_mux_qup2_se1, 649 msm_mux_qup2_se2, 650 msm_mux_qup2_se3, 651 msm_mux_qup2_se4_01, 652 msm_mux_qup2_se4_23, 653 msm_mux_qup3_se0_01, 654 msm_mux_qup3_se0_23, 655 msm_mux_qup3_se1, 656 msm_mux_qup3_se2, 657 msm_mux_qup3_se3, 658 msm_mux_qup3_se4, 659 msm_mux_qup3_se5, 660 msm_mux_qup4_se0, 661 msm_mux_qup4_se1, 662 msm_mux_qup4_se2, 663 msm_mux_qup4_se3_01, 664 msm_mux_qup4_se3_23, 665 msm_mux_qup4_se3_l3, 666 msm_mux_qup4_se4_01, 667 msm_mux_qup4_se4_23, 668 msm_mux_qup4_se4_l3, 669 msm_mux_rng_rosc, 670 msm_mux_sd_write_protect, 671 msm_mux_sdc4_clk, 672 msm_mux_sdc4_cmd, 673 msm_mux_sdc4_data, 674 msm_mux_sys_throttle, 675 msm_mux_tb_trig_sdc, 676 msm_mux_tmess_rng, 677 msm_mux_tsense_clm, 678 msm_mux_tsense_pwm, 679 msm_mux_uim0, 680 msm_mux_uim1, 681 msm_mux_usb0_hs, 682 msm_mux_usb_phy, 683 msm_mux_vfr, 684 msm_mux_vsense_trigger_mirnat, 685 msm_mux_wcn_sw_ctrl, 686 msm_mux__, 687 }; 688 689 static const char *const gpio_groups[] = { 690 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", 691 "gpio6", "gpio7", "gpio8", "gpio9", "gpio10", "gpio11", 692 "gpio12", "gpio13", "gpio14", "gpio15", "gpio16", "gpio17", 693 "gpio18", "gpio19", "gpio20", "gpio21", "gpio22", "gpio23", 694 "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", "gpio29", 695 "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35", 696 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", 697 "gpio42", "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", 698 "gpio48", "gpio49", "gpio50", "gpio51", "gpio52", "gpio53", 699 "gpio54", "gpio55", "gpio56", "gpio57", "gpio58", "gpio59", 700 "gpio60", "gpio61", "gpio62", "gpio63", "gpio64", "gpio65", 701 "gpio66", "gpio67", "gpio68", "gpio69", "gpio70", "gpio71", 702 "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77", 703 "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", 704 "gpio84", "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", 705 "gpio90", "gpio91", "gpio92", "gpio93", "gpio94", "gpio95", 706 "gpio96", "gpio97", "gpio98", "gpio99", "gpio100", "gpio101", 707 "gpio102", "gpio103", "gpio104", "gpio105", "gpio106", "gpio107", 708 "gpio108", "gpio109", "gpio110", "gpio111", "gpio112", "gpio113", 709 "gpio114", "gpio115", "gpio116", "gpio117", "gpio118", "gpio119", 710 "gpio120", "gpio121", "gpio122", "gpio123", "gpio124", "gpio125", 711 "gpio126", "gpio127", "gpio128", "gpio129", "gpio130", "gpio131", 712 "gpio132", "gpio133", "gpio134", "gpio135", "gpio136", "gpio137", 713 "gpio138", "gpio139", "gpio140", "gpio141", "gpio142", "gpio143", 714 "gpio144", "gpio145", "gpio146", "gpio147", "gpio148", "gpio149", 715 "gpio150", "gpio151", "gpio152", "gpio153", "gpio154", "gpio155", 716 "gpio156", "gpio157", "gpio158", "gpio159", "gpio160", "gpio161", 717 "gpio162", "gpio163", "gpio164", "gpio165", "gpio166", "gpio167", 718 "gpio168", "gpio169", "gpio170", "gpio171", "gpio172", "gpio173", 719 "gpio174", "gpio175", "gpio176", "gpio177", "gpio178", "gpio179", 720 "gpio180", "gpio181", "gpio182", "gpio183", "gpio184", "gpio185", 721 "gpio186", "gpio187", "gpio188", "gpio189", "gpio190", "gpio191", 722 "gpio192", "gpio193", "gpio194", "gpio195", "gpio196", "gpio197", 723 "gpio198", "gpio199", "gpio200", "gpio201", "gpio202", "gpio203", 724 "gpio204", "gpio205", "gpio206", "gpio207", "gpio208", "gpio209", 725 "gpio210", "gpio211", "gpio212", "gpio213", "gpio214", "gpio215", 726 "gpio216", "gpio217", "gpio218", "gpio219", "gpio220", "gpio221", 727 "gpio222", "gpio223", "gpio224", "gpio225", 728 }; 729 730 static const char *const aoss_cti_groups[] = { 731 "gpio74", "gpio75", "gpio76", "gpio77", 732 }; 733 734 static const char *const atest_char_groups[] = { 735 "gpio126", "gpio127", "gpio128", "gpio129", "gpio133", 736 }; 737 738 static const char *const atest_usb_groups[] = { 739 "gpio70", "gpio71", "gpio72", "gpio73", "gpio129", 740 }; 741 742 static const char *const audio_ext_mclk_groups[] = { 743 "gpio120", "gpio121", 744 }; 745 746 static const char *const audio_ref_clk_groups[] = { 747 "gpio120", 748 }; 749 750 static const char *const cam_mclk_groups[] = { 751 "gpio89", "gpio90", "gpio91", "gpio92", "gpio93", "gpio94", 752 "gpio95", "gpio96", 753 }; 754 755 static const char *const cci_async_in_groups[] = { 756 "gpio15", "gpio109", "gpio110", 757 }; 758 759 static const char *const cci_i2c0_groups[] = { 760 "gpio109", "gpio110", 761 }; 762 763 static const char *const cci_i2c1_groups[] = { 764 "gpio111", "gpio112", 765 }; 766 767 static const char *const cci_i2c2_groups[] = { 768 "gpio113", "gpio114", 769 }; 770 771 static const char *const cci_i2c3_groups[] = { 772 "gpio107", "gpio160", 773 }; 774 775 static const char *const cci_i2c4_groups[] = { 776 "gpio108", "gpio149", 777 }; 778 779 static const char *const cci_i2c5_groups[] = { 780 "gpio115", "gpio116", 781 }; 782 783 static const char *const cci_timer_groups[] = { 784 "gpio105", "gpio106", "gpio107", "gpio159", "gpio160", 785 }; 786 787 static const char *const coex_espmi_groups[] = { 788 "gpio144", "gpio145", 789 }; 790 791 static const char *const coex_uart1_rx_groups[] = { 792 "gpio144", 793 }; 794 795 static const char *const coex_uart1_tx_groups[] = { 796 "gpio145", 797 }; 798 799 static const char *const dbg_out_clk_groups[] = { 800 "gpio82", 801 }; 802 803 static const char *const ddr_bist_groups[] = { 804 "gpio40", "gpio41", "gpio44", "gpio45", 805 }; 806 807 static const char *const ddr_pxi_groups[] = { 808 "gpio43", "gpio44", "gpio45", "gpio46", 809 "gpio52", "gpio53", "gpio54", "gpio55", 810 }; 811 812 static const char *const dp_hot_groups[] = { 813 "gpio47", 814 }; 815 816 static const char *const egpio_groups[] = { 817 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", 818 "gpio6", "gpio7", "gpio28", "gpio29", "gpio30", "gpio31", 819 "gpio48", "gpio49", "gpio50", "gpio51", "gpio163", "gpio164", 820 "gpio165", "gpio166", "gpio167", "gpio168", "gpio169", "gpio170", 821 "gpio171", "gpio172", "gpio173", "gpio174", "gpio175", "gpio176", 822 "gpio177", "gpio178", "gpio179", "gpio180", "gpio181", "gpio182", 823 "gpio183", "gpio184", "gpio185", "gpio186", "gpio187", "gpio188", 824 "gpio189", "gpio190", "gpio191", "gpio192", "gpio193", "gpio194", 825 "gpio195", "gpio196", "gpio197", "gpio198", "gpio199", "gpio200", 826 "gpio201", "gpio202", "gpio203", "gpio204", "gpio205", "gpio206", 827 "gpio207", "gpio208", "gpio209", "gpio212", "gpio213", "gpio214", 828 "gpio215", "gpio216", "gpio217", "gpio218", 829 }; 830 831 static const char *const gcc_gp_groups[] = { 832 "gpio86", "gpio87", "gpio130", "gpio131", "gpio132", "gpio158", 833 }; 834 835 static const char *const gnss_adc_groups[] = { 836 "gpio40", "gpio41", "gpio42", "gpio77", 837 }; 838 839 static const char *const host_rst_groups[] = { 840 "gpio106", 841 }; 842 843 static const char *const i2chub0_se0_groups[] = { 844 "gpio66", "gpio67", 845 }; 846 847 static const char *const i2chub0_se1_groups[] = { 848 "gpio78", "gpio79", 849 }; 850 851 static const char *const i2chub0_se2_groups[] = { 852 "gpio68", "gpio69", 853 }; 854 855 static const char *const i2chub0_se3_groups[] = { 856 "gpio70", "gpio71", 857 }; 858 859 static const char *const i2chub0_se4_groups[] = { 860 "gpio72", "gpio73", 861 }; 862 863 static const char *const i2s0_groups[] = { 864 "gpio122", "gpio123", "gpio124", "gpio125", 865 }; 866 867 static const char *const i2s1_groups[] = { 868 "gpio117", "gpio118", "gpio119", "gpio120", 869 }; 870 871 static const char *const ibi_i3c_groups[] = { 872 "gpio0", "gpio1", "gpio4", "gpio5", "gpio8", "gpio9", 873 "gpio12", "gpio13", "gpio28", "gpio29", "gpio32", "gpio33", 874 "gpio36", "gpio37", "gpio48", "gpio49", "gpio60", "gpio61", 875 }; 876 877 static const char *const jitter_bist_groups[] = { 878 "gpio73", 879 }; 880 881 static const char *const mdp_esync0_groups[] = { 882 "gpio88", "gpio100", 883 }; 884 885 static const char *const mdp_esync1_groups[] = { 886 "gpio86", "gpio100", 887 }; 888 889 static const char *const mdp_esync2_groups[] = { 890 "gpio87", "gpio97", 891 }; 892 893 static const char *const mdp_vsync_groups[] = { 894 "gpio86", "gpio87", "gpio88", "gpio97", 895 }; 896 897 static const char *const mdp_vsync_e_groups[] = { 898 "gpio98", 899 }; 900 901 static const char *const mdp_vsync_p_groups[] = { 902 "gpio98", 903 }; 904 905 static const char *const mdp_vsync0_out_groups[] = { 906 "gpio86", 907 }; 908 909 static const char *const mdp_vsync1_out_groups[] = { 910 "gpio86", 911 }; 912 913 static const char *const mdp_vsync2_out_groups[] = { 914 "gpio87", 915 }; 916 917 static const char *const mdp_vsync3_out_groups[] = { 918 "gpio87", 919 }; 920 921 static const char *const mdp_vsync5_out_groups[] = { 922 "gpio87", 923 }; 924 925 static const char *const modem_pps_in_groups[] = { 926 "gpio151", 927 }; 928 929 static const char *const modem_pps_out_groups[] = { 930 "gpio151", 931 }; 932 933 static const char *const nav_gpio_groups[] = { 934 "gpio146", "gpio147", "gpio148", "gpio151", 935 }; 936 937 static const char *const nav_gpio0_groups[] = { 938 "gpio150", 939 }; 940 941 static const char *const nav_gpio3_groups[] = { 942 "gpio150", 943 }; 944 945 static const char *const nav_rffe_groups[] = { 946 "gpio134", "gpio135", "gpio138", "gpio139", 947 }; 948 949 static const char *const pcie0_clk_req_n_groups[] = { 950 "gpio103", 951 }; 952 953 static const char *const pcie0_rst_n_groups[] = { 954 "gpio102", 955 }; 956 957 static const char *const pcie1_clk_req_n_groups[] = { 958 "gpio221", 959 }; 960 961 static const char *const phase_flag_groups[] = { 962 "gpio117", "gpio118", "gpio119", "gpio123", "gpio124", "gpio125", 963 "gpio169", "gpio170", "gpio171", "gpio172", "gpio173", "gpio175", 964 "gpio176", "gpio179", "gpio180", "gpio181", "gpio184", "gpio185", 965 "gpio192", "gpio196", "gpio197", "gpio198", "gpio199", "gpio204", 966 "gpio206", "gpio207", "gpio208", "gpio210", "gpio211", "gpio214", 967 "gpio215", "gpio216", 968 }; 969 970 static const char *const pll_bist_sync_groups[] = { 971 "gpio104", 972 }; 973 974 static const char *const pll_clk_aux_groups[] = { 975 "gpio94", 976 }; 977 978 static const char *const qdss_cti_groups[] = { 979 "gpio27", "gpio31", "gpio72", "gpio73", "gpio82", "gpio83", 980 "gpio152", "gpio158", 981 }; 982 983 static const char *const qlink_groups[] = { 984 "gpio152", "gpio153", "gpio154", 985 }; 986 987 static const char *const qspi_groups[] = { 988 "gpio80", "gpio81", "gpio82", "gpio147", 989 }; 990 991 static const char *const qspi_clk_groups[] = { 992 "gpio83", 993 }; 994 995 static const char *const qspi_cs_groups[] = { 996 "gpio146", "gpio148", 997 }; 998 999 static const char *const qup1_se0_groups[] = { 1000 "gpio80", "gpio81", "gpio82", "gpio83", 1001 }; 1002 1003 static const char *const qup1_se1_groups[] = { 1004 "gpio74", "gpio75", "gpio76", "gpio77", 1005 }; 1006 1007 static const char *const qup1_se2_groups[] = { 1008 "gpio40", "gpio41", "gpio42", "gpio43", "gpio130", "gpio131", "gpio132", 1009 }; 1010 1011 static const char *const qup1_se3_groups[] = { 1012 "gpio44", "gpio45", "gpio46", "gpio47", 1013 }; 1014 1015 static const char *const qup1_se4_groups[] = { 1016 "gpio36", "gpio37", "gpio38", "gpio39", 1017 }; 1018 1019 static const char *const qup1_se5_groups[] = { 1020 "gpio52", "gpio53", "gpio54", "gpio55", 1021 }; 1022 1023 static const char *const qup1_se6_groups[] = { 1024 "gpio56", "gpio57", "gpio58", "gpio59", 1025 }; 1026 1027 static const char *const qup1_se7_groups[] = { 1028 "gpio60", "gpio61", "gpio62", "gpio63", 1029 }; 1030 1031 static const char *const qup2_se0_groups[] = { 1032 "gpio0", "gpio1", "gpio2", "gpio3", 1033 }; 1034 1035 static const char *const qup2_se1_groups[] = { 1036 "gpio4", "gpio5", "gpio6", "gpio7", 1037 }; 1038 1039 static const char *const qup2_se2_groups[] = { 1040 "gpio117", "gpio118", "gpio119", "gpio120", 1041 }; 1042 1043 static const char *const qup2_se3_groups[] = { 1044 "gpio97", "gpio122", "gpio123", "gpio124", "gpio125", 1045 }; 1046 1047 static const char *const qup2_se4_01_groups[] = { 1048 "gpio208", "gpio209", 1049 }; 1050 1051 static const char *const qup2_se4_23_groups[] = { 1052 "gpio208", "gpio209", 1053 }; 1054 1055 static const char *const qup3_se0_01_groups[] = { 1056 "gpio64", "gpio65", 1057 }; 1058 1059 static const char *const qup3_se0_23_groups[] = { 1060 "gpio64", "gpio65", 1061 }; 1062 1063 static const char *const qup3_se1_groups[] = { 1064 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio15", 1065 }; 1066 1067 static const char *const qup3_se2_groups[] = { 1068 "gpio12", "gpio13", "gpio14", "gpio15", 1069 }; 1070 1071 static const char *const qup3_se3_groups[] = { 1072 "gpio16", "gpio17", "gpio18", "gpio19", 1073 }; 1074 1075 static const char *const qup3_se4_groups[] = { 1076 "gpio20", "gpio21", "gpio22", "gpio23", 1077 }; 1078 1079 static const char *const qup3_se5_groups[] = { 1080 "gpio24", "gpio25", "gpio26", "gpio27", 1081 }; 1082 1083 static const char *const qup4_se0_groups[] = { 1084 "gpio48", "gpio49", "gpio50", "gpio51", 1085 }; 1086 1087 static const char *const qup4_se1_groups[] = { 1088 "gpio28", "gpio29", "gpio30", "gpio31", 1089 }; 1090 1091 static const char *const qup4_se2_groups[] = { 1092 "gpio32", "gpio33", "gpio34", "gpio35", 1093 }; 1094 1095 static const char *const qup4_se3_01_groups[] = { 1096 "gpio84", "gpio121", 1097 }; 1098 1099 static const char *const qup4_se3_23_groups[] = { 1100 "gpio84", "gpio121", 1101 }; 1102 1103 static const char *const qup4_se3_l3_groups[] = { 1104 "gpio98", 1105 }; 1106 1107 static const char *const qup4_se4_01_groups[] = { 1108 "gpio161", "gpio162", 1109 }; 1110 1111 static const char *const qup4_se4_23_groups[] = { 1112 "gpio161", "gpio162", 1113 }; 1114 1115 static const char *const qup4_se4_l3_groups[] = { 1116 "gpio88", 1117 }; 1118 1119 static const char *const rng_rosc_groups[] = { 1120 "gpio64", "gpio65", "gpio66", "gpio84", 1121 }; 1122 1123 static const char *const sd_write_protect_groups[] = { 1124 "gpio85", 1125 }; 1126 1127 static const char *const sdc4_clk_groups[] = { 1128 "gpio83", 1129 }; 1130 1131 static const char *const sdc4_cmd_groups[] = { 1132 "gpio148", 1133 }; 1134 1135 static const char *const sdc4_data_groups[] = { 1136 "gpio80", "gpio81", "gpio82", "gpio147", 1137 }; 1138 1139 static const char *const sys_throttle_groups[] = { 1140 "gpio99", 1141 }; 1142 1143 static const char *const tb_trig_sdc_groups[] = { 1144 "gpio88", "gpio146", 1145 }; 1146 1147 static const char *const tmess_rng_groups[] = { 1148 "gpio64", "gpio65", "gpio66", "gpio84", 1149 }; 1150 1151 static const char *const tsense_clm_groups[] = { 1152 "gpio10", "gpio87", "gpio97", "gpio99", "gpio105", "gpio106", 1153 "gpio159", 1154 }; 1155 1156 static const char *const tsense_pwm_groups[] = { 1157 "gpio10", "gpio87", "gpio97", "gpio99", "gpio223", "gpio224", 1158 "gpio225", 1159 }; 1160 1161 static const char *const uim0_groups[] = { 1162 "gpio126", "gpio127", "gpio128", "gpio129", 1163 }; 1164 1165 static const char *const uim1_groups[] = { 1166 "gpio36", "gpio37", "gpio39", "gpio54", "gpio55", "gpio56", 1167 "gpio70", "gpio71", "gpio72", "gpio130", "gpio131", "gpio132", 1168 "gpio133", 1169 }; 1170 1171 static const char *const usb0_hs_groups[] = { 1172 "gpio79", 1173 }; 1174 1175 static const char *const usb_phy_groups[] = { 1176 "gpio59", "gpio60", 1177 }; 1178 1179 static const char *const vfr_groups[] = { 1180 "gpio146", "gpio151", 1181 }; 1182 1183 static const char *const vsense_trigger_mirnat_groups[] = { 1184 "gpio59", 1185 }; 1186 1187 static const char *const wcn_sw_ctrl_groups[] = { 1188 "gpio18", "gpio19", "gpio155", "gpio156", 1189 }; 1190 1191 static const struct pinfunction hawi_functions[] = { 1192 MSM_GPIO_PIN_FUNCTION(gpio), 1193 MSM_PIN_FUNCTION(aoss_cti), 1194 MSM_PIN_FUNCTION(atest_char), 1195 MSM_PIN_FUNCTION(atest_usb), 1196 MSM_PIN_FUNCTION(audio_ext_mclk), 1197 MSM_PIN_FUNCTION(audio_ref_clk), 1198 MSM_PIN_FUNCTION(cam_mclk), 1199 MSM_PIN_FUNCTION(cci_async_in), 1200 MSM_PIN_FUNCTION(cci_i2c0), 1201 MSM_PIN_FUNCTION(cci_i2c1), 1202 MSM_PIN_FUNCTION(cci_i2c2), 1203 MSM_PIN_FUNCTION(cci_i2c3), 1204 MSM_PIN_FUNCTION(cci_i2c4), 1205 MSM_PIN_FUNCTION(cci_i2c5), 1206 MSM_PIN_FUNCTION(cci_timer), 1207 MSM_PIN_FUNCTION(coex_espmi), 1208 MSM_PIN_FUNCTION(coex_uart1_rx), 1209 MSM_PIN_FUNCTION(coex_uart1_tx), 1210 MSM_PIN_FUNCTION(dbg_out_clk), 1211 MSM_PIN_FUNCTION(ddr_bist), 1212 MSM_PIN_FUNCTION(ddr_pxi), 1213 MSM_PIN_FUNCTION(dp_hot), 1214 MSM_PIN_FUNCTION(egpio), 1215 MSM_PIN_FUNCTION(gcc_gp), 1216 MSM_PIN_FUNCTION(gnss_adc), 1217 MSM_PIN_FUNCTION(host_rst), 1218 MSM_PIN_FUNCTION(i2chub0_se0), 1219 MSM_PIN_FUNCTION(i2chub0_se1), 1220 MSM_PIN_FUNCTION(i2chub0_se2), 1221 MSM_PIN_FUNCTION(i2chub0_se3), 1222 MSM_PIN_FUNCTION(i2chub0_se4), 1223 MSM_PIN_FUNCTION(i2s0), 1224 MSM_PIN_FUNCTION(i2s1), 1225 MSM_PIN_FUNCTION(ibi_i3c), 1226 MSM_PIN_FUNCTION(jitter_bist), 1227 MSM_PIN_FUNCTION(mdp_esync0), 1228 MSM_PIN_FUNCTION(mdp_esync1), 1229 MSM_PIN_FUNCTION(mdp_esync2), 1230 MSM_PIN_FUNCTION(mdp_vsync), 1231 MSM_PIN_FUNCTION(mdp_vsync_e), 1232 MSM_PIN_FUNCTION(mdp_vsync_p), 1233 MSM_PIN_FUNCTION(mdp_vsync0_out), 1234 MSM_PIN_FUNCTION(mdp_vsync1_out), 1235 MSM_PIN_FUNCTION(mdp_vsync2_out), 1236 MSM_PIN_FUNCTION(mdp_vsync3_out), 1237 MSM_PIN_FUNCTION(mdp_vsync5_out), 1238 MSM_PIN_FUNCTION(modem_pps_in), 1239 MSM_PIN_FUNCTION(modem_pps_out), 1240 MSM_PIN_FUNCTION(nav_gpio), 1241 MSM_PIN_FUNCTION(nav_gpio0), 1242 MSM_PIN_FUNCTION(nav_gpio3), 1243 MSM_PIN_FUNCTION(nav_rffe), 1244 MSM_PIN_FUNCTION(pcie0_clk_req_n), 1245 MSM_PIN_FUNCTION(pcie0_rst_n), 1246 MSM_PIN_FUNCTION(pcie1_clk_req_n), 1247 MSM_PIN_FUNCTION(phase_flag), 1248 MSM_PIN_FUNCTION(pll_bist_sync), 1249 MSM_PIN_FUNCTION(pll_clk_aux), 1250 MSM_PIN_FUNCTION(qdss_cti), 1251 MSM_PIN_FUNCTION(qlink), 1252 MSM_PIN_FUNCTION(qspi), 1253 MSM_PIN_FUNCTION(qspi_clk), 1254 MSM_PIN_FUNCTION(qspi_cs), 1255 MSM_PIN_FUNCTION(qup1_se0), 1256 MSM_PIN_FUNCTION(qup1_se1), 1257 MSM_PIN_FUNCTION(qup1_se2), 1258 MSM_PIN_FUNCTION(qup1_se3), 1259 MSM_PIN_FUNCTION(qup1_se4), 1260 MSM_PIN_FUNCTION(qup1_se5), 1261 MSM_PIN_FUNCTION(qup1_se6), 1262 MSM_PIN_FUNCTION(qup1_se7), 1263 MSM_PIN_FUNCTION(qup2_se0), 1264 MSM_PIN_FUNCTION(qup2_se1), 1265 MSM_PIN_FUNCTION(qup2_se2), 1266 MSM_PIN_FUNCTION(qup2_se3), 1267 MSM_PIN_FUNCTION(qup2_se4_01), 1268 MSM_PIN_FUNCTION(qup2_se4_23), 1269 MSM_PIN_FUNCTION(qup3_se0_01), 1270 MSM_PIN_FUNCTION(qup3_se0_23), 1271 MSM_PIN_FUNCTION(qup3_se1), 1272 MSM_PIN_FUNCTION(qup3_se2), 1273 MSM_PIN_FUNCTION(qup3_se3), 1274 MSM_PIN_FUNCTION(qup3_se4), 1275 MSM_PIN_FUNCTION(qup3_se5), 1276 MSM_PIN_FUNCTION(qup4_se0), 1277 MSM_PIN_FUNCTION(qup4_se1), 1278 MSM_PIN_FUNCTION(qup4_se2), 1279 MSM_PIN_FUNCTION(qup4_se3_01), 1280 MSM_PIN_FUNCTION(qup4_se3_23), 1281 MSM_PIN_FUNCTION(qup4_se3_l3), 1282 MSM_PIN_FUNCTION(qup4_se4_01), 1283 MSM_PIN_FUNCTION(qup4_se4_23), 1284 MSM_PIN_FUNCTION(qup4_se4_l3), 1285 MSM_PIN_FUNCTION(rng_rosc), 1286 MSM_PIN_FUNCTION(sd_write_protect), 1287 MSM_PIN_FUNCTION(sdc4_clk), 1288 MSM_PIN_FUNCTION(sdc4_cmd), 1289 MSM_PIN_FUNCTION(sdc4_data), 1290 MSM_PIN_FUNCTION(sys_throttle), 1291 MSM_PIN_FUNCTION(tb_trig_sdc), 1292 MSM_PIN_FUNCTION(tmess_rng), 1293 MSM_PIN_FUNCTION(tsense_clm), 1294 MSM_PIN_FUNCTION(tsense_pwm), 1295 MSM_PIN_FUNCTION(uim0), 1296 MSM_PIN_FUNCTION(uim1), 1297 MSM_PIN_FUNCTION(usb0_hs), 1298 MSM_PIN_FUNCTION(usb_phy), 1299 MSM_PIN_FUNCTION(vfr), 1300 MSM_PIN_FUNCTION(vsense_trigger_mirnat), 1301 MSM_PIN_FUNCTION(wcn_sw_ctrl), 1302 }; 1303 1304 /* 1305 * Every pin is maintained as a single group, and missing or non-existing pin 1306 * would be maintained as dummy group to synchronize pin group index with 1307 * pin descriptor registered with pinctrl core. 1308 * Clients would not be able to request these dummy pin groups. 1309 */ 1310 static const struct msm_pingroup hawi_groups[] = { 1311 [0] = PINGROUP(0, qup2_se0, ibi_i3c, _, _, _, _, _, _, _, _, egpio), 1312 [1] = PINGROUP(1, qup2_se0, ibi_i3c, _, _, _, _, _, _, _, _, egpio), 1313 [2] = PINGROUP(2, qup2_se0, _, _, _, _, _, _, _, _, _, egpio), 1314 [3] = PINGROUP(3, qup2_se0, _, _, _, _, _, _, _, _, _, egpio), 1315 [4] = PINGROUP(4, qup2_se1, ibi_i3c, _, _, _, _, _, _, _, _, egpio), 1316 [5] = PINGROUP(5, qup2_se1, ibi_i3c, _, _, _, _, _, _, _, _, egpio), 1317 [6] = PINGROUP(6, qup2_se1, _, _, _, _, _, _, _, _, _, egpio), 1318 [7] = PINGROUP(7, qup2_se1, _, _, _, _, _, _, _, _, _, egpio), 1319 [8] = PINGROUP(8, qup3_se1, ibi_i3c, _, _, _, _, _, _, _, _, _), 1320 [9] = PINGROUP(9, qup3_se1, ibi_i3c, _, _, _, _, _, _, _, _, _), 1321 [10] = PINGROUP(10, qup3_se1, _, tsense_clm, tsense_pwm, _, _, _, _, _, _, _), 1322 [11] = PINGROUP(11, qup3_se1, _, _, _, _, _, _, _, _, _, _), 1323 [12] = PINGROUP(12, qup3_se2, ibi_i3c, qup3_se1, _, _, _, _, _, _, _, _), 1324 [13] = PINGROUP(13, qup3_se2, ibi_i3c, qup3_se1, _, _, _, _, _, _, _, _), 1325 [14] = PINGROUP(14, qup3_se2, _, _, _, _, _, _, _, _, _, _), 1326 [15] = PINGROUP(15, qup3_se2, cci_async_in, qup3_se1, _, _, _, _, _, _, _, _), 1327 [16] = PINGROUP(16, qup3_se3, _, _, _, _, _, _, _, _, _, _), 1328 [17] = PINGROUP(17, qup3_se3, _, _, _, _, _, _, _, _, _, _), 1329 [18] = PINGROUP(18, wcn_sw_ctrl, qup3_se3, _, _, _, _, _, _, _, _, _), 1330 [19] = PINGROUP(19, wcn_sw_ctrl, qup3_se3, _, _, _, _, _, _, _, _, _), 1331 [20] = PINGROUP(20, qup3_se4, _, _, _, _, _, _, _, _, _, _), 1332 [21] = PINGROUP(21, qup3_se4, _, _, _, _, _, _, _, _, _, _), 1333 [22] = PINGROUP(22, qup3_se4, _, _, _, _, _, _, _, _, _, _), 1334 [23] = PINGROUP(23, qup3_se4, _, _, _, _, _, _, _, _, _, _), 1335 [24] = PINGROUP(24, qup3_se5, _, _, _, _, _, _, _, _, _, _), 1336 [25] = PINGROUP(25, qup3_se5, _, _, _, _, _, _, _, _, _, _), 1337 [26] = PINGROUP(26, qup3_se5, _, _, _, _, _, _, _, _, _, _), 1338 [27] = PINGROUP(27, qup3_se5, qdss_cti, _, _, _, _, _, _, _, _, _), 1339 [28] = PINGROUP(28, qup4_se1, ibi_i3c, _, _, _, _, _, _, _, _, egpio), 1340 [29] = PINGROUP(29, qup4_se1, ibi_i3c, _, _, _, _, _, _, _, _, egpio), 1341 [30] = PINGROUP(30, qup4_se1, _, _, _, _, _, _, _, _, _, egpio), 1342 [31] = PINGROUP(31, qup4_se1, qdss_cti, _, _, _, _, _, _, _, _, egpio), 1343 [32] = PINGROUP(32, qup4_se2, ibi_i3c, _, _, _, _, _, _, _, _, _), 1344 [33] = PINGROUP(33, qup4_se2, ibi_i3c, _, _, _, _, _, _, _, _, _), 1345 [34] = PINGROUP(34, qup4_se2, _, _, _, _, _, _, _, _, _, _), 1346 [35] = PINGROUP(35, qup4_se2, _, _, _, _, _, _, _, _, _, _), 1347 [36] = PINGROUP(36, qup1_se4, uim1, ibi_i3c, _, _, _, _, _, _, _, _), 1348 [37] = PINGROUP(37, qup1_se4, uim1, ibi_i3c, _, _, _, _, _, _, _, _), 1349 [38] = PINGROUP(38, qup1_se4, _, _, _, _, _, _, _, _, _, _), 1350 [39] = PINGROUP(39, qup1_se4, uim1, _, _, _, _, _, _, _, _, _), 1351 [40] = PINGROUP(40, qup1_se2, ddr_bist, _, gnss_adc, _, _, _, _, _, _, _), 1352 [41] = PINGROUP(41, qup1_se2, ddr_bist, _, gnss_adc, _, _, _, _, _, _, _), 1353 [42] = PINGROUP(42, qup1_se2, gnss_adc, _, _, _, _, _, _, _, _, _), 1354 [43] = PINGROUP(43, qup1_se2, _, ddr_pxi, _, _, _, _, _, _, _, _), 1355 [44] = PINGROUP(44, qup1_se3, ddr_bist, ddr_pxi, _, _, _, _, _, _, _, _), 1356 [45] = PINGROUP(45, qup1_se3, ddr_bist, ddr_pxi, _, _, _, _, _, _, _, _), 1357 [46] = PINGROUP(46, qup1_se3, ddr_pxi, _, _, _, _, _, _, _, _, _), 1358 [47] = PINGROUP(47, qup1_se3, dp_hot, _, _, _, _, _, _, _, _, _), 1359 [48] = PINGROUP(48, qup4_se0, ibi_i3c, _, _, _, _, _, _, _, _, egpio), 1360 [49] = PINGROUP(49, qup4_se0, ibi_i3c, _, _, _, _, _, _, _, _, egpio), 1361 [50] = PINGROUP(50, qup4_se0, _, _, _, _, _, _, _, _, _, egpio), 1362 [51] = PINGROUP(51, qup4_se0, _, _, _, _, _, _, _, _, _, egpio), 1363 [52] = PINGROUP(52, qup1_se5, ddr_pxi, _, _, _, _, _, _, _, _, _), 1364 [53] = PINGROUP(53, qup1_se5, _, ddr_pxi, _, _, _, _, _, _, _, _), 1365 [54] = PINGROUP(54, qup1_se5, uim1, ddr_pxi, _, _, _, _, _, _, _, _), 1366 [55] = PINGROUP(55, qup1_se5, uim1, ddr_pxi, _, _, _, _, _, _, _, _), 1367 [56] = PINGROUP(56, qup1_se6, uim1, _, _, _, _, _, _, _, _, _), 1368 [57] = PINGROUP(57, qup1_se6, _, _, _, _, _, _, _, _, _, _), 1369 [58] = PINGROUP(58, qup1_se6, _, _, _, _, _, _, _, _, _, _), 1370 [59] = PINGROUP(59, qup1_se6, usb_phy, vsense_trigger_mirnat, _, _, _, _, _, _, _, _), 1371 [60] = PINGROUP(60, qup1_se7, usb_phy, ibi_i3c, _, _, _, _, _, _, _, _), 1372 [61] = PINGROUP(61, qup1_se7, ibi_i3c, _, _, _, _, _, _, _, _, _), 1373 [62] = PINGROUP(62, qup1_se7, _, _, _, _, _, _, _, _, _, _), 1374 [63] = PINGROUP(63, qup1_se7, _, _, _, _, _, _, _, _, _, _), 1375 [64] = PINGROUP(64, qup3_se0_01, qup3_se0_23, rng_rosc, tmess_rng, _, _, _, _, _, _, _), 1376 [65] = PINGROUP(65, qup3_se0_01, qup3_se0_23, rng_rosc, tmess_rng, _, _, _, _, _, _, _), 1377 [66] = PINGROUP(66, i2chub0_se0, rng_rosc, tmess_rng, _, _, _, _, _, _, _, _), 1378 [67] = PINGROUP(67, i2chub0_se0, _, _, _, _, _, _, _, _, _, _), 1379 [68] = PINGROUP(68, i2chub0_se2, _, _, _, _, _, _, _, _, _, _), 1380 [69] = PINGROUP(69, i2chub0_se2, _, _, _, _, _, _, _, _, _, _), 1381 [70] = PINGROUP(70, i2chub0_se3, uim1, _, atest_usb, _, _, _, _, _, _, _), 1382 [71] = PINGROUP(71, i2chub0_se3, uim1, _, atest_usb, _, _, _, _, _, _, _), 1383 [72] = PINGROUP(72, i2chub0_se4, uim1, qdss_cti, _, atest_usb, _, _, _, _, _, _), 1384 [73] = PINGROUP(73, i2chub0_se4, qdss_cti, jitter_bist, atest_usb, _, _, _, _, _, _, _), 1385 [74] = PINGROUP(74, qup1_se1, aoss_cti, _, _, _, _, _, _, _, _, _), 1386 [75] = PINGROUP(75, qup1_se1, aoss_cti, _, _, _, _, _, _, _, _, _), 1387 [76] = PINGROUP(76, qup1_se1, aoss_cti, _, _, _, _, _, _, _, _, _), 1388 [77] = PINGROUP(77, qup1_se1, aoss_cti, gnss_adc, _, _, _, _, _, _, _, _), 1389 [78] = PINGROUP(78, i2chub0_se1, _, _, _, _, _, _, _, _, _, _), 1390 [79] = PINGROUP(79, i2chub0_se1, usb0_hs, _, _, _, _, _, _, _, _, _), 1391 [80] = PINGROUP(80, qup1_se0, sdc4_data, qspi, _, _, _, _, _, _, _, _), 1392 [81] = PINGROUP(81, qup1_se0, sdc4_data, qspi, _, _, _, _, _, _, _, _), 1393 [82] = PINGROUP(82, qup1_se0, sdc4_data, qdss_cti, qspi, dbg_out_clk, _, _, _, _, _, _), 1394 [83] = PINGROUP(83, qup1_se0, sdc4_clk, qdss_cti, qspi_clk, _, _, _, _, _, _, _), 1395 [84] = PINGROUP(84, qup4_se3_01, qup4_se3_23, rng_rosc, tmess_rng, _, _, _, _, _, _, _), 1396 [85] = PINGROUP(85, sd_write_protect, _, _, _, _, _, _, _, _, _, _), 1397 [86] = PINGROUP(86, mdp_vsync, mdp_vsync0_out, mdp_vsync1_out, mdp_esync1, gcc_gp, 1398 _, _, _, _, _, _), 1399 [87] = PINGROUP(87, mdp_vsync, mdp_vsync2_out, mdp_vsync3_out, mdp_vsync5_out, 1400 mdp_esync2, gcc_gp, _, tsense_clm, tsense_pwm, _, _), 1401 [88] = PINGROUP(88, mdp_esync0, mdp_vsync, qup4_se4_l3, tb_trig_sdc, _, _, _, _, _, _, _), 1402 [89] = PINGROUP(89, cam_mclk, _, _, _, _, _, _, _, _, _, _), 1403 [90] = PINGROUP(90, cam_mclk, _, _, _, _, _, _, _, _, _, _), 1404 [91] = PINGROUP(91, cam_mclk, _, _, _, _, _, _, _, _, _, _), 1405 [92] = PINGROUP(92, cam_mclk, _, _, _, _, _, _, _, _, _, _), 1406 [93] = PINGROUP(93, cam_mclk, _, _, _, _, _, _, _, _, _, _), 1407 [94] = PINGROUP(94, cam_mclk, pll_clk_aux, _, _, _, _, _, _, _, _, _), 1408 [95] = PINGROUP(95, cam_mclk, _, _, _, _, _, _, _, _, _, _), 1409 [96] = PINGROUP(96, cam_mclk, _, _, _, _, _, _, _, _, _, _), 1410 [97] = PINGROUP(97, mdp_esync2, qup2_se3, mdp_vsync, tsense_clm, tsense_pwm, _, _, 1411 _, _, _, _), 1412 [98] = PINGROUP(98, mdp_vsync_e, qup4_se3_l3, mdp_vsync_p, _, _, _, _, _, _, _, _), 1413 [99] = PINGROUP(99, sys_throttle, tsense_clm, tsense_pwm, _, _, _, _, _, _, _, _), 1414 [100] = PINGROUP(100, mdp_esync1, mdp_esync0, _, _, _, _, _, _, _, _, _), 1415 [101] = PINGROUP(101, _, _, _, _, _, _, _, _, _, _, _), 1416 [102] = PINGROUP(102, pcie0_rst_n, _, _, _, _, _, _, _, _, _, _), 1417 [103] = PINGROUP(103, pcie0_clk_req_n, _, _, _, _, _, _, _, _, _, _), 1418 [104] = PINGROUP(104, pll_bist_sync, _, _, _, _, _, _, _, _, _, _), 1419 [105] = PINGROUP(105, cci_timer, tsense_clm, _, _, _, _, _, _, _, _, _), 1420 [106] = PINGROUP(106, host_rst, cci_timer, tsense_clm, _, _, _, _, _, _, _, _), 1421 [107] = PINGROUP(107, cci_i2c3, cci_timer, _, _, _, _, _, _, _, _, _), 1422 [108] = PINGROUP(108, cci_i2c4, _, _, _, _, _, _, _, _, _, _), 1423 [109] = PINGROUP(109, cci_i2c0, cci_async_in, _, _, _, _, _, _, _, _, _), 1424 [110] = PINGROUP(110, cci_i2c0, cci_async_in, _, _, _, _, _, _, _, _, _), 1425 [111] = PINGROUP(111, cci_i2c1, _, _, _, _, _, _, _, _, _, _), 1426 [112] = PINGROUP(112, cci_i2c1, _, _, _, _, _, _, _, _, _, _), 1427 [113] = PINGROUP(113, cci_i2c2, _, _, _, _, _, _, _, _, _, _), 1428 [114] = PINGROUP(114, cci_i2c2, _, _, _, _, _, _, _, _, _, _), 1429 [115] = PINGROUP(115, cci_i2c5, _, _, _, _, _, _, _, _, _, _), 1430 [116] = PINGROUP(116, cci_i2c5, _, _, _, _, _, _, _, _, _, _), 1431 [117] = PINGROUP(117, i2s1, qup2_se2, phase_flag, _, _, _, _, _, _, _, _), 1432 [118] = PINGROUP(118, i2s1, qup2_se2, phase_flag, _, _, _, _, _, _, _, _), 1433 [119] = PINGROUP(119, i2s1, qup2_se2, phase_flag, _, _, _, _, _, _, _, _), 1434 [120] = PINGROUP(120, i2s1, qup2_se2, audio_ext_mclk, audio_ref_clk, _, _, 1435 _, _, _, _, _), 1436 [121] = PINGROUP(121, audio_ext_mclk, qup4_se3_01, qup4_se3_23, _, _, _, _, _, _, _, _), 1437 [122] = PINGROUP(122, i2s0, qup2_se3, _, _, _, _, _, _, _, _, _), 1438 [123] = PINGROUP(123, i2s0, qup2_se3, _, phase_flag, _, _, _, _, _, _, _), 1439 [124] = PINGROUP(124, i2s0, qup2_se3, _, phase_flag, _, _, _, _, _, _, _), 1440 [125] = PINGROUP(125, i2s0, qup2_se3, phase_flag, _, _, _, _, _, _, _, _), 1441 [126] = PINGROUP(126, uim0, atest_char, _, _, _, _, _, _, _, _, _), 1442 [127] = PINGROUP(127, uim0, atest_char, _, _, _, _, _, _, _, _, _), 1443 [128] = PINGROUP(128, uim0, atest_char, _, _, _, _, _, _, _, _, _), 1444 [129] = PINGROUP(129, uim0, atest_usb, atest_char, _, _, _, _, _, _, _, _), 1445 [130] = PINGROUP(130, uim1, qup1_se2, gcc_gp, _, _, _, _, _, _, _, _), 1446 [131] = PINGROUP(131, uim1, qup1_se2, gcc_gp, _, _, _, _, _, _, _, _), 1447 [132] = PINGROUP(132, uim1, qup1_se2, gcc_gp, _, _, _, _, _, _, _, _), 1448 [133] = PINGROUP(133, uim1, atest_char, _, _, _, _, _, _, _, _, _), 1449 [134] = PINGROUP(134, _, _, nav_rffe, _, _, _, _, _, _, _, _), 1450 [135] = PINGROUP(135, _, _, nav_rffe, _, _, _, _, _, _, _, _), 1451 [136] = PINGROUP(136, _, _, _, _, _, _, _, _, _, _, _), 1452 [137] = PINGROUP(137, _, _, _, _, _, _, _, _, _, _, _), 1453 [138] = PINGROUP(138, _, _, nav_rffe, _, _, _, _, _, _, _, _), 1454 [139] = PINGROUP(139, _, _, nav_rffe, _, _, _, _, _, _, _, _), 1455 [140] = PINGROUP(140, _, _, _, _, _, _, _, _, _, _, _), 1456 [141] = PINGROUP(141, _, _, _, _, _, _, _, _, _, _, _), 1457 [142] = PINGROUP(142, _, _, _, _, _, _, _, _, _, _, _), 1458 [143] = PINGROUP(143, _, _, _, _, _, _, _, _, _, _, _), 1459 [144] = PINGROUP(144, coex_uart1_rx, coex_espmi, _, _, _, _, _, _, _, _, _), 1460 [145] = PINGROUP(145, coex_uart1_tx, coex_espmi, _, _, _, _, _, _, _, _, _), 1461 [146] = PINGROUP(146, _, vfr, nav_gpio, tb_trig_sdc, qspi_cs, _, _, _, _, _, _), 1462 [147] = PINGROUP(147, _, nav_gpio, sdc4_data, qspi, _, _, _, _, _, _, _), 1463 [148] = PINGROUP(148, nav_gpio, _, sdc4_cmd, qspi_cs, _, _, _, _, _, _, _), 1464 [149] = PINGROUP(149, cci_i2c4, _, _, _, _, _, _, _, _, _, _), 1465 [150] = PINGROUP(150, nav_gpio0, nav_gpio3, _, _, _, _, _, _, _, _, _), 1466 [151] = PINGROUP(151, nav_gpio, vfr, modem_pps_in, modem_pps_out, _, _, _, _, _, _, _), 1467 [152] = PINGROUP(152, qlink, qdss_cti, _, _, _, _, _, _, _, _, _), 1468 [153] = PINGROUP(153, qlink, _, _, _, _, _, _, _, _, _, _), 1469 [154] = PINGROUP(154, qlink, _, _, _, _, _, _, _, _, _, _), 1470 [155] = PINGROUP(155, wcn_sw_ctrl, _, _, _, _, _, _, _, _, _, _), 1471 [156] = PINGROUP(156, wcn_sw_ctrl, _, _, _, _, _, _, _, _, _, _), 1472 [157] = PINGROUP(157, _, _, _, _, _, _, _, _, _, _, _), 1473 [158] = PINGROUP(158, qdss_cti, gcc_gp, _, _, _, _, _, _, _, _, _), 1474 [159] = PINGROUP(159, cci_timer, tsense_clm, _, _, _, _, _, _, _, _, _), 1475 [160] = PINGROUP(160, cci_timer, cci_i2c3, _, _, _, _, _, _, _, _, _), 1476 [161] = PINGROUP(161, qup4_se4_01, qup4_se4_23, _, _, _, _, _, _, _, _, _), 1477 [162] = PINGROUP(162, qup4_se4_01, qup4_se4_23, _, _, _, _, _, _, _, _, _), 1478 [163] = PINGROUP(163, _, _, _, _, _, _, _, _, _, _, egpio), 1479 [164] = PINGROUP(164, _, _, _, _, _, _, _, _, _, _, egpio), 1480 [165] = PINGROUP(165, _, _, _, _, _, _, _, _, _, _, egpio), 1481 [166] = PINGROUP(166, _, _, _, _, _, _, _, _, _, _, egpio), 1482 [167] = PINGROUP(167, _, _, _, _, _, _, _, _, _, _, egpio), 1483 [168] = PINGROUP(168, _, _, _, _, _, _, _, _, _, _, egpio), 1484 [169] = PINGROUP(169, phase_flag, _, _, _, _, _, _, _, _, _, egpio), 1485 [170] = PINGROUP(170, phase_flag, _, _, _, _, _, _, _, _, _, egpio), 1486 [171] = PINGROUP(171, phase_flag, _, _, _, _, _, _, _, _, _, egpio), 1487 [172] = PINGROUP(172, phase_flag, _, _, _, _, _, _, _, _, _, egpio), 1488 [173] = PINGROUP(173, phase_flag, _, _, _, _, _, _, _, _, _, egpio), 1489 [174] = PINGROUP(174, _, _, _, _, _, _, _, _, _, _, egpio), 1490 [175] = PINGROUP(175, phase_flag, _, _, _, _, _, _, _, _, _, egpio), 1491 [176] = PINGROUP(176, phase_flag, _, _, _, _, _, _, _, _, _, egpio), 1492 [177] = PINGROUP(177, _, _, _, _, _, _, _, _, _, _, egpio), 1493 [178] = PINGROUP(178, _, _, _, _, _, _, _, _, _, _, egpio), 1494 [179] = PINGROUP(179, phase_flag, _, _, _, _, _, _, _, _, _, egpio), 1495 [180] = PINGROUP(180, phase_flag, _, _, _, _, _, _, _, _, _, egpio), 1496 [181] = PINGROUP(181, phase_flag, _, _, _, _, _, _, _, _, _, egpio), 1497 [182] = PINGROUP(182, _, _, _, _, _, _, _, _, _, _, egpio), 1498 [183] = PINGROUP(183, _, _, _, _, _, _, _, _, _, _, egpio), 1499 [184] = PINGROUP(184, phase_flag, _, _, _, _, _, _, _, _, _, egpio), 1500 [185] = PINGROUP(185, phase_flag, _, _, _, _, _, _, _, _, _, egpio), 1501 [186] = PINGROUP(186, _, _, _, _, _, _, _, _, _, _, egpio), 1502 [187] = PINGROUP(187, _, _, _, _, _, _, _, _, _, _, egpio), 1503 [188] = PINGROUP(188, _, _, _, _, _, _, _, _, _, _, egpio), 1504 [189] = PINGROUP(189, _, _, _, _, _, _, _, _, _, _, egpio), 1505 [190] = PINGROUP(190, _, _, _, _, _, _, _, _, _, _, egpio), 1506 [191] = PINGROUP(191, _, _, _, _, _, _, _, _, _, _, egpio), 1507 [192] = PINGROUP(192, phase_flag, _, _, _, _, _, _, _, _, _, egpio), 1508 [193] = PINGROUP(193, _, _, _, _, _, _, _, _, _, _, egpio), 1509 [194] = PINGROUP(194, _, _, _, _, _, _, _, _, _, _, egpio), 1510 [195] = PINGROUP(195, _, _, _, _, _, _, _, _, _, _, egpio), 1511 [196] = PINGROUP(196, phase_flag, _, _, _, _, _, _, _, _, _, egpio), 1512 [197] = PINGROUP(197, phase_flag, _, _, _, _, _, _, _, _, _, egpio), 1513 [198] = PINGROUP(198, phase_flag, _, _, _, _, _, _, _, _, _, egpio), 1514 [199] = PINGROUP(199, phase_flag, _, _, _, _, _, _, _, _, _, egpio), 1515 [200] = PINGROUP(200, _, _, _, _, _, _, _, _, _, _, egpio), 1516 [201] = PINGROUP(201, _, _, _, _, _, _, _, _, _, _, egpio), 1517 [202] = PINGROUP(202, _, _, _, _, _, _, _, _, _, _, egpio), 1518 [203] = PINGROUP(203, _, _, _, _, _, _, _, _, _, _, egpio), 1519 [204] = PINGROUP(204, phase_flag, _, _, _, _, _, _, _, _, _, egpio), 1520 [205] = PINGROUP(205, _, _, _, _, _, _, _, _, _, _, egpio), 1521 [206] = PINGROUP(206, phase_flag, _, _, _, _, _, _, _, _, _, egpio), 1522 [207] = PINGROUP(207, phase_flag, _, _, _, _, _, _, _, _, _, egpio), 1523 [208] = PINGROUP(208, qup2_se4_01, qup2_se4_23, phase_flag, _, _, _, _, _, _, _, egpio), 1524 [209] = PINGROUP(209, qup2_se4_01, qup2_se4_23, _, _, _, _, _, _, _, _, egpio), 1525 [210] = PINGROUP(210, phase_flag, _, _, _, _, _, _, _, _, _, _), 1526 [211] = PINGROUP(211, phase_flag, _, _, _, _, _, _, _, _, _, _), 1527 [212] = PINGROUP(212, _, _, _, _, _, _, _, _, _, _, egpio), 1528 [213] = PINGROUP(213, _, _, _, _, _, _, _, _, _, _, egpio), 1529 [214] = PINGROUP(214, phase_flag, _, _, _, _, _, _, _, _, _, egpio), 1530 [215] = PINGROUP(215, phase_flag, _, _, _, _, _, _, _, _, _, egpio), 1531 [216] = PINGROUP(216, phase_flag, _, _, _, _, _, _, _, _, _, egpio), 1532 [217] = PINGROUP(217, _, _, _, _, _, _, _, _, _, _, egpio), 1533 [218] = PINGROUP(218, _, _, _, _, _, _, _, _, _, _, egpio), 1534 [219] = PINGROUP(219, _, _, _, _, _, _, _, _, _, _, _), 1535 [220] = PINGROUP(220, _, _, _, _, _, _, _, _, _, _, _), 1536 [221] = PINGROUP(221, pcie1_clk_req_n, _, _, _, _, _, _, _, _, _, _), 1537 [222] = PINGROUP(222, _, _, _, _, _, _, _, _, _, _, _), 1538 [223] = PINGROUP(223, tsense_pwm, _, _, _, _, _, _, _, _, _, _), 1539 [224] = PINGROUP(224, tsense_pwm, _, _, _, _, _, _, _, _, _, _), 1540 [225] = PINGROUP(225, tsense_pwm, _, _, _, _, _, _, _, _, _, _), 1541 [226] = UFS_RESET(ufs_reset, 0xf1004, 0xf2000), 1542 [227] = SDC_QDSD_PINGROUP(sdc2_clk, 0xe6000, 14, 6), 1543 [228] = SDC_QDSD_PINGROUP(sdc2_cmd, 0xe6000, 11, 3), 1544 [229] = SDC_QDSD_PINGROUP(sdc2_data, 0xe6000, 9, 0), 1545 }; 1546 1547 static const struct msm_gpio_wakeirq_map hawi_pdc_map[] = { 1548 { 0, 105 }, { 3, 113 }, { 4, 106 }, { 7, 107 }, { 8, 108 }, { 11, 109 }, 1549 { 12, 115 }, { 15, 131 }, { 16, 116 }, { 17, 141 }, { 18, 143 }, { 19, 112 }, 1550 { 23, 117 }, { 24, 118 }, { 27, 119 }, { 28, 125 }, { 31, 126 }, { 32, 127 }, 1551 { 35, 101 }, { 36, 128 }, { 39, 129 }, { 43, 130 }, { 47, 154 }, { 48, 135 }, 1552 { 51, 114 }, { 55, 104 }, { 57, 136 }, { 58, 137 }, { 59, 138 }, { 60, 139 }, 1553 { 61, 145 }, { 63, 124 }, { 64, 110 }, { 65, 123 }, { 67, 132 }, { 68, 146 }, 1554 { 69, 147 }, { 75, 151 }, { 77, 148 }, { 78, 149 }, { 79, 155 }, { 80, 156 }, 1555 { 81, 157 }, { 82, 158 }, { 84, 134 }, { 85, 159 }, { 86, 160 }, { 87, 161 }, 1556 { 88, 162 }, { 95, 163 }, { 96, 164 }, { 97, 133 }, { 98, 150 }, { 99, 111 }, 1557 { 101, 165 }, { 102, 166 }, { 103, 167 }, { 104, 168 }, { 120, 169 }, { 123, 170 }, 1558 { 125, 171 }, { 129, 153 }, { 133, 100 }, { 144, 172 }, { 146, 173 }, { 151, 174 }, 1559 { 152, 175 }, { 155, 122 }, { 158, 120 }, { 162, 142 }, { 164, 176 }, { 165, 177 }, 1560 { 167, 178 }, { 168, 179 }, { 174, 180 }, { 177, 181 }, { 179, 182 }, { 183, 183 }, 1561 { 184, 184 }, { 185, 185 }, { 186, 152 }, { 188, 144 }, { 202, 102 }, { 203, 103 }, 1562 { 205, 140 }, { 209, 186 }, { 213, 121 }, { 216, 187 }, { 221, 188 }, { 222, 189 }, 1563 { 223, 190 }, { 224, 191 }, { 225, 192 }, 1564 }; 1565 1566 static const struct msm_pinctrl_soc_data hawi_tlmm = { 1567 .pins = hawi_pins, 1568 .npins = ARRAY_SIZE(hawi_pins), 1569 .functions = hawi_functions, 1570 .nfunctions = ARRAY_SIZE(hawi_functions), 1571 .groups = hawi_groups, 1572 .ngroups = ARRAY_SIZE(hawi_groups), 1573 .ngpios = 227, 1574 .wakeirq_map = hawi_pdc_map, 1575 .nwakeirq_map = ARRAY_SIZE(hawi_pdc_map), 1576 .egpio_func = 11, 1577 }; 1578 1579 static int hawi_tlmm_probe(struct platform_device *pdev) 1580 { 1581 return msm_pinctrl_probe(pdev, &hawi_tlmm); 1582 } 1583 1584 static const struct of_device_id hawi_tlmm_of_match[] = { 1585 { .compatible = "qcom,hawi-tlmm", }, 1586 {}, 1587 }; 1588 MODULE_DEVICE_TABLE(of, hawi_tlmm_of_match); 1589 1590 static struct platform_driver hawi_tlmm_driver = { 1591 .driver = { 1592 .name = "hawi-tlmm", 1593 .of_match_table = hawi_tlmm_of_match, 1594 }, 1595 .probe = hawi_tlmm_probe, 1596 }; 1597 1598 static int __init hawi_tlmm_init(void) 1599 { 1600 return platform_driver_register(&hawi_tlmm_driver); 1601 } 1602 arch_initcall(hawi_tlmm_init); 1603 1604 static void __exit hawi_tlmm_exit(void) 1605 { 1606 platform_driver_unregister(&hawi_tlmm_driver); 1607 } 1608 module_exit(hawi_tlmm_exit); 1609 1610 MODULE_DESCRIPTION("QTI Hawi TLMM driver"); 1611 MODULE_LICENSE("GPL"); 1612