1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Marvell PXA2xx family pin control 4 * 5 * Copyright (C) 2015 Robert Jarzmik 6 */ 7 8 #ifndef __PINCTRL_PXA_H 9 #define __PINCTRL_PXA_H 10 11 #define PXA_FUNCTION(_dir, _af, _name) \ 12 { \ 13 .name = _name, \ 14 .muxval = (_dir | (_af << 1)), \ 15 } 16 17 #define PXA_PIN(_pin, funcs...) \ 18 { \ 19 .pin = _pin, \ 20 .functions = (struct pxa_desc_function[]){ \ 21 funcs, { } }, \ 22 } 23 24 #define PXA_GPIO_PIN(_pin, funcs...) \ 25 { \ 26 .pin = _pin, \ 27 .functions = (struct pxa_desc_function[]){ \ 28 PXA_FUNCTION(0, 0, "gpio_in"), \ 29 PXA_FUNCTION(1, 0, "gpio_out"), \ 30 funcs, { } }, \ 31 } 32 33 #define PXA_GPIO_ONLY_PIN(_pin) \ 34 { \ 35 .pin = _pin, \ 36 .functions = (struct pxa_desc_function[]){ \ 37 PXA_FUNCTION(0, 0, "gpio_in"), \ 38 PXA_FUNCTION(1, 0, "gpio_out"), \ 39 { } }, \ 40 } 41 42 #define PXA_PINCTRL_PIN(pin) \ 43 PINCTRL_PIN(pin, "P" #pin) 44 45 struct pxa_desc_function { 46 const char *name; 47 u8 muxval; 48 }; 49 50 struct pxa_desc_pin { 51 struct pinctrl_pin_desc pin; 52 struct pxa_desc_function *functions; 53 }; 54 55 struct pxa_pinctrl { 56 spinlock_t lock; 57 void __iomem **base_gafr; 58 void __iomem **base_gpdr; 59 void __iomem **base_pgsr; 60 struct device *dev; 61 struct pinctrl_desc desc; 62 struct pinctrl_dev *pctl_dev; 63 unsigned npins; 64 const struct pxa_desc_pin *ppins; 65 unsigned ngroups; 66 struct pingroup *groups; 67 unsigned nfuncs; 68 struct pinfunction *functions; 69 char *name; 70 }; 71 72 int pxa2xx_pinctrl_init(struct platform_device *pdev, 73 const struct pxa_desc_pin *ppins, int npins, 74 void __iomem *base_gafr[], void __iomem *base_gpdr[], 75 void __iomem *base_gpsr[]); 76 77 #endif /* __PINCTRL_PXA_H */ 78