1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * ZynqMP pin controller 4 * 5 * Copyright (C) 2020, 2021 Xilinx, Inc. 6 * 7 * Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com> 8 * Rajan Vaja <rajan.vaja@xilinx.com> 9 */ 10 11 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 12 13 #include <linux/bitfield.h> 14 #include <linux/bitmap.h> 15 #include <linux/init.h> 16 #include <linux/module.h> 17 #include <linux/of_address.h> 18 #include <linux/platform_device.h> 19 20 #include <linux/firmware/xlnx-zynqmp.h> 21 22 #include <linux/pinctrl/pinconf-generic.h> 23 #include <linux/pinctrl/pinconf.h> 24 #include <linux/pinctrl/pinctrl.h> 25 #include <linux/pinctrl/pinmux.h> 26 27 #include "core.h" 28 #include "pinctrl-utils.h" 29 30 #define ZYNQMP_PIN_PREFIX "MIO" 31 #define PINCTRL_GET_FUNC_NAME_RESP_LEN 16 32 #define MAX_FUNC_NAME_LEN 16 33 #define MAX_GROUP_PIN 50 34 #define MAX_PIN_GROUPS 50 35 #define END_OF_FUNCTIONS "END_OF_FUNCTIONS" 36 #define NUM_GROUPS_PER_RESP 6 37 38 #define PINCTRL_GET_FUNC_GROUPS_RESP_LEN 12 39 #define PINCTRL_GET_PIN_GROUPS_RESP_LEN 12 40 #define NA_GROUP 0xFFFF 41 #define RESERVED_GROUP 0xFFFE 42 43 #define DRIVE_STRENGTH_2MA 2 44 #define DRIVE_STRENGTH_4MA 4 45 #define DRIVE_STRENGTH_8MA 8 46 #define DRIVE_STRENGTH_12MA 12 47 48 #define VERSAL_LPD_PIN_PREFIX "LPD_MIO" 49 #define VERSAL_PMC_PIN_PREFIX "PMC_MIO" 50 51 #define VERSAL_PINCTRL_ATTR_NODETYPE_MASK GENMASK(19, 14) 52 #define VERSAL_PINCTRL_NODETYPE_LPD_MIO BIT(0) 53 54 /** 55 * struct zynqmp_pmux_function - a pinmux function 56 * @name: Name of the pin mux function 57 * @groups: List of pin groups for this function 58 * @ngroups: Number of entries in @groups 59 * 60 * This structure holds information about pin control function 61 * and function group names supporting that function. 62 */ 63 struct zynqmp_pmux_function { 64 char name[MAX_FUNC_NAME_LEN]; 65 const char * const *groups; 66 unsigned int ngroups; 67 }; 68 69 /** 70 * struct zynqmp_pinctrl - driver data 71 * @pctrl: Pin control device 72 * @groups: Pin groups 73 * @ngroups: Number of @groups 74 * @funcs: Pin mux functions 75 * @nfuncs: Number of @funcs 76 * 77 * This struct is stored as driver data and used to retrieve 78 * information regarding pin control functions, groups and 79 * group pins. 80 */ 81 struct zynqmp_pinctrl { 82 struct pinctrl_dev *pctrl; 83 const struct zynqmp_pctrl_group *groups; 84 unsigned int ngroups; 85 const struct zynqmp_pmux_function *funcs; 86 unsigned int nfuncs; 87 }; 88 89 /** 90 * struct zynqmp_pctrl_group - Pin control group info 91 * @name: Group name 92 * @pins: Group pin numbers 93 * @npins: Number of pins in the group 94 */ 95 struct zynqmp_pctrl_group { 96 const char *name; 97 unsigned int pins[MAX_GROUP_PIN]; 98 unsigned int npins; 99 }; 100 101 static struct pinctrl_desc zynqmp_desc; 102 static u32 family_code; 103 static u32 sub_family_code; 104 105 static int zynqmp_pctrl_get_groups_count(struct pinctrl_dev *pctldev) 106 { 107 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); 108 109 return pctrl->ngroups + zynqmp_desc.npins; 110 } 111 112 static const char *zynqmp_pctrl_get_group_name(struct pinctrl_dev *pctldev, 113 unsigned int selector) 114 { 115 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); 116 117 if (selector < pctrl->ngroups) 118 return pctrl->groups[selector].name; 119 120 return zynqmp_desc.pins[selector - pctrl->ngroups].name; 121 } 122 123 static int zynqmp_pctrl_get_group_pins(struct pinctrl_dev *pctldev, 124 unsigned int selector, 125 const unsigned int **pins, 126 unsigned int *npins) 127 { 128 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); 129 130 if (selector < pctrl->ngroups) { 131 *pins = pctrl->groups[selector].pins; 132 *npins = pctrl->groups[selector].npins; 133 } else { 134 *pins = &zynqmp_desc.pins[selector - pctrl->ngroups].number; 135 *npins = 1; 136 } 137 138 return 0; 139 } 140 141 static const struct pinctrl_ops zynqmp_pctrl_ops = { 142 .get_groups_count = zynqmp_pctrl_get_groups_count, 143 .get_group_name = zynqmp_pctrl_get_group_name, 144 .get_group_pins = zynqmp_pctrl_get_group_pins, 145 .dt_node_to_map = pinconf_generic_dt_node_to_map_all, 146 .dt_free_map = pinctrl_utils_free_map, 147 }; 148 149 static int zynqmp_pinmux_request_pin(struct pinctrl_dev *pctldev, 150 unsigned int pin) 151 { 152 int ret; 153 154 ret = zynqmp_pm_pinctrl_request(pin); 155 if (ret) { 156 dev_err(pctldev->dev, "request failed for pin %u\n", pin); 157 return ret; 158 } 159 160 return 0; 161 } 162 163 static int zynqmp_pmux_get_functions_count(struct pinctrl_dev *pctldev) 164 { 165 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); 166 167 return pctrl->nfuncs; 168 } 169 170 static const char *zynqmp_pmux_get_function_name(struct pinctrl_dev *pctldev, 171 unsigned int selector) 172 { 173 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); 174 175 return pctrl->funcs[selector].name; 176 } 177 178 /** 179 * zynqmp_pmux_get_function_groups() - Get groups for the function 180 * @pctldev: Pincontrol device pointer. 181 * @selector: Function ID 182 * @groups: Group names. 183 * @num_groups: Number of function groups. 184 * 185 * Get function's group count and group names. 186 * 187 * Return: 0 188 */ 189 static int zynqmp_pmux_get_function_groups(struct pinctrl_dev *pctldev, 190 unsigned int selector, 191 const char * const **groups, 192 unsigned * const num_groups) 193 { 194 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); 195 196 *groups = pctrl->funcs[selector].groups; 197 *num_groups = pctrl->funcs[selector].ngroups; 198 199 return 0; 200 } 201 202 /** 203 * zynqmp_pinmux_set_mux() - Set requested function for the group 204 * @pctldev: Pincontrol device pointer. 205 * @function: Function ID. 206 * @group: Group ID. 207 * 208 * Loop through all pins of the group and call firmware API 209 * to set requested function for all pins in the group. 210 * 211 * Return: 0 on success else error code. 212 */ 213 static int zynqmp_pinmux_set_mux(struct pinctrl_dev *pctldev, 214 unsigned int function, 215 unsigned int group) 216 { 217 const unsigned int *pins; 218 unsigned int npins; 219 int ret, i; 220 221 zynqmp_pctrl_get_group_pins(pctldev, group, &pins, &npins); 222 for (i = 0; i < npins; i++) { 223 ret = zynqmp_pm_pinctrl_set_function(pins[i], function); 224 if (ret) { 225 dev_err(pctldev->dev, "set mux failed for pin %u\n", 226 pins[i]); 227 return ret; 228 } 229 } 230 231 return 0; 232 } 233 234 static int zynqmp_pinmux_release_pin(struct pinctrl_dev *pctldev, 235 unsigned int pin) 236 { 237 int ret; 238 239 ret = zynqmp_pm_pinctrl_release(pin); 240 if (ret) { 241 dev_err(pctldev->dev, "free pin failed for pin %u\n", 242 pin); 243 return ret; 244 } 245 246 return 0; 247 } 248 249 static const struct pinmux_ops zynqmp_pinmux_ops = { 250 .request = zynqmp_pinmux_request_pin, 251 .get_functions_count = zynqmp_pmux_get_functions_count, 252 .get_function_name = zynqmp_pmux_get_function_name, 253 .get_function_groups = zynqmp_pmux_get_function_groups, 254 .set_mux = zynqmp_pinmux_set_mux, 255 .free = zynqmp_pinmux_release_pin, 256 }; 257 258 /** 259 * zynqmp_pinconf_cfg_get() - get config value for the pin 260 * @pctldev: Pin control device pointer. 261 * @pin: Pin number. 262 * @config: Value of config param. 263 * 264 * Get value of the requested configuration parameter for the 265 * given pin. 266 * 267 * Return: 0 on success else error code. 268 */ 269 static int zynqmp_pinconf_cfg_get(struct pinctrl_dev *pctldev, 270 unsigned int pin, 271 unsigned long *config) 272 { 273 unsigned int arg, param = pinconf_to_config_param(*config); 274 int ret; 275 276 switch (param) { 277 case PIN_CONFIG_SLEW_RATE: 278 param = PM_PINCTRL_CONFIG_SLEW_RATE; 279 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); 280 break; 281 case PIN_CONFIG_BIAS_PULL_UP: 282 param = PM_PINCTRL_CONFIG_PULL_CTRL; 283 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); 284 if (arg != PM_PINCTRL_BIAS_PULL_UP) 285 return -EINVAL; 286 287 arg = 1; 288 break; 289 case PIN_CONFIG_BIAS_PULL_DOWN: 290 param = PM_PINCTRL_CONFIG_PULL_CTRL; 291 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); 292 if (arg != PM_PINCTRL_BIAS_PULL_DOWN) 293 return -EINVAL; 294 295 arg = 1; 296 break; 297 case PIN_CONFIG_BIAS_DISABLE: 298 param = PM_PINCTRL_CONFIG_BIAS_STATUS; 299 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); 300 if (arg != PM_PINCTRL_BIAS_DISABLE) 301 return -EINVAL; 302 303 arg = 1; 304 break; 305 case PIN_CONFIG_POWER_SOURCE: 306 param = PM_PINCTRL_CONFIG_VOLTAGE_STATUS; 307 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); 308 break; 309 case PIN_CONFIG_INPUT_SCHMITT_ENABLE: 310 param = PM_PINCTRL_CONFIG_SCHMITT_CMOS; 311 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); 312 break; 313 case PIN_CONFIG_DRIVE_STRENGTH: 314 param = PM_PINCTRL_CONFIG_DRIVE_STRENGTH; 315 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg); 316 switch (arg) { 317 case PM_PINCTRL_DRIVE_STRENGTH_2MA: 318 arg = DRIVE_STRENGTH_2MA; 319 break; 320 case PM_PINCTRL_DRIVE_STRENGTH_4MA: 321 arg = DRIVE_STRENGTH_4MA; 322 break; 323 case PM_PINCTRL_DRIVE_STRENGTH_8MA: 324 arg = DRIVE_STRENGTH_8MA; 325 break; 326 case PM_PINCTRL_DRIVE_STRENGTH_12MA: 327 arg = DRIVE_STRENGTH_12MA; 328 break; 329 default: 330 /* Invalid drive strength */ 331 dev_warn(pctldev->dev, 332 "Invalid drive strength for pin %d\n", 333 pin); 334 return -EINVAL; 335 } 336 break; 337 default: 338 ret = -ENOTSUPP; 339 break; 340 } 341 342 if (ret) 343 return ret; 344 345 param = pinconf_to_config_param(*config); 346 *config = pinconf_to_config_packed(param, arg); 347 348 return 0; 349 } 350 351 /** 352 * zynqmp_pinconf_cfg_set() - Set requested config for the pin 353 * @pctldev: Pincontrol device pointer. 354 * @pin: Pin number. 355 * @configs: Configuration to set. 356 * @num_configs: Number of configurations. 357 * 358 * Loop through all configurations and call firmware API 359 * to set requested configurations for the pin. 360 * 361 * Return: 0 on success else error code. 362 */ 363 static int zynqmp_pinconf_cfg_set(struct pinctrl_dev *pctldev, 364 unsigned int pin, unsigned long *configs, 365 unsigned int num_configs) 366 { 367 int i, ret; 368 369 for (i = 0; i < num_configs; i++) { 370 unsigned int param = pinconf_to_config_param(configs[i]); 371 unsigned int arg = pinconf_to_config_argument(configs[i]); 372 unsigned int value; 373 374 switch (param) { 375 case PIN_CONFIG_SLEW_RATE: 376 param = PM_PINCTRL_CONFIG_SLEW_RATE; 377 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); 378 break; 379 case PIN_CONFIG_BIAS_PULL_UP: 380 param = PM_PINCTRL_CONFIG_PULL_CTRL; 381 arg = PM_PINCTRL_BIAS_PULL_UP; 382 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); 383 break; 384 case PIN_CONFIG_BIAS_PULL_DOWN: 385 param = PM_PINCTRL_CONFIG_PULL_CTRL; 386 arg = PM_PINCTRL_BIAS_PULL_DOWN; 387 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); 388 break; 389 case PIN_CONFIG_BIAS_DISABLE: 390 param = PM_PINCTRL_CONFIG_BIAS_STATUS; 391 arg = PM_PINCTRL_BIAS_DISABLE; 392 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); 393 break; 394 case PIN_CONFIG_INPUT_SCHMITT_ENABLE: 395 param = PM_PINCTRL_CONFIG_SCHMITT_CMOS; 396 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); 397 break; 398 case PIN_CONFIG_DRIVE_STRENGTH: 399 switch (arg) { 400 case DRIVE_STRENGTH_2MA: 401 value = PM_PINCTRL_DRIVE_STRENGTH_2MA; 402 break; 403 case DRIVE_STRENGTH_4MA: 404 value = PM_PINCTRL_DRIVE_STRENGTH_4MA; 405 break; 406 case DRIVE_STRENGTH_8MA: 407 value = PM_PINCTRL_DRIVE_STRENGTH_8MA; 408 break; 409 case DRIVE_STRENGTH_12MA: 410 value = PM_PINCTRL_DRIVE_STRENGTH_12MA; 411 break; 412 default: 413 /* Invalid drive strength */ 414 dev_warn(pctldev->dev, 415 "Invalid drive strength for pin %d\n", 416 pin); 417 return -EINVAL; 418 } 419 420 param = PM_PINCTRL_CONFIG_DRIVE_STRENGTH; 421 ret = zynqmp_pm_pinctrl_set_config(pin, param, value); 422 break; 423 case PIN_CONFIG_POWER_SOURCE: 424 param = PM_PINCTRL_CONFIG_VOLTAGE_STATUS; 425 ret = zynqmp_pm_pinctrl_get_config(pin, param, &value); 426 427 if (arg != value) 428 dev_warn(pctldev->dev, 429 "Invalid IO Standard requested for pin %d\n", 430 pin); 431 432 break; 433 case PIN_CONFIG_BIAS_HIGH_IMPEDANCE: 434 param = PM_PINCTRL_CONFIG_TRI_STATE; 435 arg = PM_PINCTRL_TRI_STATE_ENABLE; 436 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); 437 break; 438 case PIN_CONFIG_MODE_LOW_POWER: 439 /* 440 * These cases are mentioned in dts but configurable 441 * registers are unknown. So falling through to ignore 442 * boot time warnings as of now. 443 */ 444 ret = 0; 445 break; 446 case PIN_CONFIG_OUTPUT_ENABLE: 447 param = PM_PINCTRL_CONFIG_TRI_STATE; 448 arg = PM_PINCTRL_TRI_STATE_DISABLE; 449 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); 450 break; 451 default: 452 dev_warn(pctldev->dev, 453 "unsupported configuration parameter '%u'\n", 454 param); 455 ret = -ENOTSUPP; 456 break; 457 } 458 459 param = pinconf_to_config_param(configs[i]); 460 arg = pinconf_to_config_argument(configs[i]); 461 if (ret) 462 dev_warn(pctldev->dev, 463 "failed to set: pin %u param %u value %u\n", 464 pin, param, arg); 465 } 466 467 return 0; 468 } 469 470 /** 471 * zynqmp_pinconf_group_set() - Set requested config for the group 472 * @pctldev: Pincontrol device pointer. 473 * @selector: Group ID. 474 * @configs: Configuration to set. 475 * @num_configs: Number of configurations. 476 * 477 * Call function to set configs for each pin in the group. 478 * 479 * Return: 0 on success else error code. 480 */ 481 static int zynqmp_pinconf_group_set(struct pinctrl_dev *pctldev, 482 unsigned int selector, 483 unsigned long *configs, 484 unsigned int num_configs) 485 { 486 const unsigned int *pins; 487 unsigned int npins; 488 int i, ret; 489 490 zynqmp_pctrl_get_group_pins(pctldev, selector, &pins, &npins); 491 for (i = 0; i < npins; i++) { 492 ret = zynqmp_pinconf_cfg_set(pctldev, pins[i], configs, 493 num_configs); 494 if (ret) 495 return ret; 496 } 497 498 return 0; 499 } 500 501 static const struct pinconf_ops zynqmp_pinconf_ops = { 502 .is_generic = true, 503 .pin_config_get = zynqmp_pinconf_cfg_get, 504 .pin_config_set = zynqmp_pinconf_cfg_set, 505 .pin_config_group_set = zynqmp_pinconf_group_set, 506 }; 507 508 static struct pinctrl_desc zynqmp_desc = { 509 .name = "zynqmp_pinctrl", 510 .owner = THIS_MODULE, 511 .pctlops = &zynqmp_pctrl_ops, 512 .pmxops = &zynqmp_pinmux_ops, 513 .confops = &zynqmp_pinconf_ops, 514 }; 515 516 static int zynqmp_pinctrl_get_function_groups(u32 fid, u32 index, u16 *groups) 517 { 518 struct zynqmp_pm_query_data qdata = {0}; 519 u32 payload[PAYLOAD_ARG_CNT]; 520 int ret; 521 522 qdata.qid = PM_QID_PINCTRL_GET_FUNCTION_GROUPS; 523 qdata.arg1 = fid; 524 qdata.arg2 = index; 525 526 ret = zynqmp_pm_query_data(qdata, payload); 527 if (ret) 528 return ret; 529 530 memcpy(groups, &payload[1], PINCTRL_GET_FUNC_GROUPS_RESP_LEN); 531 532 return 0; 533 } 534 535 static int zynqmp_pinctrl_get_func_num_groups(u32 fid, unsigned int *ngroups) 536 { 537 struct zynqmp_pm_query_data qdata = {0}; 538 u32 payload[PAYLOAD_ARG_CNT]; 539 int ret; 540 541 qdata.qid = PM_QID_PINCTRL_GET_NUM_FUNCTION_GROUPS; 542 qdata.arg1 = fid; 543 544 ret = zynqmp_pm_query_data(qdata, payload); 545 if (ret) 546 return ret; 547 548 *ngroups = payload[1]; 549 550 return 0; 551 } 552 553 /** 554 * zynqmp_pinctrl_prepare_func_groups() - prepare function and groups data 555 * @dev: Device pointer. 556 * @fid: Function ID. 557 * @func: Function data. 558 * @groups: Groups data. 559 * 560 * Query firmware to get group IDs for each function. Firmware returns 561 * group IDs. Based on the group index for the function, group names in 562 * the function are stored. For example, the first group in "eth0" function 563 * is named as "eth0_0" and the second group as "eth0_1" and so on. 564 * 565 * Based on the group ID received from the firmware, function stores name of 566 * the group for that group ID. For example, if "eth0" first group ID 567 * is x, groups[x] name will be stored as "eth0_0". 568 * 569 * Once done for each function, each function would have its group names 570 * and each group would also have their names. 571 * 572 * Return: 0 on success else error code. 573 */ 574 static int zynqmp_pinctrl_prepare_func_groups(struct device *dev, u32 fid, 575 struct zynqmp_pmux_function *func, 576 struct zynqmp_pctrl_group *groups) 577 { 578 u16 resp[NUM_GROUPS_PER_RESP] = {0}; 579 const char **fgroups; 580 int ret, index, i, pin; 581 unsigned int npins; 582 unsigned long *used_pins __free(bitmap) = 583 bitmap_zalloc(zynqmp_desc.npins, GFP_KERNEL); 584 585 if (!used_pins) 586 return -ENOMEM; 587 588 for (index = 0; index < func->ngroups; index += NUM_GROUPS_PER_RESP) { 589 ret = zynqmp_pinctrl_get_function_groups(fid, index, resp); 590 if (ret) 591 return ret; 592 593 for (i = 0; i < NUM_GROUPS_PER_RESP; i++) { 594 if (resp[i] == NA_GROUP) 595 goto done; 596 597 if (resp[i] == RESERVED_GROUP) 598 continue; 599 600 groups[resp[i]].name = devm_kasprintf(dev, GFP_KERNEL, 601 "%s_%d_grp", 602 func->name, 603 index + i); 604 if (!groups[resp[i]].name) 605 return -ENOMEM; 606 607 for (pin = 0; pin < groups[resp[i]].npins; pin++) { 608 if (family_code == ZYNQMP_FAMILY_CODE) 609 __set_bit(groups[resp[i]].pins[pin], used_pins); 610 else 611 __set_bit((u8)groups[resp[i]].pins[pin] - 1, used_pins); 612 } 613 } 614 } 615 done: 616 npins = bitmap_weight(used_pins, zynqmp_desc.npins); 617 fgroups = devm_kcalloc(dev, size_add(func->ngroups, npins), 618 sizeof(*fgroups), GFP_KERNEL); 619 if (!fgroups) 620 return -ENOMEM; 621 622 for (i = 0; i < func->ngroups; i++) { 623 fgroups[i] = devm_kasprintf(dev, GFP_KERNEL, "%s_%d_grp", 624 func->name, i); 625 if (!fgroups[i]) 626 return -ENOMEM; 627 } 628 629 pin = 0; 630 for_each_set_bit(pin, used_pins, zynqmp_desc.npins) 631 fgroups[i++] = zynqmp_desc.pins[pin].name; 632 633 func->groups = fgroups; 634 func->ngroups += npins; 635 636 return 0; 637 } 638 639 static void zynqmp_pinctrl_get_function_name(u32 fid, char *name) 640 { 641 struct zynqmp_pm_query_data qdata = {0}; 642 u32 payload[PAYLOAD_ARG_CNT]; 643 644 qdata.qid = PM_QID_PINCTRL_GET_FUNCTION_NAME; 645 qdata.arg1 = fid; 646 647 /* 648 * Name of the function is maximum 16 bytes and cannot 649 * accommodate the return value in SMC buffers, hence ignoring 650 * the return value for this specific qid. 651 */ 652 zynqmp_pm_query_data(qdata, payload); 653 memcpy(name, payload, PINCTRL_GET_FUNC_NAME_RESP_LEN); 654 } 655 656 static int zynqmp_pinctrl_get_num_functions(unsigned int *nfuncs) 657 { 658 struct zynqmp_pm_query_data qdata = {0}; 659 u32 payload[PAYLOAD_ARG_CNT]; 660 int ret; 661 662 qdata.qid = PM_QID_PINCTRL_GET_NUM_FUNCTIONS; 663 664 ret = zynqmp_pm_query_data(qdata, payload); 665 if (ret) 666 return ret; 667 668 *nfuncs = payload[1]; 669 670 return 0; 671 } 672 673 static int zynqmp_pinctrl_get_pin_groups(u32 pin, u32 index, u16 *groups) 674 { 675 struct zynqmp_pm_query_data qdata = {0}; 676 u32 payload[PAYLOAD_ARG_CNT]; 677 int ret; 678 679 qdata.qid = PM_QID_PINCTRL_GET_PIN_GROUPS; 680 qdata.arg1 = pin; 681 qdata.arg2 = index; 682 683 ret = zynqmp_pm_query_data(qdata, payload); 684 if (ret) 685 return ret; 686 687 memcpy(groups, &payload[1], PINCTRL_GET_PIN_GROUPS_RESP_LEN); 688 689 return 0; 690 } 691 692 static void zynqmp_pinctrl_group_add_pin(struct zynqmp_pctrl_group *group, 693 unsigned int pin) 694 { 695 group->pins[group->npins++] = pin; 696 } 697 698 /** 699 * zynqmp_pinctrl_create_pin_groups() - assign pins to respective groups 700 * @dev: Device pointer. 701 * @groups: Groups data. 702 * @pin: Pin number. 703 * 704 * Query firmware to get groups available for the given pin. 705 * Based on the firmware response(group IDs for the pin), add 706 * pin number to the respective group's pin array. 707 * 708 * Once all pins are queries, each group would have its number 709 * of pins and pin numbers data. 710 * 711 * Return: 0 on success else error code. 712 */ 713 static int zynqmp_pinctrl_create_pin_groups(struct device *dev, 714 struct zynqmp_pctrl_group *groups, 715 unsigned int pin) 716 { 717 u16 resp[NUM_GROUPS_PER_RESP] = {0}; 718 int ret, i, index = 0; 719 720 do { 721 ret = zynqmp_pinctrl_get_pin_groups(pin, index, resp); 722 if (ret) 723 return ret; 724 725 for (i = 0; i < NUM_GROUPS_PER_RESP; i++) { 726 if (resp[i] == NA_GROUP) 727 return ret; 728 729 if (resp[i] == RESERVED_GROUP) 730 continue; 731 732 zynqmp_pinctrl_group_add_pin(&groups[resp[i]], pin); 733 } 734 index += NUM_GROUPS_PER_RESP; 735 } while (index <= MAX_PIN_GROUPS); 736 737 return 0; 738 } 739 740 /** 741 * zynqmp_pinctrl_prepare_group_pins() - prepare each group's pin data 742 * @dev: Device pointer. 743 * @groups: Groups data. 744 * @ngroups: Number of groups. 745 * 746 * Prepare pin number and number of pins data for each pins. 747 * 748 * Return: 0 on success else error code. 749 */ 750 static int zynqmp_pinctrl_prepare_group_pins(struct device *dev, 751 struct zynqmp_pctrl_group *groups, 752 unsigned int ngroups) 753 { 754 unsigned int pin; 755 int ret; 756 757 for (pin = 0; pin < zynqmp_desc.npins; pin++) { 758 ret = zynqmp_pinctrl_create_pin_groups(dev, groups, zynqmp_desc.pins[pin].number); 759 if (ret) 760 return ret; 761 } 762 763 return 0; 764 } 765 766 /** 767 * zynqmp_pinctrl_prepare_function_info() - prepare function info 768 * @dev: Device pointer. 769 * @pctrl: Pin control driver data. 770 * 771 * Query firmware for functions, groups and pin information and 772 * prepare pin control driver data. 773 * 774 * Query number of functions and number of function groups (number 775 * of groups in the given function) to allocate required memory buffers 776 * for functions and groups. Once buffers are allocated to store 777 * functions and groups data, query and store required information 778 * (number of groups and group names for each function, number of 779 * pins and pin numbers for each group). 780 * 781 * Return: 0 on success else error code. 782 */ 783 static int zynqmp_pinctrl_prepare_function_info(struct device *dev, 784 struct zynqmp_pinctrl *pctrl) 785 { 786 struct zynqmp_pmux_function *funcs; 787 struct zynqmp_pctrl_group *groups; 788 int ret, i; 789 790 ret = zynqmp_pinctrl_get_num_functions(&pctrl->nfuncs); 791 if (ret) 792 return ret; 793 794 funcs = devm_kcalloc(dev, pctrl->nfuncs, sizeof(*funcs), GFP_KERNEL); 795 if (!funcs) 796 return -ENOMEM; 797 798 for (i = 0; i < pctrl->nfuncs; i++) { 799 zynqmp_pinctrl_get_function_name(i, funcs[i].name); 800 801 ret = zynqmp_pinctrl_get_func_num_groups(i, &funcs[i].ngroups); 802 if (ret) 803 return ret; 804 805 pctrl->ngroups += funcs[i].ngroups; 806 } 807 808 groups = devm_kcalloc(dev, pctrl->ngroups, sizeof(*groups), GFP_KERNEL); 809 if (!groups) 810 return -ENOMEM; 811 812 ret = zynqmp_pinctrl_prepare_group_pins(dev, groups, pctrl->ngroups); 813 if (ret) 814 return ret; 815 816 for (i = 0; i < pctrl->nfuncs; i++) { 817 ret = zynqmp_pinctrl_prepare_func_groups(dev, i, &funcs[i], 818 groups); 819 if (ret) 820 return ret; 821 } 822 823 pctrl->funcs = funcs; 824 pctrl->groups = groups; 825 826 return 0; 827 } 828 829 static int zynqmp_pinctrl_get_num_pins(unsigned int *npins) 830 { 831 struct zynqmp_pm_query_data qdata = {0}; 832 u32 payload[PAYLOAD_ARG_CNT]; 833 int ret; 834 835 qdata.qid = PM_QID_PINCTRL_GET_NUM_PINS; 836 837 ret = zynqmp_pm_query_data(qdata, payload); 838 if (ret) 839 return ret; 840 841 *npins = payload[1]; 842 843 return 0; 844 } 845 846 /** 847 * zynqmp_pinctrl_prepare_pin_desc() - prepare pin description info 848 * @dev: Device pointer. 849 * @zynqmp_pins: Pin information. 850 * @npins: Number of pins. 851 * 852 * Query number of pins information from firmware and prepare pin 853 * description containing pin number and pin name. 854 * 855 * Return: 0 on success else error code. 856 */ 857 static int zynqmp_pinctrl_prepare_pin_desc(struct device *dev, 858 const struct pinctrl_pin_desc 859 **zynqmp_pins, 860 unsigned int *npins) 861 { 862 struct pinctrl_pin_desc *pins, *pin; 863 int ret; 864 int i; 865 866 ret = zynqmp_pinctrl_get_num_pins(npins); 867 if (ret) 868 return ret; 869 870 pins = devm_kcalloc(dev, *npins, sizeof(*pins), GFP_KERNEL); 871 if (!pins) 872 return -ENOMEM; 873 874 for (i = 0; i < *npins; i++) { 875 pin = &pins[i]; 876 pin->number = i; 877 pin->name = devm_kasprintf(dev, GFP_KERNEL, "%s%d", 878 ZYNQMP_PIN_PREFIX, i); 879 if (!pin->name) 880 return -ENOMEM; 881 } 882 883 *zynqmp_pins = pins; 884 885 return 0; 886 } 887 888 static int versal_pinctrl_get_attributes(u32 pin_idx, u32 *response) 889 { 890 struct zynqmp_pm_query_data qdata = {0}; 891 u32 payload[PAYLOAD_ARG_CNT]; 892 int ret; 893 894 qdata.qid = PM_QID_PINCTRL_GET_ATTRIBUTES; 895 qdata.arg1 = pin_idx; 896 897 ret = zynqmp_pm_query_data(qdata, payload); 898 if (ret) 899 return ret; 900 901 memcpy(response, &payload[1], sizeof(*response)); 902 903 return 0; 904 } 905 906 static int versal_pinctrl_prepare_pin_desc(struct device *dev, 907 const struct pinctrl_pin_desc **zynqmp_pins, 908 unsigned int *npins) 909 { 910 u32 lpd_mio_pins = 0, attr, nodetype; 911 struct pinctrl_pin_desc *pins, *pin; 912 int ret, i; 913 914 ret = zynqmp_pm_is_function_supported(PM_QUERY_DATA, PM_QID_PINCTRL_GET_ATTRIBUTES); 915 if (ret) 916 return ret; 917 918 ret = zynqmp_pinctrl_get_num_pins(npins); 919 if (ret) 920 return ret; 921 922 pins = devm_kzalloc(dev, sizeof(*pins) * *npins, GFP_KERNEL); 923 if (!pins) 924 return -ENOMEM; 925 926 for (i = 0; i < *npins; i++) { 927 ret = versal_pinctrl_get_attributes(i, &attr); 928 if (ret) 929 return ret; 930 931 pin = &pins[i]; 932 pin->number = attr; 933 nodetype = FIELD_GET(VERSAL_PINCTRL_ATTR_NODETYPE_MASK, attr); 934 if (nodetype == VERSAL_PINCTRL_NODETYPE_LPD_MIO) { 935 pin->name = devm_kasprintf(dev, GFP_KERNEL, "%s%d", 936 VERSAL_LPD_PIN_PREFIX, i); 937 lpd_mio_pins++; 938 } else { 939 pin->name = devm_kasprintf(dev, GFP_KERNEL, "%s%d", 940 VERSAL_PMC_PIN_PREFIX, i - lpd_mio_pins); 941 } 942 943 if (!pin->name) 944 return -ENOMEM; 945 } 946 947 *zynqmp_pins = pins; 948 949 return 0; 950 } 951 952 static int zynqmp_pinctrl_probe(struct platform_device *pdev) 953 { 954 struct zynqmp_pinctrl *pctrl; 955 int ret; 956 957 pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL); 958 if (!pctrl) 959 return -ENOMEM; 960 961 ret = zynqmp_pm_get_family_info(&family_code, &sub_family_code); 962 if (ret < 0) 963 return ret; 964 965 if (family_code == ZYNQMP_FAMILY_CODE) { 966 ret = zynqmp_pinctrl_prepare_pin_desc(&pdev->dev, &zynqmp_desc.pins, 967 &zynqmp_desc.npins); 968 } else { 969 ret = versal_pinctrl_prepare_pin_desc(&pdev->dev, &zynqmp_desc.pins, 970 &zynqmp_desc.npins); 971 } 972 973 if (ret) { 974 dev_err(&pdev->dev, "pin desc prepare fail with %d\n", ret); 975 return ret; 976 } 977 978 ret = zynqmp_pinctrl_prepare_function_info(&pdev->dev, pctrl); 979 if (ret) { 980 dev_err(&pdev->dev, "function info prepare fail with %d\n", ret); 981 return ret; 982 } 983 984 pctrl->pctrl = devm_pinctrl_register(&pdev->dev, &zynqmp_desc, pctrl); 985 if (IS_ERR(pctrl->pctrl)) 986 return PTR_ERR(pctrl->pctrl); 987 988 platform_set_drvdata(pdev, pctrl); 989 990 return ret; 991 } 992 993 static const struct of_device_id zynqmp_pinctrl_of_match[] = { 994 { .compatible = "xlnx,zynqmp-pinctrl" }, 995 { .compatible = "xlnx,versal-pinctrl" }, 996 { } 997 }; 998 MODULE_DEVICE_TABLE(of, zynqmp_pinctrl_of_match); 999 1000 static struct platform_driver zynqmp_pinctrl_driver = { 1001 .driver = { 1002 .name = "zynqmp-pinctrl", 1003 .of_match_table = zynqmp_pinctrl_of_match, 1004 }, 1005 .probe = zynqmp_pinctrl_probe, 1006 }; 1007 module_platform_driver(zynqmp_pinctrl_driver); 1008 1009 MODULE_AUTHOR("Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>"); 1010 MODULE_DESCRIPTION("ZynqMP Pin Controller Driver"); 1011 MODULE_LICENSE("GPL v2"); 1012