1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Pinmux and GPIO driver for tps6594 PMIC 4 * 5 * Copyright (C) 2023 BayLibre Incorporated - https://www.baylibre.com/ 6 */ 7 8 #include <linux/gpio/driver.h> 9 #include <linux/gpio/regmap.h> 10 #include <linux/module.h> 11 #include <linux/pinctrl/pinmux.h> 12 #include <linux/platform_device.h> 13 14 #include <linux/mfd/tps6594.h> 15 16 #define TPS6594_PINCTRL_GPIO_FUNCTION 0 17 #define TPS6594_PINCTRL_SCL_I2C2_CS_SPI_FUNCTION 1 18 #define TPS6594_PINCTRL_TRIG_WDOG_FUNCTION 1 19 #define TPS6594_PINCTRL_CLK32KOUT_FUNCTION 1 20 #define TPS6594_PINCTRL_SCLK_SPMI_FUNCTION 1 21 #define TPS6594_PINCTRL_SDATA_SPMI_FUNCTION 1 22 #define TPS6594_PINCTRL_NERR_MCU_FUNCTION 1 23 #define TPS6594_PINCTRL_PDOG_FUNCTION 1 24 #define TPS6594_PINCTRL_SYNCCLKIN_FUNCTION 1 25 #define TPS6594_PINCTRL_NRSTOUT_SOC_FUNCTION 2 26 #define TPS6594_PINCTRL_SYNCCLKOUT_FUNCTION 2 27 #define TPS6594_PINCTRL_SDA_I2C2_SDO_SPI_FUNCTION 2 28 #define TPS6594_PINCTRL_NERR_SOC_FUNCTION 2 29 #define TPS6594_PINCTRL_DISABLE_WDOG_FUNCTION 3 30 #define TPS6594_PINCTRL_NSLEEP1_FUNCTION 4 31 #define TPS6594_PINCTRL_NSLEEP2_FUNCTION 5 32 #define TPS6594_PINCTRL_WKUP1_FUNCTION 6 33 #define TPS6594_PINCTRL_WKUP2_FUNCTION 7 34 35 /* Special muxval for recalcitrant pins */ 36 #define TPS6594_PINCTRL_DISABLE_WDOG_FUNCTION_GPIO8 2 37 #define TPS6594_PINCTRL_SYNCCLKOUT_FUNCTION_GPIO8 3 38 #define TPS6594_PINCTRL_CLK32KOUT_FUNCTION_GPIO9 3 39 40 /* TPS65224 pin muxval */ 41 #define TPS65224_PINCTRL_SDA_I2C2_SDO_SPI_FUNCTION 1 42 #define TPS65224_PINCTRL_SCL_I2C2_CS_SPI_FUNCTION 1 43 #define TPS65224_PINCTRL_VMON1_FUNCTION 1 44 #define TPS65224_PINCTRL_VMON2_FUNCTION 1 45 #define TPS65224_PINCTRL_WKUP_FUNCTION 1 46 #define TPS65224_PINCTRL_NSLEEP2_FUNCTION 2 47 #define TPS65224_PINCTRL_NSLEEP1_FUNCTION 2 48 #define TPS65224_PINCTRL_SYNCCLKIN_FUNCTION 2 49 #define TPS65224_PINCTRL_NERR_MCU_FUNCTION 2 50 #define TPS65224_PINCTRL_NINT_FUNCTION 3 51 #define TPS65224_PINCTRL_TRIG_WDOG_FUNCTION 3 52 #define TPS65224_PINCTRL_PB_FUNCTION 3 53 #define TPS65224_PINCTRL_ADC_IN_FUNCTION 3 54 55 /* TPS65224 Special muxval for recalcitrant pins */ 56 #define TPS65224_PINCTRL_NSLEEP2_FUNCTION_GPIO5 1 57 #define TPS65224_PINCTRL_WKUP_FUNCTION_GPIO5 4 58 #define TPS65224_PINCTRL_SYNCCLKIN_FUNCTION_GPIO5 3 59 60 #define TPS6594_OFFSET_GPIO_SEL 5 61 62 #define TPS65224_NGPIO_PER_REG 6 63 #define TPS6594_NGPIO_PER_REG 8 64 65 #define FUNCTION(dev_name, fname, v) \ 66 { \ 67 .pinfunction = PINCTRL_PINFUNCTION(#fname, \ 68 dev_name##_##fname##_func_group_names, \ 69 ARRAY_SIZE(dev_name##_##fname##_func_group_names)),\ 70 .muxval = v, \ 71 } 72 73 static const struct pinctrl_pin_desc tps6594_pins[] = { 74 PINCTRL_PIN(0, "GPIO0"), PINCTRL_PIN(1, "GPIO1"), 75 PINCTRL_PIN(2, "GPIO2"), PINCTRL_PIN(3, "GPIO3"), 76 PINCTRL_PIN(4, "GPIO4"), PINCTRL_PIN(5, "GPIO5"), 77 PINCTRL_PIN(6, "GPIO6"), PINCTRL_PIN(7, "GPIO7"), 78 PINCTRL_PIN(8, "GPIO8"), PINCTRL_PIN(9, "GPIO9"), 79 PINCTRL_PIN(10, "GPIO10"), 80 }; 81 82 static const char *const tps6594_gpio_func_group_names[] = { 83 "GPIO0", "GPIO1", "GPIO2", "GPIO3", "GPIO4", "GPIO5", 84 "GPIO6", "GPIO7", "GPIO8", "GPIO9", "GPIO10", 85 }; 86 87 static const char *const tps6594_nsleep1_func_group_names[] = { 88 "GPIO0", "GPIO1", "GPIO2", "GPIO3", "GPIO4", "GPIO5", 89 "GPIO6", "GPIO7", "GPIO8", "GPIO9", "GPIO10", 90 }; 91 92 static const char *const tps6594_nsleep2_func_group_names[] = { 93 "GPIO0", "GPIO1", "GPIO2", "GPIO3", "GPIO4", "GPIO5", 94 "GPIO6", "GPIO7", "GPIO8", "GPIO9", "GPIO10", 95 }; 96 97 static const char *const tps6594_wkup1_func_group_names[] = { 98 "GPIO0", "GPIO1", "GPIO2", "GPIO3", "GPIO4", "GPIO5", 99 "GPIO6", "GPIO7", "GPIO8", "GPIO9", "GPIO10", 100 }; 101 102 static const char *const tps6594_wkup2_func_group_names[] = { 103 "GPIO0", "GPIO1", "GPIO2", "GPIO3", "GPIO4", "GPIO5", 104 "GPIO6", "GPIO7", "GPIO8", "GPIO9", "GPIO10", 105 }; 106 107 static const char *const tps6594_scl_i2c2_cs_spi_func_group_names[] = { 108 "GPIO0", 109 "GPIO1", 110 }; 111 112 static const char *const tps6594_nrstout_soc_func_group_names[] = { 113 "GPIO0", 114 "GPIO10", 115 }; 116 117 static const char *const tps6594_trig_wdog_func_group_names[] = { 118 "GPIO1", 119 "GPIO10", 120 }; 121 122 static const char *const tps6594_sda_i2c2_sdo_spi_func_group_names[] = { 123 "GPIO1", 124 }; 125 126 static const char *const tps6594_clk32kout_func_group_names[] = { 127 "GPIO2", 128 "GPIO3", 129 "GPIO7", 130 }; 131 132 static const char *const tps6594_nerr_soc_func_group_names[] = { 133 "GPIO2", 134 }; 135 136 static const char *const tps6594_sclk_spmi_func_group_names[] = { 137 "GPIO4", 138 }; 139 140 static const char *const tps6594_sdata_spmi_func_group_names[] = { 141 "GPIO5", 142 }; 143 144 static const char *const tps6594_nerr_mcu_func_group_names[] = { 145 "GPIO6", 146 }; 147 148 static const char *const tps6594_syncclkout_func_group_names[] = { 149 "GPIO7", 150 "GPIO9", 151 }; 152 153 static const char *const tps6594_disable_wdog_func_group_names[] = { 154 "GPIO7", 155 "GPIO8", 156 }; 157 158 static const char *const tps6594_pdog_func_group_names[] = { 159 "GPIO8", 160 }; 161 162 static const char *const tps6594_syncclkin_func_group_names[] = { 163 "GPIO9", 164 }; 165 166 static const struct pinctrl_pin_desc tps65224_pins[] = { 167 PINCTRL_PIN(0, "GPIO0"), PINCTRL_PIN(1, "GPIO1"), 168 PINCTRL_PIN(2, "GPIO2"), PINCTRL_PIN(3, "GPIO3"), 169 PINCTRL_PIN(4, "GPIO4"), PINCTRL_PIN(5, "GPIO5"), 170 }; 171 172 static const char *const tps65224_gpio_func_group_names[] = { 173 "GPIO0", "GPIO1", "GPIO2", "GPIO3", "GPIO4", "GPIO5", 174 }; 175 176 static const char *const tps65224_sda_i2c2_sdo_spi_func_group_names[] = { 177 "GPIO0", 178 }; 179 180 static const char *const tps65224_nsleep2_func_group_names[] = { 181 "GPIO0", "GPIO5", 182 }; 183 184 static const char *const tps65224_nint_func_group_names[] = { 185 "GPIO0", 186 }; 187 188 static const char *const tps65224_scl_i2c2_cs_spi_func_group_names[] = { 189 "GPIO1", 190 }; 191 192 static const char *const tps65224_nsleep1_func_group_names[] = { 193 "GPIO1", "GPIO2", "GPIO3", 194 }; 195 196 static const char *const tps65224_trig_wdog_func_group_names[] = { 197 "GPIO1", 198 }; 199 200 static const char *const tps65224_vmon1_func_group_names[] = { 201 "GPIO2", 202 }; 203 204 static const char *const tps65224_pb_func_group_names[] = { 205 "GPIO2", 206 }; 207 208 static const char *const tps65224_vmon2_func_group_names[] = { 209 "GPIO3", 210 }; 211 212 static const char *const tps65224_adc_in_func_group_names[] = { 213 "GPIO3", "GPIO4", 214 }; 215 216 static const char *const tps65224_wkup_func_group_names[] = { 217 "GPIO4", "GPIO5", 218 }; 219 220 static const char *const tps65224_syncclkin_func_group_names[] = { 221 "GPIO4", "GPIO5", 222 }; 223 224 static const char *const tps65224_nerr_mcu_func_group_names[] = { 225 "GPIO5", 226 }; 227 228 static const char *const tps652g1_cs_spi_func_group_names[] = { 229 "GPIO1", 230 }; 231 232 struct tps6594_pinctrl_function { 233 struct pinfunction pinfunction; 234 u8 muxval; 235 }; 236 237 struct muxval_remap { 238 unsigned int group; 239 u8 muxval; 240 u8 remap; 241 }; 242 243 static struct muxval_remap tps65224_muxval_remap[] = { 244 {5, TPS6594_PINCTRL_DISABLE_WDOG_FUNCTION, TPS65224_PINCTRL_WKUP_FUNCTION_GPIO5}, 245 {5, TPS65224_PINCTRL_SYNCCLKIN_FUNCTION, TPS65224_PINCTRL_SYNCCLKIN_FUNCTION_GPIO5}, 246 {5, TPS65224_PINCTRL_NSLEEP2_FUNCTION, TPS65224_PINCTRL_NSLEEP2_FUNCTION_GPIO5}, 247 }; 248 249 static struct muxval_remap tps6594_muxval_remap[] = { 250 {8, TPS6594_PINCTRL_DISABLE_WDOG_FUNCTION, TPS6594_PINCTRL_DISABLE_WDOG_FUNCTION_GPIO8}, 251 {8, TPS6594_PINCTRL_SYNCCLKOUT_FUNCTION, TPS6594_PINCTRL_SYNCCLKOUT_FUNCTION_GPIO8}, 252 {9, TPS6594_PINCTRL_CLK32KOUT_FUNCTION, TPS6594_PINCTRL_CLK32KOUT_FUNCTION_GPIO9}, 253 }; 254 255 static const struct tps6594_pinctrl_function pinctrl_functions[] = { 256 FUNCTION(tps6594, gpio, TPS6594_PINCTRL_GPIO_FUNCTION), 257 FUNCTION(tps6594, nsleep1, TPS6594_PINCTRL_NSLEEP1_FUNCTION), 258 FUNCTION(tps6594, nsleep2, TPS6594_PINCTRL_NSLEEP2_FUNCTION), 259 FUNCTION(tps6594, wkup1, TPS6594_PINCTRL_WKUP1_FUNCTION), 260 FUNCTION(tps6594, wkup2, TPS6594_PINCTRL_WKUP2_FUNCTION), 261 FUNCTION(tps6594, scl_i2c2_cs_spi, TPS6594_PINCTRL_SCL_I2C2_CS_SPI_FUNCTION), 262 FUNCTION(tps6594, nrstout_soc, TPS6594_PINCTRL_NRSTOUT_SOC_FUNCTION), 263 FUNCTION(tps6594, trig_wdog, TPS6594_PINCTRL_TRIG_WDOG_FUNCTION), 264 FUNCTION(tps6594, sda_i2c2_sdo_spi, TPS6594_PINCTRL_SDA_I2C2_SDO_SPI_FUNCTION), 265 FUNCTION(tps6594, clk32kout, TPS6594_PINCTRL_CLK32KOUT_FUNCTION), 266 FUNCTION(tps6594, nerr_soc, TPS6594_PINCTRL_NERR_SOC_FUNCTION), 267 FUNCTION(tps6594, sclk_spmi, TPS6594_PINCTRL_SCLK_SPMI_FUNCTION), 268 FUNCTION(tps6594, sdata_spmi, TPS6594_PINCTRL_SDATA_SPMI_FUNCTION), 269 FUNCTION(tps6594, nerr_mcu, TPS6594_PINCTRL_NERR_MCU_FUNCTION), 270 FUNCTION(tps6594, syncclkout, TPS6594_PINCTRL_SYNCCLKOUT_FUNCTION), 271 FUNCTION(tps6594, disable_wdog, TPS6594_PINCTRL_DISABLE_WDOG_FUNCTION), 272 FUNCTION(tps6594, pdog, TPS6594_PINCTRL_PDOG_FUNCTION), 273 FUNCTION(tps6594, syncclkin, TPS6594_PINCTRL_SYNCCLKIN_FUNCTION), 274 }; 275 276 static const struct tps6594_pinctrl_function tps65224_pinctrl_functions[] = { 277 FUNCTION(tps65224, gpio, TPS6594_PINCTRL_GPIO_FUNCTION), 278 FUNCTION(tps65224, sda_i2c2_sdo_spi, TPS65224_PINCTRL_SDA_I2C2_SDO_SPI_FUNCTION), 279 FUNCTION(tps65224, nsleep2, TPS65224_PINCTRL_NSLEEP2_FUNCTION), 280 FUNCTION(tps65224, nint, TPS65224_PINCTRL_NINT_FUNCTION), 281 FUNCTION(tps65224, scl_i2c2_cs_spi, TPS65224_PINCTRL_SCL_I2C2_CS_SPI_FUNCTION), 282 FUNCTION(tps65224, nsleep1, TPS65224_PINCTRL_NSLEEP1_FUNCTION), 283 FUNCTION(tps65224, trig_wdog, TPS65224_PINCTRL_TRIG_WDOG_FUNCTION), 284 FUNCTION(tps65224, vmon1, TPS65224_PINCTRL_VMON1_FUNCTION), 285 FUNCTION(tps65224, pb, TPS65224_PINCTRL_PB_FUNCTION), 286 FUNCTION(tps65224, vmon2, TPS65224_PINCTRL_VMON2_FUNCTION), 287 FUNCTION(tps65224, adc_in, TPS65224_PINCTRL_ADC_IN_FUNCTION), 288 FUNCTION(tps65224, wkup, TPS65224_PINCTRL_WKUP_FUNCTION), 289 FUNCTION(tps65224, syncclkin, TPS65224_PINCTRL_SYNCCLKIN_FUNCTION), 290 FUNCTION(tps65224, nerr_mcu, TPS65224_PINCTRL_NERR_MCU_FUNCTION), 291 }; 292 293 static const struct tps6594_pinctrl_function tps652g1_pinctrl_functions[] = { 294 FUNCTION(tps65224, gpio, TPS6594_PINCTRL_GPIO_FUNCTION), 295 FUNCTION(tps65224, sda_i2c2_sdo_spi, TPS65224_PINCTRL_SDA_I2C2_SDO_SPI_FUNCTION), 296 FUNCTION(tps65224, nsleep2, TPS65224_PINCTRL_NSLEEP2_FUNCTION), 297 FUNCTION(tps65224, nint, TPS65224_PINCTRL_NINT_FUNCTION), 298 FUNCTION(tps652g1, cs_spi, TPS65224_PINCTRL_SCL_I2C2_CS_SPI_FUNCTION), 299 FUNCTION(tps65224, nsleep1, TPS65224_PINCTRL_NSLEEP1_FUNCTION), 300 FUNCTION(tps65224, pb, TPS65224_PINCTRL_PB_FUNCTION), 301 FUNCTION(tps65224, wkup, TPS65224_PINCTRL_WKUP_FUNCTION), 302 FUNCTION(tps65224, syncclkin, TPS65224_PINCTRL_SYNCCLKIN_FUNCTION), 303 }; 304 305 struct tps6594_pinctrl { 306 struct tps6594 *tps; 307 struct gpio_regmap *gpio_regmap; 308 struct pinctrl_dev *pctl_dev; 309 const struct tps6594_pinctrl_function *funcs; 310 const struct pinctrl_pin_desc *pins; 311 int func_cnt; 312 int num_pins; 313 u8 mux_sel_mask; 314 unsigned int remap_cnt; 315 struct muxval_remap *remap; 316 }; 317 318 static struct tps6594_pinctrl tps652g1_template_pinctrl = { 319 .funcs = tps652g1_pinctrl_functions, 320 .func_cnt = ARRAY_SIZE(tps652g1_pinctrl_functions), 321 .pins = tps65224_pins, 322 .num_pins = ARRAY_SIZE(tps65224_pins), 323 .mux_sel_mask = TPS65224_MASK_GPIO_SEL, 324 .remap = tps65224_muxval_remap, 325 .remap_cnt = ARRAY_SIZE(tps65224_muxval_remap), 326 }; 327 328 static struct tps6594_pinctrl tps65224_template_pinctrl = { 329 .funcs = tps65224_pinctrl_functions, 330 .func_cnt = ARRAY_SIZE(tps65224_pinctrl_functions), 331 .pins = tps65224_pins, 332 .num_pins = ARRAY_SIZE(tps65224_pins), 333 .mux_sel_mask = TPS65224_MASK_GPIO_SEL, 334 .remap = tps65224_muxval_remap, 335 .remap_cnt = ARRAY_SIZE(tps65224_muxval_remap), 336 }; 337 338 static struct tps6594_pinctrl tps6594_template_pinctrl = { 339 .funcs = pinctrl_functions, 340 .func_cnt = ARRAY_SIZE(pinctrl_functions), 341 .pins = tps6594_pins, 342 .num_pins = ARRAY_SIZE(tps6594_pins), 343 .mux_sel_mask = TPS6594_MASK_GPIO_SEL, 344 .remap = tps6594_muxval_remap, 345 .remap_cnt = ARRAY_SIZE(tps6594_muxval_remap), 346 }; 347 348 static int tps6594_gpio_regmap_xlate(struct gpio_regmap *gpio, 349 unsigned int base, unsigned int offset, 350 unsigned int *reg, unsigned int *mask) 351 { 352 unsigned int line = offset % 8; 353 unsigned int stride = offset / 8; 354 355 switch (base) { 356 case TPS6594_REG_GPIOX_CONF(0): 357 *reg = TPS6594_REG_GPIOX_CONF(offset); 358 *mask = TPS6594_BIT_GPIO_DIR; 359 return 0; 360 case TPS6594_REG_GPIO_IN_1: 361 case TPS6594_REG_GPIO_OUT_1: 362 *reg = base + stride; 363 *mask = BIT(line); 364 return 0; 365 default: 366 return -EINVAL; 367 } 368 } 369 370 static int tps6594_pmx_func_cnt(struct pinctrl_dev *pctldev) 371 { 372 struct tps6594_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctldev); 373 374 return pinctrl->func_cnt; 375 } 376 377 static const char *tps6594_pmx_func_name(struct pinctrl_dev *pctldev, 378 unsigned int selector) 379 { 380 struct tps6594_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctldev); 381 382 return pinctrl->funcs[selector].pinfunction.name; 383 } 384 385 static int tps6594_pmx_func_groups(struct pinctrl_dev *pctldev, 386 unsigned int selector, 387 const char *const **groups, 388 unsigned int *num_groups) 389 { 390 struct tps6594_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctldev); 391 392 *groups = pinctrl->funcs[selector].pinfunction.groups; 393 *num_groups = pinctrl->funcs[selector].pinfunction.ngroups; 394 395 return 0; 396 } 397 398 static int tps6594_pmx_set(struct tps6594_pinctrl *pinctrl, unsigned int pin, 399 u8 muxval) 400 { 401 u8 mux_sel_val = muxval << TPS6594_OFFSET_GPIO_SEL; 402 u8 mux_sel_mask = pinctrl->mux_sel_mask; 403 404 if (pinctrl->tps->chip_id == TPS65224 && pin == 5) { 405 /* GPIO6 has a different mask in TPS65224*/ 406 mux_sel_mask = TPS65224_MASK_GPIO_SEL_GPIO6; 407 } 408 409 return regmap_update_bits(pinctrl->tps->regmap, 410 TPS6594_REG_GPIOX_CONF(pin), 411 mux_sel_mask, mux_sel_val); 412 } 413 414 static int tps6594_pmx_set_mux(struct pinctrl_dev *pctldev, 415 unsigned int function, unsigned int group) 416 { 417 struct tps6594_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctldev); 418 u8 muxval = pinctrl->funcs[function].muxval; 419 unsigned int remap_cnt = pinctrl->remap_cnt; 420 struct muxval_remap *remap = pinctrl->remap; 421 422 for (unsigned int i = 0; i < remap_cnt; i++) { 423 if (group == remap[i].group && muxval == remap[i].muxval) { 424 muxval = remap[i].remap; 425 break; 426 } 427 } 428 429 return tps6594_pmx_set(pinctrl, group, muxval); 430 } 431 432 static int tps6594_pmx_gpio_set_direction(struct pinctrl_dev *pctldev, 433 struct pinctrl_gpio_range *range, 434 unsigned int offset, bool input) 435 { 436 struct tps6594_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctldev); 437 u8 muxval = pinctrl->funcs[TPS6594_PINCTRL_GPIO_FUNCTION].muxval; 438 439 return tps6594_pmx_set(pinctrl, offset, muxval); 440 } 441 442 static const struct pinmux_ops tps6594_pmx_ops = { 443 .get_functions_count = tps6594_pmx_func_cnt, 444 .get_function_name = tps6594_pmx_func_name, 445 .get_function_groups = tps6594_pmx_func_groups, 446 .set_mux = tps6594_pmx_set_mux, 447 .gpio_set_direction = tps6594_pmx_gpio_set_direction, 448 .strict = true, 449 }; 450 451 static int tps6594_groups_cnt(struct pinctrl_dev *pctldev) 452 { 453 struct tps6594_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctldev); 454 455 return pinctrl->num_pins; 456 } 457 458 static int tps6594_group_pins(struct pinctrl_dev *pctldev, 459 unsigned int selector, const unsigned int **pins, 460 unsigned int *num_pins) 461 { 462 struct tps6594_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctldev); 463 464 *pins = &pinctrl->pins[selector].number; 465 *num_pins = 1; 466 467 return 0; 468 } 469 470 static const char *tps6594_group_name(struct pinctrl_dev *pctldev, 471 unsigned int selector) 472 { 473 struct tps6594_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctldev); 474 475 return pinctrl->pins[selector].name; 476 } 477 478 static const struct pinctrl_ops tps6594_pctrl_ops = { 479 .dt_node_to_map = pinconf_generic_dt_node_to_map_group, 480 .dt_free_map = pinconf_generic_dt_free_map, 481 .get_groups_count = tps6594_groups_cnt, 482 .get_group_name = tps6594_group_name, 483 .get_group_pins = tps6594_group_pins, 484 }; 485 486 static int tps6594_pinctrl_probe(struct platform_device *pdev) 487 { 488 struct tps6594 *tps = dev_get_drvdata(pdev->dev.parent); 489 struct device *dev = &pdev->dev; 490 struct tps6594_pinctrl *pinctrl; 491 struct pinctrl_desc *pctrl_desc; 492 struct gpio_regmap_config config = {}; 493 494 pctrl_desc = devm_kzalloc(dev, sizeof(*pctrl_desc), GFP_KERNEL); 495 if (!pctrl_desc) 496 return -ENOMEM; 497 498 pinctrl = devm_kzalloc(dev, sizeof(*pinctrl), GFP_KERNEL); 499 if (!pinctrl) 500 return -ENOMEM; 501 502 switch (tps->chip_id) { 503 case TPS652G1: 504 pctrl_desc->pins = tps65224_pins; 505 pctrl_desc->npins = ARRAY_SIZE(tps65224_pins); 506 507 *pinctrl = tps652g1_template_pinctrl; 508 509 config.ngpio = ARRAY_SIZE(tps65224_gpio_func_group_names); 510 config.ngpio_per_reg = TPS65224_NGPIO_PER_REG; 511 break; 512 case TPS65224: 513 pctrl_desc->pins = tps65224_pins; 514 pctrl_desc->npins = ARRAY_SIZE(tps65224_pins); 515 516 *pinctrl = tps65224_template_pinctrl; 517 518 config.ngpio = ARRAY_SIZE(tps65224_gpio_func_group_names); 519 config.ngpio_per_reg = TPS65224_NGPIO_PER_REG; 520 break; 521 case TPS6593: 522 case TPS6594: 523 case LP8764: 524 pctrl_desc->pins = tps6594_pins; 525 pctrl_desc->npins = ARRAY_SIZE(tps6594_pins); 526 527 *pinctrl = tps6594_template_pinctrl; 528 529 config.ngpio = ARRAY_SIZE(tps6594_gpio_func_group_names); 530 config.ngpio_per_reg = TPS6594_NGPIO_PER_REG; 531 break; 532 default: 533 break; 534 } 535 536 pinctrl->tps = tps; 537 538 pctrl_desc->name = dev_name(dev); 539 pctrl_desc->owner = THIS_MODULE; 540 pctrl_desc->pctlops = &tps6594_pctrl_ops; 541 pctrl_desc->pmxops = &tps6594_pmx_ops; 542 543 config.parent = tps->dev; 544 config.regmap = tps->regmap; 545 config.reg_dat_base = TPS6594_REG_GPIO_IN_1; 546 config.reg_set_base = TPS6594_REG_GPIO_OUT_1; 547 config.reg_dir_out_base = TPS6594_REG_GPIOX_CONF(0); 548 config.reg_mask_xlate = tps6594_gpio_regmap_xlate; 549 550 pinctrl->pctl_dev = devm_pinctrl_register(dev, pctrl_desc, pinctrl); 551 if (IS_ERR(pinctrl->pctl_dev)) 552 return dev_err_probe(dev, PTR_ERR(pinctrl->pctl_dev), 553 "Couldn't register pinctrl driver\n"); 554 555 pinctrl->gpio_regmap = devm_gpio_regmap_register(dev, &config); 556 if (IS_ERR(pinctrl->gpio_regmap)) 557 return dev_err_probe(dev, PTR_ERR(pinctrl->gpio_regmap), 558 "Couldn't register gpio_regmap driver\n"); 559 560 return 0; 561 } 562 563 static const struct platform_device_id tps6594_pinctrl_id_table[] = { 564 { .name = "tps6594-pinctrl" }, 565 { } 566 }; 567 MODULE_DEVICE_TABLE(platform, tps6594_pinctrl_id_table); 568 569 static struct platform_driver tps6594_pinctrl_driver = { 570 .probe = tps6594_pinctrl_probe, 571 .driver = { 572 .name = "tps6594-pinctrl", 573 }, 574 .id_table = tps6594_pinctrl_id_table, 575 }; 576 module_platform_driver(tps6594_pinctrl_driver); 577 578 MODULE_AUTHOR("Esteban Blanc <eblanc@baylibre.com>"); 579 MODULE_AUTHOR("Nirmala Devi Mal Nadar <m.nirmaladevi@ltts.com>"); 580 MODULE_DESCRIPTION("TPS6594 pinctrl and GPIO driver"); 581 MODULE_LICENSE("GPL"); 582