1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Awinic AW9523B i2c pin controller driver 4 * Copyright (c) 2020, AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> 5 */ 6 7 #include <linux/bitfield.h> 8 #include <linux/errno.h> 9 #include <linux/gpio/consumer.h> 10 #include <linux/gpio/driver.h> 11 #include <linux/i2c.h> 12 #include <linux/init.h> 13 #include <linux/interrupt.h> 14 #include <linux/irq.h> 15 #include <linux/module.h> 16 #include <linux/mutex.h> 17 #include <linux/property.h> 18 #include <linux/regmap.h> 19 #include <linux/regulator/consumer.h> 20 #include <linux/slab.h> 21 22 #include <linux/pinctrl/pinconf-generic.h> 23 #include <linux/pinctrl/pinconf.h> 24 #include <linux/pinctrl/pinctrl.h> 25 #include <linux/pinctrl/pinmux.h> 26 27 #define AW9523_MAX_FUNCS 2 28 #define AW9523_NUM_PORTS 2 29 #define AW9523_PINS_PER_PORT 8 30 31 /* 32 * HW needs at least 20uS for reset and at least 1-2uS to recover from 33 * reset, but we have to account for eventual board quirks, if any: 34 * for this reason, keep reset asserted for 50uS and wait for 20uS 35 * to recover from the reset. 36 */ 37 #define AW9523_HW_RESET_US 50 38 #define AW9523_HW_RESET_RECOVERY_US 20 39 40 /* Port 0: P0_0...P0_7 - Port 1: P1_0...P1_7 */ 41 #define AW9523_PIN_TO_PORT(pin) (pin >> 3) 42 #define AW9523_REG_IN_STATE(pin) (0x00 + AW9523_PIN_TO_PORT(pin)) 43 #define AW9523_REG_OUT_STATE(pin) (0x02 + AW9523_PIN_TO_PORT(pin)) 44 #define AW9523_REG_CONF_STATE(pin) (0x04 + AW9523_PIN_TO_PORT(pin)) 45 #define AW9523_REG_INTR_DIS(pin) (0x06 + AW9523_PIN_TO_PORT(pin)) 46 #define AW9523_REG_CHIPID 0x10 47 #define AW9523_VAL_EXPECTED_CHIPID 0x23 48 49 #define AW9523_REG_GCR 0x11 50 #define AW9523_GCR_ISEL_MASK GENMASK(0, 1) 51 #define AW9523_GCR_GPOMD_MASK BIT(4) 52 53 #define AW9523_REG_PORT_MODE(pin) (0x12 + AW9523_PIN_TO_PORT(pin)) 54 #define AW9523_REG_SOFT_RESET 0x7f 55 #define AW9523_VAL_RESET 0x00 56 57 /* 58 * struct aw9523_irq - Interrupt controller structure 59 * @lock: mutex locking for the irq bus 60 * @cached_gpio: stores the previous gpio status for bit comparison 61 */ 62 struct aw9523_irq { 63 struct mutex lock; 64 u16 cached_gpio; 65 }; 66 67 /* 68 * struct aw9523 - Main driver structure 69 * @dev: device handle 70 * @regmap: regmap handle for current device 71 * @i2c_lock: Mutex lock for i2c operations 72 * @reset_gpio: Hardware reset (RSTN) signal GPIO 73 * @vio_vreg: VCC regulator (Optional) 74 * @pctl: pinctrl handle for current device 75 * @gpio: structure holding gpiochip params 76 * @irq: Interrupt controller structure 77 */ 78 struct aw9523 { 79 struct device *dev; 80 struct regmap *regmap; 81 struct mutex i2c_lock; 82 struct gpio_desc *reset_gpio; 83 int vio_vreg; 84 struct pinctrl_dev *pctl; 85 struct gpio_chip gpio; 86 struct aw9523_irq *irq; 87 }; 88 89 static const struct pinctrl_pin_desc aw9523_pins[] = { 90 /* Port 0 */ 91 PINCTRL_PIN(0, "gpio0"), 92 PINCTRL_PIN(1, "gpio1"), 93 PINCTRL_PIN(2, "gpio2"), 94 PINCTRL_PIN(3, "gpio3"), 95 PINCTRL_PIN(4, "gpio4"), 96 PINCTRL_PIN(5, "gpio5"), 97 PINCTRL_PIN(6, "gpio6"), 98 PINCTRL_PIN(7, "gpio7"), 99 100 /* Port 1 */ 101 PINCTRL_PIN(8, "gpio8"), 102 PINCTRL_PIN(9, "gpio9"), 103 PINCTRL_PIN(10, "gpio10"), 104 PINCTRL_PIN(11, "gpio11"), 105 PINCTRL_PIN(12, "gpio12"), 106 PINCTRL_PIN(13, "gpio13"), 107 PINCTRL_PIN(14, "gpio14"), 108 PINCTRL_PIN(15, "gpio15"), 109 }; 110 111 static int aw9523_pinctrl_get_groups_count(struct pinctrl_dev *pctldev) 112 { 113 return ARRAY_SIZE(aw9523_pins); 114 } 115 116 static const char *aw9523_pinctrl_get_group_name(struct pinctrl_dev *pctldev, 117 unsigned int selector) 118 { 119 return aw9523_pins[selector].name; 120 } 121 122 static int aw9523_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, 123 unsigned int selector, 124 const unsigned int **pins, 125 unsigned int *num_pins) 126 { 127 *pins = &aw9523_pins[selector].number; 128 *num_pins = 1; 129 return 0; 130 } 131 132 static const struct pinctrl_ops aw9523_pinctrl_ops = { 133 .get_groups_count = aw9523_pinctrl_get_groups_count, 134 .get_group_pins = aw9523_pinctrl_get_group_pins, 135 .get_group_name = aw9523_pinctrl_get_group_name, 136 .dt_node_to_map = pinconf_generic_dt_node_to_map_pin, 137 .dt_free_map = pinconf_generic_dt_free_map, 138 }; 139 140 static const char * const gpio_pwm_groups[] = { 141 "gpio0", "gpio1", "gpio2", "gpio3", /* 0-3 */ 142 "gpio4", "gpio5", "gpio6", "gpio7", /* 4-7 */ 143 "gpio8", "gpio9", "gpio10", "gpio11", /* 8-11 */ 144 "gpio12", "gpio13", "gpio14", "gpio15", /* 11-15 */ 145 }; 146 147 /* Warning: Do NOT reorder this array */ 148 static const struct pinfunction aw9523_pmx[] = { 149 PINCTRL_PINFUNCTION("pwm", gpio_pwm_groups, ARRAY_SIZE(gpio_pwm_groups)), 150 PINCTRL_PINFUNCTION("gpio", gpio_pwm_groups, ARRAY_SIZE(gpio_pwm_groups)), 151 }; 152 153 static int aw9523_pmx_get_funcs_count(struct pinctrl_dev *pctl) 154 { 155 return ARRAY_SIZE(aw9523_pmx); 156 } 157 158 static const char *aw9523_pmx_get_fname(struct pinctrl_dev *pctl, 159 unsigned int sel) 160 { 161 return aw9523_pmx[sel].name; 162 } 163 164 static int aw9523_pmx_get_groups(struct pinctrl_dev *pctl, unsigned int sel, 165 const char * const **groups, 166 unsigned int * const ngroups) 167 { 168 *groups = aw9523_pmx[sel].groups; 169 *ngroups = aw9523_pmx[sel].ngroups; 170 return 0; 171 } 172 173 static int aw9523_pmx_set_mux(struct pinctrl_dev *pctl, unsigned int fsel, 174 unsigned int grp) 175 { 176 struct aw9523 *awi = pinctrl_dev_get_drvdata(pctl); 177 int ret, pin = aw9523_pins[grp].number % AW9523_PINS_PER_PORT; 178 179 if (fsel >= ARRAY_SIZE(aw9523_pmx)) 180 return -EINVAL; 181 182 /* 183 * This maps directly to the aw9523_pmx array: programming a 184 * high bit means "gpio" and a low bit means "pwm". 185 */ 186 mutex_lock(&awi->i2c_lock); 187 ret = regmap_update_bits(awi->regmap, AW9523_REG_PORT_MODE(pin), 188 BIT(pin), (fsel ? BIT(pin) : 0)); 189 mutex_unlock(&awi->i2c_lock); 190 return ret; 191 } 192 193 static const struct pinmux_ops aw9523_pinmux_ops = { 194 .get_functions_count = aw9523_pmx_get_funcs_count, 195 .get_function_name = aw9523_pmx_get_fname, 196 .get_function_groups = aw9523_pmx_get_groups, 197 .set_mux = aw9523_pmx_set_mux, 198 }; 199 200 static int aw9523_pcfg_param_to_reg(enum pin_config_param pcp, int pin, u8 *r) 201 { 202 u8 reg; 203 204 switch (pcp) { 205 case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT: 206 case PIN_CONFIG_BIAS_PULL_DOWN: 207 case PIN_CONFIG_BIAS_PULL_UP: 208 reg = AW9523_REG_IN_STATE(pin); 209 break; 210 case PIN_CONFIG_DRIVE_OPEN_DRAIN: 211 case PIN_CONFIG_DRIVE_PUSH_PULL: 212 reg = AW9523_REG_GCR; 213 break; 214 case PIN_CONFIG_INPUT_ENABLE: 215 case PIN_CONFIG_OUTPUT_ENABLE: 216 reg = AW9523_REG_CONF_STATE(pin); 217 break; 218 case PIN_CONFIG_LEVEL: 219 reg = AW9523_REG_OUT_STATE(pin); 220 break; 221 default: 222 return -ENOTSUPP; 223 } 224 *r = reg; 225 226 return 0; 227 } 228 229 static int aw9523_pconf_get(struct pinctrl_dev *pctldev, unsigned int pin, 230 unsigned long *config) 231 { 232 struct aw9523 *awi = pinctrl_dev_get_drvdata(pctldev); 233 enum pin_config_param param = pinconf_to_config_param(*config); 234 int regbit = pin % AW9523_PINS_PER_PORT; 235 unsigned int val; 236 u8 reg; 237 int rc; 238 239 rc = aw9523_pcfg_param_to_reg(param, pin, ®); 240 if (rc) 241 return rc; 242 243 mutex_lock(&awi->i2c_lock); 244 rc = regmap_read(awi->regmap, reg, &val); 245 mutex_unlock(&awi->i2c_lock); 246 if (rc) 247 return rc; 248 249 switch (param) { 250 case PIN_CONFIG_BIAS_PULL_UP: 251 case PIN_CONFIG_INPUT_ENABLE: 252 case PIN_CONFIG_LEVEL: 253 val &= BIT(regbit); 254 break; 255 case PIN_CONFIG_BIAS_PULL_DOWN: 256 case PIN_CONFIG_OUTPUT_ENABLE: 257 val &= BIT(regbit); 258 val = !val; 259 break; 260 case PIN_CONFIG_DRIVE_OPEN_DRAIN: 261 if (pin >= AW9523_PINS_PER_PORT) 262 val = 0; 263 else 264 val = !FIELD_GET(AW9523_GCR_GPOMD_MASK, val); 265 break; 266 case PIN_CONFIG_DRIVE_PUSH_PULL: 267 if (pin >= AW9523_PINS_PER_PORT) 268 val = 1; 269 else 270 val = FIELD_GET(AW9523_GCR_GPOMD_MASK, val); 271 break; 272 default: 273 return -ENOTSUPP; 274 } 275 if (val < 1) 276 return -EINVAL; 277 278 *config = pinconf_to_config_packed(param, !!val); 279 280 return rc; 281 } 282 283 static int aw9523_pconf_set(struct pinctrl_dev *pctldev, unsigned int pin, 284 unsigned long *configs, unsigned int num_configs) 285 { 286 struct aw9523 *awi = pinctrl_dev_get_drvdata(pctldev); 287 enum pin_config_param param; 288 int regbit = pin % AW9523_PINS_PER_PORT; 289 u32 arg; 290 u8 reg; 291 unsigned int mask, val; 292 int i, rc; 293 294 guard(mutex)(&awi->i2c_lock); 295 for (i = 0; i < num_configs; i++) { 296 param = pinconf_to_config_param(configs[i]); 297 arg = pinconf_to_config_argument(configs[i]); 298 299 rc = aw9523_pcfg_param_to_reg(param, pin, ®); 300 if (rc) 301 return rc; 302 303 switch (param) { 304 case PIN_CONFIG_LEVEL: 305 /* First, enable pin output */ 306 rc = regmap_update_bits(awi->regmap, 307 AW9523_REG_CONF_STATE(pin), 308 BIT(regbit), 0); 309 if (rc) 310 return rc; 311 312 /* Then, fall through to config output level */ 313 fallthrough; 314 case PIN_CONFIG_OUTPUT_ENABLE: 315 arg = !arg; 316 fallthrough; 317 case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT: 318 case PIN_CONFIG_BIAS_PULL_DOWN: 319 case PIN_CONFIG_BIAS_PULL_UP: 320 case PIN_CONFIG_INPUT_ENABLE: 321 mask = BIT(regbit); 322 val = arg ? BIT(regbit) : 0; 323 break; 324 case PIN_CONFIG_DRIVE_OPEN_DRAIN: 325 /* Open-Drain is supported only on port 0 */ 326 if (pin >= AW9523_PINS_PER_PORT) 327 return -ENOTSUPP; 328 329 mask = AW9523_GCR_GPOMD_MASK; 330 val = 0; 331 break; 332 case PIN_CONFIG_DRIVE_PUSH_PULL: 333 /* Port 1 is always Push-Pull */ 334 if (pin >= AW9523_PINS_PER_PORT) { 335 mask = 0; 336 val = 0; 337 continue; 338 } 339 mask = AW9523_GCR_GPOMD_MASK; 340 val = AW9523_GCR_GPOMD_MASK; 341 break; 342 default: 343 return -ENOTSUPP; 344 } 345 346 rc = regmap_update_bits(awi->regmap, reg, mask, val); 347 if (rc) 348 return rc; 349 } 350 351 return 0; 352 } 353 354 static const struct pinconf_ops aw9523_pinconf_ops = { 355 .pin_config_get = aw9523_pconf_get, 356 .pin_config_set = aw9523_pconf_set, 357 .is_generic = true, 358 }; 359 360 /* 361 * aw9523_get_pin_direction - Get pin direction 362 * @regmap: Regmap structure 363 * @pin: gpiolib pin number 364 * @n: pin index in port register 365 * 366 * Return: Pin direction for success or negative number for error 367 */ 368 static int aw9523_get_pin_direction(struct regmap *regmap, u8 pin, u8 n) 369 { 370 int ret; 371 372 ret = regmap_test_bits(regmap, AW9523_REG_CONF_STATE(pin), BIT(n)); 373 if (ret < 0) 374 return ret; 375 376 return ret ? GPIO_LINE_DIRECTION_IN : GPIO_LINE_DIRECTION_OUT; 377 } 378 379 /* 380 * aw9523_get_port_state - Get input or output state for entire port 381 * @regmap: Regmap structure 382 * @pin: gpiolib pin number 383 * @regbit: hw pin index, used to retrieve port number 384 * @state: returned port state 385 * 386 * Return: Zero for success or negative number for error 387 */ 388 static int aw9523_get_port_state(struct regmap *regmap, u8 pin, u8 regbit, 389 unsigned int *state) 390 { 391 u8 reg; 392 int dir; 393 394 dir = aw9523_get_pin_direction(regmap, pin, regbit); 395 if (dir < 0) 396 return dir; 397 398 if (dir == GPIO_LINE_DIRECTION_IN) 399 reg = AW9523_REG_IN_STATE(pin); 400 else 401 reg = AW9523_REG_OUT_STATE(pin); 402 403 return regmap_read(regmap, reg, state); 404 } 405 406 static int aw9523_gpio_irq_type(struct irq_data *d, unsigned int type) 407 { 408 switch (type) { 409 case IRQ_TYPE_NONE: 410 case IRQ_TYPE_EDGE_BOTH: 411 return 0; 412 default: 413 return -EINVAL; 414 }; 415 } 416 417 /* 418 * aw9523_irq_mask - Mask interrupt 419 * @d: irq data 420 * 421 * Sets which interrupt to mask in the bitmap; 422 * The interrupt will be masked when unlocking the irq bus. 423 */ 424 static void aw9523_irq_mask(struct irq_data *d) 425 { 426 struct aw9523 *awi = gpiochip_get_data(irq_data_get_irq_chip_data(d)); 427 irq_hw_number_t hwirq = irqd_to_hwirq(d); 428 unsigned int n = hwirq % AW9523_PINS_PER_PORT; 429 430 regmap_update_bits(awi->regmap, AW9523_REG_INTR_DIS(hwirq), 431 BIT(n), BIT(n)); 432 gpiochip_disable_irq(&awi->gpio, hwirq); 433 } 434 435 /* 436 * aw9523_irq_unmask - Unmask interrupt 437 * @d: irq data 438 * 439 * Sets which interrupt to unmask in the bitmap; 440 * The interrupt will be masked when unlocking the irq bus. 441 */ 442 static void aw9523_irq_unmask(struct irq_data *d) 443 { 444 struct aw9523 *awi = gpiochip_get_data(irq_data_get_irq_chip_data(d)); 445 irq_hw_number_t hwirq = irqd_to_hwirq(d); 446 unsigned int n = hwirq % AW9523_PINS_PER_PORT; 447 448 gpiochip_enable_irq(&awi->gpio, hwirq); 449 regmap_update_bits(awi->regmap, AW9523_REG_INTR_DIS(hwirq), 450 BIT(n), 0); 451 } 452 453 static irqreturn_t aw9523_irq_thread_func(int irq, void *dev_id) 454 { 455 struct aw9523 *awi = (struct aw9523 *)dev_id; 456 unsigned long n, val = 0; 457 unsigned long changed_gpio; 458 unsigned int tmp, port_pin, i, ret; 459 460 for (i = 0; i < AW9523_NUM_PORTS; i++) { 461 port_pin = i * AW9523_PINS_PER_PORT; 462 ret = regmap_read(awi->regmap, 463 AW9523_REG_IN_STATE(port_pin), 464 &tmp); 465 if (ret) 466 return ret; 467 val |= (u8)tmp << (i * 8); 468 } 469 470 /* Handle GPIO input release interrupt as well */ 471 changed_gpio = awi->irq->cached_gpio ^ val; 472 awi->irq->cached_gpio = val; 473 474 /* 475 * To avoid up to four *slow* i2c reads from any driver hooked 476 * up to our interrupts, just check for the irq_find_mapping 477 * result: if the interrupt is not mapped, then we don't want 478 * to care about it. 479 */ 480 for_each_set_bit(n, &changed_gpio, awi->gpio.ngpio) { 481 tmp = irq_find_mapping(awi->gpio.irq.domain, n); 482 if (tmp <= 0) 483 continue; 484 handle_nested_irq(tmp); 485 } 486 487 return IRQ_HANDLED; 488 } 489 490 /* 491 * aw9523_irq_bus_lock - Grab lock for interrupt operation 492 * @d: irq data 493 */ 494 static void aw9523_irq_bus_lock(struct irq_data *d) 495 { 496 struct aw9523 *awi = gpiochip_get_data(irq_data_get_irq_chip_data(d)); 497 498 mutex_lock(&awi->irq->lock); 499 regcache_cache_only(awi->regmap, true); 500 } 501 502 /* 503 * aw9523_irq_bus_sync_unlock - Synchronize state and unlock 504 * @d: irq data 505 * 506 * Writes the interrupt mask bits (found in the bit map) to the 507 * hardware, then unlocks the bus. 508 */ 509 static void aw9523_irq_bus_sync_unlock(struct irq_data *d) 510 { 511 struct aw9523 *awi = gpiochip_get_data(irq_data_get_irq_chip_data(d)); 512 513 regcache_cache_only(awi->regmap, false); 514 regcache_sync(awi->regmap); 515 mutex_unlock(&awi->irq->lock); 516 } 517 518 static int aw9523_gpio_get_direction(struct gpio_chip *chip, 519 unsigned int offset) 520 { 521 struct aw9523 *awi = gpiochip_get_data(chip); 522 u8 regbit = offset % AW9523_PINS_PER_PORT; 523 int ret; 524 525 mutex_lock(&awi->i2c_lock); 526 ret = aw9523_get_pin_direction(awi->regmap, offset, regbit); 527 mutex_unlock(&awi->i2c_lock); 528 529 return ret; 530 } 531 532 static int aw9523_gpio_get(struct gpio_chip *chip, unsigned int offset) 533 { 534 struct aw9523 *awi = gpiochip_get_data(chip); 535 u8 regbit = offset % AW9523_PINS_PER_PORT; 536 unsigned int val; 537 int ret; 538 539 mutex_lock(&awi->i2c_lock); 540 ret = aw9523_get_port_state(awi->regmap, offset, regbit, &val); 541 mutex_unlock(&awi->i2c_lock); 542 if (ret) 543 return ret; 544 545 return !!(val & BIT(regbit)); 546 } 547 548 /** 549 * _aw9523_gpio_get_multiple - Get I/O state for an entire port 550 * @awi: Controller data 551 * @regbit: hw pin index, used to retrieve port number 552 * @state: returned port I/O state 553 * @mask: lines to read values for 554 * 555 * Return: Zero for success or negative number for error 556 */ 557 static int _aw9523_gpio_get_multiple(struct aw9523 *awi, u8 regbit, 558 u8 *state, u8 mask) 559 { 560 u32 dir_in, val; 561 u8 m; 562 int ret; 563 564 /* Registers are 8-bits wide */ 565 ret = regmap_read(awi->regmap, AW9523_REG_CONF_STATE(regbit), &dir_in); 566 if (ret) 567 return ret; 568 *state = 0; 569 570 m = mask & dir_in; 571 if (m) { 572 ret = regmap_read(awi->regmap, AW9523_REG_IN_STATE(regbit), 573 &val); 574 if (ret) 575 return ret; 576 *state |= (u8)val & m; 577 } 578 579 m = mask & ~dir_in; 580 if (m) { 581 ret = regmap_read(awi->regmap, AW9523_REG_OUT_STATE(regbit), 582 &val); 583 if (ret) 584 return ret; 585 *state |= (u8)val & m; 586 } 587 588 return 0; 589 } 590 591 static int aw9523_gpio_get_multiple(struct gpio_chip *chip, 592 unsigned long *mask, 593 unsigned long *bits) 594 { 595 struct aw9523 *awi = gpiochip_get_data(chip); 596 u8 m, state = 0; 597 int ret; 598 599 guard(mutex)(&awi->i2c_lock); 600 601 /* Port 0 (gpio 0-7) */ 602 m = *mask; 603 if (m) { 604 ret = _aw9523_gpio_get_multiple(awi, 0, &state, m); 605 if (ret) 606 return ret; 607 } 608 *bits = state; 609 610 /* Port 1 (gpio 8-15) */ 611 m = *mask >> 8; 612 if (m) { 613 ret = _aw9523_gpio_get_multiple(awi, AW9523_PINS_PER_PORT, 614 &state, m); 615 if (ret) 616 return ret; 617 618 *bits |= (state << 8); 619 } 620 621 return 0; 622 } 623 624 static int aw9523_gpio_set_multiple(struct gpio_chip *chip, 625 unsigned long *mask, 626 unsigned long *bits) 627 { 628 struct aw9523 *awi = gpiochip_get_data(chip); 629 u8 mask_lo, mask_hi, bits_lo, bits_hi; 630 unsigned int reg; 631 int ret; 632 633 mask_lo = *mask; 634 mask_hi = *mask >> 8; 635 bits_lo = *bits; 636 bits_hi = *bits >> 8; 637 638 guard(mutex)(&awi->i2c_lock); 639 if (mask_hi) { 640 reg = AW9523_REG_OUT_STATE(AW9523_PINS_PER_PORT); 641 ret = regmap_write_bits(awi->regmap, reg, mask_hi, bits_hi); 642 if (ret) 643 return ret; 644 } 645 if (mask_lo) { 646 reg = AW9523_REG_OUT_STATE(0); 647 ret = regmap_write_bits(awi->regmap, reg, mask_lo, bits_lo); 648 if (ret) 649 return ret; 650 } 651 652 return 0; 653 } 654 655 static int aw9523_gpio_set(struct gpio_chip *chip, unsigned int offset, 656 int value) 657 { 658 struct aw9523 *awi = gpiochip_get_data(chip); 659 u8 regbit = offset % AW9523_PINS_PER_PORT; 660 int ret; 661 662 mutex_lock(&awi->i2c_lock); 663 ret = regmap_update_bits(awi->regmap, AW9523_REG_OUT_STATE(offset), 664 BIT(regbit), value ? BIT(regbit) : 0); 665 mutex_unlock(&awi->i2c_lock); 666 667 return ret; 668 } 669 670 671 static int aw9523_direction_input(struct gpio_chip *chip, unsigned int offset) 672 { 673 struct aw9523 *awi = gpiochip_get_data(chip); 674 u8 regbit = offset % AW9523_PINS_PER_PORT; 675 int ret; 676 677 mutex_lock(&awi->i2c_lock); 678 ret = regmap_update_bits(awi->regmap, AW9523_REG_CONF_STATE(offset), 679 BIT(regbit), BIT(regbit)); 680 mutex_unlock(&awi->i2c_lock); 681 682 return ret; 683 } 684 685 static int aw9523_direction_output(struct gpio_chip *chip, 686 unsigned int offset, int value) 687 { 688 struct aw9523 *awi = gpiochip_get_data(chip); 689 u8 regbit = offset % AW9523_PINS_PER_PORT; 690 int ret; 691 692 guard(mutex)(&awi->i2c_lock); 693 ret = regmap_update_bits(awi->regmap, AW9523_REG_OUT_STATE(offset), 694 BIT(regbit), value ? BIT(regbit) : 0); 695 if (ret) 696 return ret; 697 698 ret = regmap_update_bits(awi->regmap, AW9523_REG_CONF_STATE(offset), 699 BIT(regbit), 0); 700 701 return ret; 702 } 703 704 static int aw9523_drive_reset_gpio(struct aw9523 *awi) 705 { 706 unsigned int chip_id; 707 int ret; 708 709 /* 710 * If the chip is already configured for any reason, then we 711 * will probably succeed in sending the soft reset signal to 712 * the hardware through I2C: this operation takes less time 713 * compared to a full HW reset and it gives the same results. 714 */ 715 ret = regmap_write(awi->regmap, AW9523_REG_SOFT_RESET, 0); 716 if (ret == 0) 717 goto done; 718 719 dev_dbg(awi->dev, "Cannot execute soft reset: trying hard reset\n"); 720 ret = gpiod_direction_output(awi->reset_gpio, 0); 721 if (ret) 722 return ret; 723 724 /* The reset pulse has to be longer than 20uS due to deglitch */ 725 usleep_range(AW9523_HW_RESET_US, AW9523_HW_RESET_US + 1); 726 727 ret = gpiod_direction_output(awi->reset_gpio, 1); 728 if (ret) 729 return ret; 730 done: 731 /* The HW needs at least 1uS to reliably recover after reset */ 732 usleep_range(AW9523_HW_RESET_RECOVERY_US, 733 AW9523_HW_RESET_RECOVERY_US + 1); 734 735 /* Check the ChipID */ 736 ret = regmap_read(awi->regmap, AW9523_REG_CHIPID, &chip_id); 737 if (ret) { 738 dev_err(awi->dev, "Cannot read Chip ID: %d\n", ret); 739 return ret; 740 } 741 if (chip_id != AW9523_VAL_EXPECTED_CHIPID) { 742 dev_err(awi->dev, "Bad ChipID; read 0x%x, expected 0x%x\n", 743 chip_id, AW9523_VAL_EXPECTED_CHIPID); 744 return -EINVAL; 745 } 746 747 return 0; 748 } 749 750 static int aw9523_hw_reset(struct aw9523 *awi) 751 { 752 int ret, max_retries = 2; 753 754 /* Sometimes the chip needs more than one reset cycle */ 755 do { 756 ret = aw9523_drive_reset_gpio(awi); 757 if (ret == 0) 758 break; 759 max_retries--; 760 } while (max_retries); 761 762 return ret; 763 } 764 765 static int aw9523_init_gpiochip(struct aw9523 *awi, unsigned int npins) 766 { 767 struct device *dev = awi->dev; 768 struct gpio_chip *gc = &awi->gpio; 769 770 gc->label = devm_kstrdup(dev, dev_name(dev), GFP_KERNEL); 771 if (!gc->label) 772 return -ENOMEM; 773 774 gc->base = -1; 775 gc->ngpio = npins; 776 gc->get_direction = aw9523_gpio_get_direction; 777 gc->direction_input = aw9523_direction_input; 778 gc->direction_output = aw9523_direction_output; 779 gc->get = aw9523_gpio_get; 780 gc->get_multiple = aw9523_gpio_get_multiple; 781 gc->set = aw9523_gpio_set; 782 gc->set_multiple = aw9523_gpio_set_multiple; 783 gc->set_config = gpiochip_generic_config; 784 gc->parent = dev; 785 gc->owner = THIS_MODULE; 786 gc->can_sleep = true; 787 788 return 0; 789 } 790 791 static const struct irq_chip aw9523_irq_chip = { 792 .name = "aw9523", 793 .irq_mask = aw9523_irq_mask, 794 .irq_unmask = aw9523_irq_unmask, 795 .irq_bus_lock = aw9523_irq_bus_lock, 796 .irq_bus_sync_unlock = aw9523_irq_bus_sync_unlock, 797 .irq_set_type = aw9523_gpio_irq_type, 798 .flags = IRQCHIP_IMMUTABLE, 799 GPIOCHIP_IRQ_RESOURCE_HELPERS, 800 }; 801 802 static int aw9523_init_irq(struct aw9523 *awi, int irq) 803 { 804 struct device *dev = awi->dev; 805 struct gpio_irq_chip *girq; 806 int ret; 807 808 if (!device_property_read_bool(dev, "interrupt-controller")) 809 return 0; 810 811 awi->irq = devm_kzalloc(dev, sizeof(*awi->irq), GFP_KERNEL); 812 if (!awi->irq) 813 return -ENOMEM; 814 815 mutex_init(&awi->irq->lock); 816 817 ret = devm_request_threaded_irq(dev, irq, NULL, aw9523_irq_thread_func, 818 IRQF_ONESHOT, dev_name(dev), awi); 819 if (ret) 820 return dev_err_probe(dev, ret, "Failed to request irq %d\n", irq); 821 822 girq = &awi->gpio.irq; 823 gpio_irq_chip_set_chip(girq, &aw9523_irq_chip); 824 girq->parent_handler = NULL; 825 girq->num_parents = 0; 826 girq->parents = NULL; 827 girq->default_type = IRQ_TYPE_EDGE_BOTH; 828 girq->handler = handle_simple_irq; 829 girq->threaded = true; 830 831 return 0; 832 } 833 834 static bool aw9523_is_reg_hole(unsigned int reg) 835 { 836 return (reg > AW9523_REG_PORT_MODE(AW9523_PINS_PER_PORT) && 837 reg < AW9523_REG_SOFT_RESET) || 838 (reg > AW9523_REG_INTR_DIS(AW9523_PINS_PER_PORT) && 839 reg < AW9523_REG_CHIPID); 840 } 841 842 static bool aw9523_readable_reg(struct device *dev, unsigned int reg) 843 { 844 /* All available registers (minus holes) can be read */ 845 return !aw9523_is_reg_hole(reg); 846 } 847 848 static bool aw9523_volatile_reg(struct device *dev, unsigned int reg) 849 { 850 return aw9523_is_reg_hole(reg) || 851 reg == AW9523_REG_IN_STATE(0) || 852 reg == AW9523_REG_IN_STATE(AW9523_PINS_PER_PORT) || 853 reg == AW9523_REG_CHIPID || 854 reg == AW9523_REG_SOFT_RESET; 855 } 856 857 static bool aw9523_writeable_reg(struct device *dev, unsigned int reg) 858 { 859 return !aw9523_is_reg_hole(reg) && reg != AW9523_REG_CHIPID; 860 } 861 862 static bool aw9523_precious_reg(struct device *dev, unsigned int reg) 863 { 864 /* Reading AW9523_REG_IN_STATE clears interrupt status */ 865 return aw9523_is_reg_hole(reg) || 866 reg == AW9523_REG_IN_STATE(0) || 867 reg == AW9523_REG_IN_STATE(AW9523_PINS_PER_PORT); 868 } 869 870 static const struct regmap_config aw9523_regmap = { 871 .reg_bits = 8, 872 .val_bits = 8, 873 .reg_stride = 1, 874 875 .precious_reg = aw9523_precious_reg, 876 .readable_reg = aw9523_readable_reg, 877 .volatile_reg = aw9523_volatile_reg, 878 .writeable_reg = aw9523_writeable_reg, 879 880 .cache_type = REGCACHE_FLAT, 881 .disable_locking = true, 882 883 .num_reg_defaults_raw = AW9523_REG_SOFT_RESET, 884 }; 885 886 static int aw9523_hw_init(struct aw9523 *awi) 887 { 888 u8 p1_pin = AW9523_PINS_PER_PORT; 889 unsigned int val; 890 int ret; 891 892 /* No register caching during initialization */ 893 regcache_cache_bypass(awi->regmap, true); 894 895 /* Bring up the chip */ 896 ret = aw9523_hw_reset(awi); 897 if (ret) { 898 dev_err(awi->dev, "HW Reset failed: %d\n", ret); 899 return ret; 900 } 901 902 /* 903 * This is the expected chip and it is running: it's time to 904 * set a safe default configuration in case the user doesn't 905 * configure (all of the available) pins in this chip. 906 * P.S.: The writes order doesn't matter. 907 */ 908 909 /* Set all pins as GPIO */ 910 ret = regmap_write(awi->regmap, AW9523_REG_PORT_MODE(0), U8_MAX); 911 if (ret) 912 return ret; 913 ret = regmap_write(awi->regmap, AW9523_REG_PORT_MODE(p1_pin), U8_MAX); 914 if (ret) 915 return ret; 916 917 /* Set Open-Drain mode on Port 0 (Port 1 is always P-P) */ 918 ret = regmap_write(awi->regmap, AW9523_REG_GCR, 0); 919 if (ret) 920 return ret; 921 922 /* Set all pins as inputs */ 923 ret = regmap_write(awi->regmap, AW9523_REG_CONF_STATE(0), U8_MAX); 924 if (ret) 925 return ret; 926 ret = regmap_write(awi->regmap, AW9523_REG_CONF_STATE(p1_pin), U8_MAX); 927 if (ret) 928 return ret; 929 930 /* Disable all interrupts to avoid unreasoned wakeups */ 931 ret = regmap_write(awi->regmap, AW9523_REG_INTR_DIS(0), U8_MAX); 932 if (ret) 933 return ret; 934 ret = regmap_write(awi->regmap, AW9523_REG_INTR_DIS(p1_pin), U8_MAX); 935 if (ret) 936 return ret; 937 938 /* Clear setup-generated interrupts by performing a port state read */ 939 ret = aw9523_get_port_state(awi->regmap, 0, 0, &val); 940 if (ret) 941 return ret; 942 ret = aw9523_get_port_state(awi->regmap, p1_pin, 0, &val); 943 if (ret) 944 return ret; 945 946 /* Everything went fine: activate and reinitialize register cache */ 947 regcache_cache_bypass(awi->regmap, false); 948 return regmap_reinit_cache(awi->regmap, &aw9523_regmap); 949 } 950 951 static int aw9523_probe(struct i2c_client *client) 952 { 953 struct device *dev = &client->dev; 954 struct pinctrl_desc *pdesc; 955 struct aw9523 *awi; 956 int ret; 957 958 awi = devm_kzalloc(dev, sizeof(*awi), GFP_KERNEL); 959 if (!awi) 960 return -ENOMEM; 961 962 i2c_set_clientdata(client, awi); 963 964 awi->dev = dev; 965 awi->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); 966 if (IS_ERR(awi->reset_gpio)) 967 return PTR_ERR(awi->reset_gpio); 968 gpiod_set_consumer_name(awi->reset_gpio, "aw9523 reset"); 969 970 awi->regmap = devm_regmap_init_i2c(client, &aw9523_regmap); 971 if (IS_ERR(awi->regmap)) 972 return PTR_ERR(awi->regmap); 973 974 awi->vio_vreg = devm_regulator_get_enable_optional(dev, "vio"); 975 if (awi->vio_vreg && awi->vio_vreg != -ENODEV) 976 return awi->vio_vreg; 977 978 ret = devm_mutex_init(dev, &awi->i2c_lock); 979 if (ret) 980 return ret; 981 982 lockdep_set_subclass(&awi->i2c_lock, i2c_adapter_depth(client->adapter)); 983 984 pdesc = devm_kzalloc(dev, sizeof(*pdesc), GFP_KERNEL); 985 if (!pdesc) 986 return -ENOMEM; 987 988 ret = aw9523_hw_init(awi); 989 if (ret) 990 return ret; 991 992 pdesc->name = dev_name(dev); 993 pdesc->owner = THIS_MODULE; 994 pdesc->pctlops = &aw9523_pinctrl_ops; 995 pdesc->pmxops = &aw9523_pinmux_ops; 996 pdesc->confops = &aw9523_pinconf_ops; 997 pdesc->pins = aw9523_pins; 998 pdesc->npins = ARRAY_SIZE(aw9523_pins); 999 1000 ret = aw9523_init_gpiochip(awi, pdesc->npins); 1001 if (ret) 1002 return ret; 1003 1004 if (client->irq) { 1005 ret = aw9523_init_irq(awi, client->irq); 1006 if (ret) 1007 return ret; 1008 } 1009 1010 awi->pctl = devm_pinctrl_register(dev, pdesc, awi); 1011 if (IS_ERR(awi->pctl)) 1012 return dev_err_probe(dev, PTR_ERR(awi->pctl), 1013 "Cannot register pinctrl"); 1014 1015 return devm_gpiochip_add_data(dev, &awi->gpio, awi); 1016 } 1017 1018 static void aw9523_remove(struct i2c_client *client) 1019 { 1020 struct aw9523 *awi = i2c_get_clientdata(client); 1021 1022 /* 1023 * If the chip VIO is connected to a regulator that we can turn 1024 * off, life is easy... otherwise, reinitialize the chip and 1025 * set the pins to hardware defaults before removing the driver 1026 * to leave it in a clean, safe and predictable state. 1027 */ 1028 if (awi->vio_vreg == -ENODEV) { 1029 mutex_lock(&awi->i2c_lock); 1030 aw9523_hw_init(awi); 1031 mutex_unlock(&awi->i2c_lock); 1032 } 1033 } 1034 1035 static const struct i2c_device_id aw9523_i2c_id_table[] = { 1036 { "aw9523_i2c" }, 1037 { } 1038 }; 1039 MODULE_DEVICE_TABLE(i2c, aw9523_i2c_id_table); 1040 1041 static const struct of_device_id of_aw9523_i2c_match[] = { 1042 { .compatible = "awinic,aw9523-pinctrl", }, 1043 { } 1044 }; 1045 MODULE_DEVICE_TABLE(of, of_aw9523_i2c_match); 1046 1047 static struct i2c_driver aw9523_driver = { 1048 .driver = { 1049 .name = "aw9523-pinctrl", 1050 .of_match_table = of_aw9523_i2c_match, 1051 }, 1052 .probe = aw9523_probe, 1053 .remove = aw9523_remove, 1054 .id_table = aw9523_i2c_id_table, 1055 }; 1056 module_i2c_driver(aw9523_driver); 1057 1058 MODULE_DESCRIPTION("Awinic AW9523 I2C GPIO Expander driver"); 1059 MODULE_AUTHOR("AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>"); 1060 MODULE_LICENSE("GPL v2"); 1061