1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Awinic AW9523B i2c pin controller driver 4 * Copyright (c) 2020, AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> 5 */ 6 7 #include <linux/bitfield.h> 8 #include <linux/errno.h> 9 #include <linux/gpio/consumer.h> 10 #include <linux/gpio/driver.h> 11 #include <linux/i2c.h> 12 #include <linux/init.h> 13 #include <linux/interrupt.h> 14 #include <linux/irq.h> 15 #include <linux/module.h> 16 #include <linux/mutex.h> 17 #include <linux/property.h> 18 #include <linux/regmap.h> 19 #include <linux/regulator/consumer.h> 20 #include <linux/slab.h> 21 22 #include <linux/pinctrl/pinconf-generic.h> 23 #include <linux/pinctrl/pinconf.h> 24 #include <linux/pinctrl/pinctrl.h> 25 #include <linux/pinctrl/pinmux.h> 26 27 #define AW9523_MAX_FUNCS 2 28 #define AW9523_NUM_PORTS 2 29 #define AW9523_PINS_PER_PORT 8 30 31 /* 32 * HW needs at least 20uS for reset and at least 1-2uS to recover from 33 * reset, but we have to account for eventual board quirks, if any: 34 * for this reason, keep reset asserted for 50uS and wait for 20uS 35 * to recover from the reset. 36 */ 37 #define AW9523_HW_RESET_US 50 38 #define AW9523_HW_RESET_RECOVERY_US 20 39 40 /* Port 0: P0_0...P0_7 - Port 1: P1_0...P1_7 */ 41 #define AW9523_PIN_TO_PORT(pin) (pin >> 3) 42 #define AW9523_REG_IN_STATE(pin) (0x00 + AW9523_PIN_TO_PORT(pin)) 43 #define AW9523_REG_OUT_STATE(pin) (0x02 + AW9523_PIN_TO_PORT(pin)) 44 #define AW9523_REG_CONF_STATE(pin) (0x04 + AW9523_PIN_TO_PORT(pin)) 45 #define AW9523_REG_INTR_DIS(pin) (0x06 + AW9523_PIN_TO_PORT(pin)) 46 #define AW9523_REG_CHIPID 0x10 47 #define AW9523_VAL_EXPECTED_CHIPID 0x23 48 49 #define AW9523_REG_GCR 0x11 50 #define AW9523_GCR_ISEL_MASK GENMASK(0, 1) 51 #define AW9523_GCR_GPOMD_MASK BIT(4) 52 53 #define AW9523_REG_PORT_MODE(pin) (0x12 + AW9523_PIN_TO_PORT(pin)) 54 #define AW9523_REG_SOFT_RESET 0x7f 55 #define AW9523_VAL_RESET 0x00 56 57 /* 58 * struct aw9523_irq - Interrupt controller structure 59 * @lock: mutex locking for the irq bus 60 * @cached_gpio: stores the previous gpio status for bit comparison 61 */ 62 struct aw9523_irq { 63 struct mutex lock; 64 u16 cached_gpio; 65 }; 66 67 /* 68 * struct aw9523 - Main driver structure 69 * @dev: device handle 70 * @regmap: regmap handle for current device 71 * @i2c_lock: Mutex lock for i2c operations 72 * @reset_gpio: Hardware reset (RSTN) signal GPIO 73 * @vio_vreg: VCC regulator (Optional) 74 * @pctl: pinctrl handle for current device 75 * @gpio: structure holding gpiochip params 76 * @irq: Interrupt controller structure 77 */ 78 struct aw9523 { 79 struct device *dev; 80 struct regmap *regmap; 81 struct mutex i2c_lock; 82 struct gpio_desc *reset_gpio; 83 struct regulator *vio_vreg; 84 struct pinctrl_dev *pctl; 85 struct gpio_chip gpio; 86 struct aw9523_irq *irq; 87 }; 88 89 static const struct pinctrl_pin_desc aw9523_pins[] = { 90 /* Port 0 */ 91 PINCTRL_PIN(0, "gpio0"), 92 PINCTRL_PIN(1, "gpio1"), 93 PINCTRL_PIN(2, "gpio2"), 94 PINCTRL_PIN(3, "gpio3"), 95 PINCTRL_PIN(4, "gpio4"), 96 PINCTRL_PIN(5, "gpio5"), 97 PINCTRL_PIN(6, "gpio6"), 98 PINCTRL_PIN(7, "gpio7"), 99 100 /* Port 1 */ 101 PINCTRL_PIN(8, "gpio8"), 102 PINCTRL_PIN(9, "gpio9"), 103 PINCTRL_PIN(10, "gpio10"), 104 PINCTRL_PIN(11, "gpio11"), 105 PINCTRL_PIN(12, "gpio12"), 106 PINCTRL_PIN(13, "gpio13"), 107 PINCTRL_PIN(14, "gpio14"), 108 PINCTRL_PIN(15, "gpio15"), 109 }; 110 111 static int aw9523_pinctrl_get_groups_count(struct pinctrl_dev *pctldev) 112 { 113 return ARRAY_SIZE(aw9523_pins); 114 } 115 116 static const char *aw9523_pinctrl_get_group_name(struct pinctrl_dev *pctldev, 117 unsigned int selector) 118 { 119 return aw9523_pins[selector].name; 120 } 121 122 static int aw9523_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, 123 unsigned int selector, 124 const unsigned int **pins, 125 unsigned int *num_pins) 126 { 127 *pins = &aw9523_pins[selector].number; 128 *num_pins = 1; 129 return 0; 130 } 131 132 static const struct pinctrl_ops aw9523_pinctrl_ops = { 133 .get_groups_count = aw9523_pinctrl_get_groups_count, 134 .get_group_pins = aw9523_pinctrl_get_group_pins, 135 .get_group_name = aw9523_pinctrl_get_group_name, 136 .dt_node_to_map = pinconf_generic_dt_node_to_map_pin, 137 .dt_free_map = pinconf_generic_dt_free_map, 138 }; 139 140 static const char * const gpio_pwm_groups[] = { 141 "gpio0", "gpio1", "gpio2", "gpio3", /* 0-3 */ 142 "gpio4", "gpio5", "gpio6", "gpio7", /* 4-7 */ 143 "gpio8", "gpio9", "gpio10", "gpio11", /* 8-11 */ 144 "gpio12", "gpio13", "gpio14", "gpio15", /* 11-15 */ 145 }; 146 147 /* Warning: Do NOT reorder this array */ 148 static const struct pinfunction aw9523_pmx[] = { 149 PINCTRL_PINFUNCTION("pwm", gpio_pwm_groups, ARRAY_SIZE(gpio_pwm_groups)), 150 PINCTRL_PINFUNCTION("gpio", gpio_pwm_groups, ARRAY_SIZE(gpio_pwm_groups)), 151 }; 152 153 static int aw9523_pmx_get_funcs_count(struct pinctrl_dev *pctl) 154 { 155 return ARRAY_SIZE(aw9523_pmx); 156 } 157 158 static const char *aw9523_pmx_get_fname(struct pinctrl_dev *pctl, 159 unsigned int sel) 160 { 161 return aw9523_pmx[sel].name; 162 } 163 164 static int aw9523_pmx_get_groups(struct pinctrl_dev *pctl, unsigned int sel, 165 const char * const **groups, 166 unsigned int * const ngroups) 167 { 168 *groups = aw9523_pmx[sel].groups; 169 *ngroups = aw9523_pmx[sel].ngroups; 170 return 0; 171 } 172 173 static int aw9523_pmx_set_mux(struct pinctrl_dev *pctl, unsigned int fsel, 174 unsigned int grp) 175 { 176 struct aw9523 *awi = pinctrl_dev_get_drvdata(pctl); 177 int ret, pin = aw9523_pins[grp].number % AW9523_PINS_PER_PORT; 178 179 if (fsel >= ARRAY_SIZE(aw9523_pmx)) 180 return -EINVAL; 181 182 /* 183 * This maps directly to the aw9523_pmx array: programming a 184 * high bit means "gpio" and a low bit means "pwm". 185 */ 186 mutex_lock(&awi->i2c_lock); 187 ret = regmap_update_bits(awi->regmap, AW9523_REG_PORT_MODE(pin), 188 BIT(pin), (fsel ? BIT(pin) : 0)); 189 mutex_unlock(&awi->i2c_lock); 190 return ret; 191 } 192 193 static const struct pinmux_ops aw9523_pinmux_ops = { 194 .get_functions_count = aw9523_pmx_get_funcs_count, 195 .get_function_name = aw9523_pmx_get_fname, 196 .get_function_groups = aw9523_pmx_get_groups, 197 .set_mux = aw9523_pmx_set_mux, 198 }; 199 200 static int aw9523_pcfg_param_to_reg(enum pin_config_param pcp, int pin, u8 *r) 201 { 202 u8 reg; 203 204 switch (pcp) { 205 case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT: 206 case PIN_CONFIG_BIAS_PULL_DOWN: 207 case PIN_CONFIG_BIAS_PULL_UP: 208 reg = AW9523_REG_IN_STATE(pin); 209 break; 210 case PIN_CONFIG_DRIVE_OPEN_DRAIN: 211 case PIN_CONFIG_DRIVE_PUSH_PULL: 212 reg = AW9523_REG_GCR; 213 break; 214 case PIN_CONFIG_INPUT_ENABLE: 215 case PIN_CONFIG_OUTPUT_ENABLE: 216 reg = AW9523_REG_CONF_STATE(pin); 217 break; 218 case PIN_CONFIG_OUTPUT: 219 reg = AW9523_REG_OUT_STATE(pin); 220 break; 221 default: 222 return -ENOTSUPP; 223 } 224 *r = reg; 225 226 return 0; 227 } 228 229 static int aw9523_pconf_get(struct pinctrl_dev *pctldev, unsigned int pin, 230 unsigned long *config) 231 { 232 struct aw9523 *awi = pinctrl_dev_get_drvdata(pctldev); 233 enum pin_config_param param = pinconf_to_config_param(*config); 234 int regbit = pin % AW9523_PINS_PER_PORT; 235 unsigned int val; 236 u8 reg; 237 int rc; 238 239 rc = aw9523_pcfg_param_to_reg(param, pin, ®); 240 if (rc) 241 return rc; 242 243 mutex_lock(&awi->i2c_lock); 244 rc = regmap_read(awi->regmap, reg, &val); 245 mutex_unlock(&awi->i2c_lock); 246 if (rc) 247 return rc; 248 249 switch (param) { 250 case PIN_CONFIG_BIAS_PULL_UP: 251 case PIN_CONFIG_INPUT_ENABLE: 252 case PIN_CONFIG_OUTPUT: 253 val &= BIT(regbit); 254 break; 255 case PIN_CONFIG_BIAS_PULL_DOWN: 256 case PIN_CONFIG_OUTPUT_ENABLE: 257 val &= BIT(regbit); 258 val = !val; 259 break; 260 case PIN_CONFIG_DRIVE_OPEN_DRAIN: 261 if (pin >= AW9523_PINS_PER_PORT) 262 val = 0; 263 else 264 val = !FIELD_GET(AW9523_GCR_GPOMD_MASK, val); 265 break; 266 case PIN_CONFIG_DRIVE_PUSH_PULL: 267 if (pin >= AW9523_PINS_PER_PORT) 268 val = 1; 269 else 270 val = FIELD_GET(AW9523_GCR_GPOMD_MASK, val); 271 break; 272 default: 273 return -ENOTSUPP; 274 } 275 if (val < 1) 276 return -EINVAL; 277 278 *config = pinconf_to_config_packed(param, !!val); 279 280 return rc; 281 } 282 283 static int aw9523_pconf_set(struct pinctrl_dev *pctldev, unsigned int pin, 284 unsigned long *configs, unsigned int num_configs) 285 { 286 struct aw9523 *awi = pinctrl_dev_get_drvdata(pctldev); 287 enum pin_config_param param; 288 int regbit = pin % AW9523_PINS_PER_PORT; 289 u32 arg; 290 u8 reg; 291 unsigned int mask, val; 292 int i, rc; 293 294 mutex_lock(&awi->i2c_lock); 295 for (i = 0; i < num_configs; i++) { 296 param = pinconf_to_config_param(configs[i]); 297 arg = pinconf_to_config_argument(configs[i]); 298 299 rc = aw9523_pcfg_param_to_reg(param, pin, ®); 300 if (rc) 301 goto end; 302 303 switch (param) { 304 case PIN_CONFIG_OUTPUT: 305 /* First, enable pin output */ 306 rc = regmap_update_bits(awi->regmap, 307 AW9523_REG_CONF_STATE(pin), 308 BIT(regbit), 0); 309 if (rc) 310 goto end; 311 312 /* Then, fall through to config output level */ 313 fallthrough; 314 case PIN_CONFIG_OUTPUT_ENABLE: 315 arg = !arg; 316 fallthrough; 317 case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT: 318 case PIN_CONFIG_BIAS_PULL_DOWN: 319 case PIN_CONFIG_BIAS_PULL_UP: 320 case PIN_CONFIG_INPUT_ENABLE: 321 mask = BIT(regbit); 322 val = arg ? BIT(regbit) : 0; 323 break; 324 case PIN_CONFIG_DRIVE_OPEN_DRAIN: 325 /* Open-Drain is supported only on port 0 */ 326 if (pin >= AW9523_PINS_PER_PORT) { 327 rc = -ENOTSUPP; 328 goto end; 329 } 330 mask = AW9523_GCR_GPOMD_MASK; 331 val = 0; 332 break; 333 case PIN_CONFIG_DRIVE_PUSH_PULL: 334 /* Port 1 is always Push-Pull */ 335 if (pin >= AW9523_PINS_PER_PORT) { 336 mask = 0; 337 val = 0; 338 continue; 339 } 340 mask = AW9523_GCR_GPOMD_MASK; 341 val = AW9523_GCR_GPOMD_MASK; 342 break; 343 default: 344 rc = -ENOTSUPP; 345 goto end; 346 } 347 348 rc = regmap_update_bits(awi->regmap, reg, mask, val); 349 if (rc) 350 goto end; 351 } 352 end: 353 mutex_unlock(&awi->i2c_lock); 354 return rc; 355 } 356 357 static const struct pinconf_ops aw9523_pinconf_ops = { 358 .pin_config_get = aw9523_pconf_get, 359 .pin_config_set = aw9523_pconf_set, 360 .is_generic = true, 361 }; 362 363 /* 364 * aw9523_get_pin_direction - Get pin direction 365 * @regmap: Regmap structure 366 * @pin: gpiolib pin number 367 * @n: pin index in port register 368 * 369 * Return: Pin direction for success or negative number for error 370 */ 371 static int aw9523_get_pin_direction(struct regmap *regmap, u8 pin, u8 n) 372 { 373 int ret; 374 375 ret = regmap_test_bits(regmap, AW9523_REG_CONF_STATE(pin), BIT(n)); 376 if (ret < 0) 377 return ret; 378 379 return ret ? GPIO_LINE_DIRECTION_IN : GPIO_LINE_DIRECTION_OUT; 380 } 381 382 /* 383 * aw9523_get_port_state - Get input or output state for entire port 384 * @regmap: Regmap structure 385 * @pin: gpiolib pin number 386 * @regbit: hw pin index, used to retrieve port number 387 * @state: returned port state 388 * 389 * Return: Zero for success or negative number for error 390 */ 391 static int aw9523_get_port_state(struct regmap *regmap, u8 pin, u8 regbit, 392 unsigned int *state) 393 { 394 u8 reg; 395 int dir; 396 397 dir = aw9523_get_pin_direction(regmap, pin, regbit); 398 if (dir < 0) 399 return dir; 400 401 if (dir == GPIO_LINE_DIRECTION_IN) 402 reg = AW9523_REG_IN_STATE(pin); 403 else 404 reg = AW9523_REG_OUT_STATE(pin); 405 406 return regmap_read(regmap, reg, state); 407 } 408 409 static int aw9523_gpio_irq_type(struct irq_data *d, unsigned int type) 410 { 411 switch (type) { 412 case IRQ_TYPE_NONE: 413 case IRQ_TYPE_EDGE_BOTH: 414 return 0; 415 default: 416 return -EINVAL; 417 }; 418 } 419 420 /* 421 * aw9523_irq_mask - Mask interrupt 422 * @d: irq data 423 * 424 * Sets which interrupt to mask in the bitmap; 425 * The interrupt will be masked when unlocking the irq bus. 426 */ 427 static void aw9523_irq_mask(struct irq_data *d) 428 { 429 struct aw9523 *awi = gpiochip_get_data(irq_data_get_irq_chip_data(d)); 430 irq_hw_number_t hwirq = irqd_to_hwirq(d); 431 unsigned int n = hwirq % AW9523_PINS_PER_PORT; 432 433 regmap_update_bits(awi->regmap, AW9523_REG_INTR_DIS(hwirq), 434 BIT(n), BIT(n)); 435 gpiochip_disable_irq(&awi->gpio, hwirq); 436 } 437 438 /* 439 * aw9523_irq_unmask - Unmask interrupt 440 * @d: irq data 441 * 442 * Sets which interrupt to unmask in the bitmap; 443 * The interrupt will be masked when unlocking the irq bus. 444 */ 445 static void aw9523_irq_unmask(struct irq_data *d) 446 { 447 struct aw9523 *awi = gpiochip_get_data(irq_data_get_irq_chip_data(d)); 448 irq_hw_number_t hwirq = irqd_to_hwirq(d); 449 unsigned int n = hwirq % AW9523_PINS_PER_PORT; 450 451 gpiochip_enable_irq(&awi->gpio, hwirq); 452 regmap_update_bits(awi->regmap, AW9523_REG_INTR_DIS(hwirq), 453 BIT(n), 0); 454 } 455 456 static irqreturn_t aw9523_irq_thread_func(int irq, void *dev_id) 457 { 458 struct aw9523 *awi = (struct aw9523 *)dev_id; 459 unsigned long n, val = 0; 460 unsigned long changed_gpio; 461 unsigned int tmp, port_pin, i, ret; 462 463 for (i = 0; i < AW9523_NUM_PORTS; i++) { 464 port_pin = i * AW9523_PINS_PER_PORT; 465 ret = regmap_read(awi->regmap, 466 AW9523_REG_IN_STATE(port_pin), 467 &tmp); 468 if (ret) 469 return ret; 470 val |= (u8)tmp << (i * 8); 471 } 472 473 /* Handle GPIO input release interrupt as well */ 474 changed_gpio = awi->irq->cached_gpio ^ val; 475 awi->irq->cached_gpio = val; 476 477 /* 478 * To avoid up to four *slow* i2c reads from any driver hooked 479 * up to our interrupts, just check for the irq_find_mapping 480 * result: if the interrupt is not mapped, then we don't want 481 * to care about it. 482 */ 483 for_each_set_bit(n, &changed_gpio, awi->gpio.ngpio) { 484 tmp = irq_find_mapping(awi->gpio.irq.domain, n); 485 if (tmp <= 0) 486 continue; 487 handle_nested_irq(tmp); 488 } 489 490 return IRQ_HANDLED; 491 } 492 493 /* 494 * aw9523_irq_bus_lock - Grab lock for interrupt operation 495 * @d: irq data 496 */ 497 static void aw9523_irq_bus_lock(struct irq_data *d) 498 { 499 struct aw9523 *awi = gpiochip_get_data(irq_data_get_irq_chip_data(d)); 500 501 mutex_lock(&awi->irq->lock); 502 regcache_cache_only(awi->regmap, true); 503 } 504 505 /* 506 * aw9523_irq_bus_sync_unlock - Synchronize state and unlock 507 * @d: irq data 508 * 509 * Writes the interrupt mask bits (found in the bit map) to the 510 * hardware, then unlocks the bus. 511 */ 512 static void aw9523_irq_bus_sync_unlock(struct irq_data *d) 513 { 514 struct aw9523 *awi = gpiochip_get_data(irq_data_get_irq_chip_data(d)); 515 516 regcache_cache_only(awi->regmap, false); 517 regcache_sync(awi->regmap); 518 mutex_unlock(&awi->irq->lock); 519 } 520 521 static int aw9523_gpio_get_direction(struct gpio_chip *chip, 522 unsigned int offset) 523 { 524 struct aw9523 *awi = gpiochip_get_data(chip); 525 u8 regbit = offset % AW9523_PINS_PER_PORT; 526 int ret; 527 528 mutex_lock(&awi->i2c_lock); 529 ret = aw9523_get_pin_direction(awi->regmap, offset, regbit); 530 mutex_unlock(&awi->i2c_lock); 531 532 return ret; 533 } 534 535 static int aw9523_gpio_get(struct gpio_chip *chip, unsigned int offset) 536 { 537 struct aw9523 *awi = gpiochip_get_data(chip); 538 u8 regbit = offset % AW9523_PINS_PER_PORT; 539 unsigned int val; 540 int ret; 541 542 mutex_lock(&awi->i2c_lock); 543 ret = aw9523_get_port_state(awi->regmap, offset, regbit, &val); 544 mutex_unlock(&awi->i2c_lock); 545 if (ret) 546 return ret; 547 548 return !!(val & BIT(regbit)); 549 } 550 551 /** 552 * _aw9523_gpio_get_multiple - Get I/O state for an entire port 553 * @regmap: Regmap structure 554 * @pin: gpiolib pin number 555 * @regbit: hw pin index, used to retrieve port number 556 * @state: returned port I/O state 557 * 558 * Return: Zero for success or negative number for error 559 */ 560 static int _aw9523_gpio_get_multiple(struct aw9523 *awi, u8 regbit, 561 u8 *state, u8 mask) 562 { 563 u32 dir_in, val; 564 u8 m; 565 int ret; 566 567 /* Registers are 8-bits wide */ 568 ret = regmap_read(awi->regmap, AW9523_REG_CONF_STATE(regbit), &dir_in); 569 if (ret) 570 return ret; 571 *state = 0; 572 573 m = mask & dir_in; 574 if (m) { 575 ret = regmap_read(awi->regmap, AW9523_REG_IN_STATE(regbit), 576 &val); 577 if (ret) 578 return ret; 579 *state |= (u8)val & m; 580 } 581 582 m = mask & ~dir_in; 583 if (m) { 584 ret = regmap_read(awi->regmap, AW9523_REG_OUT_STATE(regbit), 585 &val); 586 if (ret) 587 return ret; 588 *state |= (u8)val & m; 589 } 590 591 return 0; 592 } 593 594 static int aw9523_gpio_get_multiple(struct gpio_chip *chip, 595 unsigned long *mask, 596 unsigned long *bits) 597 { 598 struct aw9523 *awi = gpiochip_get_data(chip); 599 u8 m, state = 0; 600 int ret; 601 602 mutex_lock(&awi->i2c_lock); 603 604 /* Port 0 (gpio 0-7) */ 605 m = *mask; 606 if (m) { 607 ret = _aw9523_gpio_get_multiple(awi, 0, &state, m); 608 if (ret) 609 goto out; 610 } 611 *bits = state; 612 613 /* Port 1 (gpio 8-15) */ 614 m = *mask >> 8; 615 if (m) { 616 ret = _aw9523_gpio_get_multiple(awi, AW9523_PINS_PER_PORT, 617 &state, m); 618 if (ret) 619 goto out; 620 621 *bits |= (state << 8); 622 } 623 out: 624 mutex_unlock(&awi->i2c_lock); 625 return ret; 626 } 627 628 static void aw9523_gpio_set_multiple(struct gpio_chip *chip, 629 unsigned long *mask, 630 unsigned long *bits) 631 { 632 struct aw9523 *awi = gpiochip_get_data(chip); 633 u8 mask_lo, mask_hi, bits_lo, bits_hi; 634 unsigned int reg; 635 int ret; 636 637 mask_lo = *mask; 638 mask_hi = *mask >> 8; 639 bits_lo = *bits; 640 bits_hi = *bits >> 8; 641 642 mutex_lock(&awi->i2c_lock); 643 if (mask_hi) { 644 reg = AW9523_REG_OUT_STATE(AW9523_PINS_PER_PORT); 645 ret = regmap_write_bits(awi->regmap, reg, mask_hi, bits_hi); 646 if (ret) 647 dev_warn(awi->dev, "Cannot write port1 out level\n"); 648 } 649 if (mask_lo) { 650 reg = AW9523_REG_OUT_STATE(0); 651 ret = regmap_write_bits(awi->regmap, reg, mask_lo, bits_lo); 652 if (ret) 653 dev_warn(awi->dev, "Cannot write port0 out level\n"); 654 } 655 mutex_unlock(&awi->i2c_lock); 656 } 657 658 static void aw9523_gpio_set(struct gpio_chip *chip, 659 unsigned int offset, int value) 660 { 661 struct aw9523 *awi = gpiochip_get_data(chip); 662 u8 regbit = offset % AW9523_PINS_PER_PORT; 663 664 mutex_lock(&awi->i2c_lock); 665 regmap_update_bits(awi->regmap, AW9523_REG_OUT_STATE(offset), 666 BIT(regbit), value ? BIT(regbit) : 0); 667 mutex_unlock(&awi->i2c_lock); 668 } 669 670 671 static int aw9523_direction_input(struct gpio_chip *chip, unsigned int offset) 672 { 673 struct aw9523 *awi = gpiochip_get_data(chip); 674 u8 regbit = offset % AW9523_PINS_PER_PORT; 675 int ret; 676 677 mutex_lock(&awi->i2c_lock); 678 ret = regmap_update_bits(awi->regmap, AW9523_REG_CONF_STATE(offset), 679 BIT(regbit), BIT(regbit)); 680 mutex_unlock(&awi->i2c_lock); 681 682 return ret; 683 } 684 685 static int aw9523_direction_output(struct gpio_chip *chip, 686 unsigned int offset, int value) 687 { 688 struct aw9523 *awi = gpiochip_get_data(chip); 689 u8 regbit = offset % AW9523_PINS_PER_PORT; 690 int ret; 691 692 mutex_lock(&awi->i2c_lock); 693 ret = regmap_update_bits(awi->regmap, AW9523_REG_OUT_STATE(offset), 694 BIT(regbit), value ? BIT(regbit) : 0); 695 if (ret) 696 goto end; 697 698 ret = regmap_update_bits(awi->regmap, AW9523_REG_CONF_STATE(offset), 699 BIT(regbit), 0); 700 end: 701 mutex_unlock(&awi->i2c_lock); 702 return ret; 703 } 704 705 static int aw9523_drive_reset_gpio(struct aw9523 *awi) 706 { 707 unsigned int chip_id; 708 int ret; 709 710 /* 711 * If the chip is already configured for any reason, then we 712 * will probably succeed in sending the soft reset signal to 713 * the hardware through I2C: this operation takes less time 714 * compared to a full HW reset and it gives the same results. 715 */ 716 ret = regmap_write(awi->regmap, AW9523_REG_SOFT_RESET, 0); 717 if (ret == 0) 718 goto done; 719 720 dev_dbg(awi->dev, "Cannot execute soft reset: trying hard reset\n"); 721 ret = gpiod_direction_output(awi->reset_gpio, 0); 722 if (ret) 723 return ret; 724 725 /* The reset pulse has to be longer than 20uS due to deglitch */ 726 usleep_range(AW9523_HW_RESET_US, AW9523_HW_RESET_US + 1); 727 728 ret = gpiod_direction_output(awi->reset_gpio, 1); 729 if (ret) 730 return ret; 731 done: 732 /* The HW needs at least 1uS to reliably recover after reset */ 733 usleep_range(AW9523_HW_RESET_RECOVERY_US, 734 AW9523_HW_RESET_RECOVERY_US + 1); 735 736 /* Check the ChipID */ 737 ret = regmap_read(awi->regmap, AW9523_REG_CHIPID, &chip_id); 738 if (ret) { 739 dev_err(awi->dev, "Cannot read Chip ID: %d\n", ret); 740 return ret; 741 } 742 if (chip_id != AW9523_VAL_EXPECTED_CHIPID) { 743 dev_err(awi->dev, "Bad ChipID; read 0x%x, expected 0x%x\n", 744 chip_id, AW9523_VAL_EXPECTED_CHIPID); 745 return -EINVAL; 746 } 747 748 return 0; 749 } 750 751 static int aw9523_hw_reset(struct aw9523 *awi) 752 { 753 int ret, max_retries = 2; 754 755 /* Sometimes the chip needs more than one reset cycle */ 756 do { 757 ret = aw9523_drive_reset_gpio(awi); 758 if (ret == 0) 759 break; 760 max_retries--; 761 } while (max_retries); 762 763 return ret; 764 } 765 766 static int aw9523_init_gpiochip(struct aw9523 *awi, unsigned int npins) 767 { 768 struct device *dev = awi->dev; 769 struct gpio_chip *gc = &awi->gpio; 770 771 gc->label = devm_kstrdup(dev, dev_name(dev), GFP_KERNEL); 772 if (!gc->label) 773 return -ENOMEM; 774 775 gc->base = -1; 776 gc->ngpio = npins; 777 gc->get_direction = aw9523_gpio_get_direction; 778 gc->direction_input = aw9523_direction_input; 779 gc->direction_output = aw9523_direction_output; 780 gc->get = aw9523_gpio_get; 781 gc->get_multiple = aw9523_gpio_get_multiple; 782 gc->set = aw9523_gpio_set; 783 gc->set_multiple = aw9523_gpio_set_multiple; 784 gc->set_config = gpiochip_generic_config; 785 gc->parent = dev; 786 gc->owner = THIS_MODULE; 787 gc->can_sleep = false; 788 789 return 0; 790 } 791 792 static const struct irq_chip aw9523_irq_chip = { 793 .name = "aw9523", 794 .irq_mask = aw9523_irq_mask, 795 .irq_unmask = aw9523_irq_unmask, 796 .irq_bus_lock = aw9523_irq_bus_lock, 797 .irq_bus_sync_unlock = aw9523_irq_bus_sync_unlock, 798 .irq_set_type = aw9523_gpio_irq_type, 799 .flags = IRQCHIP_IMMUTABLE, 800 GPIOCHIP_IRQ_RESOURCE_HELPERS, 801 }; 802 803 static int aw9523_init_irq(struct aw9523 *awi, int irq) 804 { 805 struct device *dev = awi->dev; 806 struct gpio_irq_chip *girq; 807 int ret; 808 809 if (!device_property_read_bool(dev, "interrupt-controller")) 810 return 0; 811 812 awi->irq = devm_kzalloc(dev, sizeof(*awi->irq), GFP_KERNEL); 813 if (!awi->irq) 814 return -ENOMEM; 815 816 mutex_init(&awi->irq->lock); 817 818 ret = devm_request_threaded_irq(dev, irq, NULL, aw9523_irq_thread_func, 819 IRQF_ONESHOT, dev_name(dev), awi); 820 if (ret) 821 return dev_err_probe(dev, ret, "Failed to request irq %d\n", irq); 822 823 girq = &awi->gpio.irq; 824 gpio_irq_chip_set_chip(girq, &aw9523_irq_chip); 825 girq->parent_handler = NULL; 826 girq->num_parents = 0; 827 girq->parents = NULL; 828 girq->default_type = IRQ_TYPE_EDGE_BOTH; 829 girq->handler = handle_simple_irq; 830 girq->threaded = true; 831 832 return 0; 833 } 834 835 static bool aw9523_is_reg_hole(unsigned int reg) 836 { 837 return (reg > AW9523_REG_PORT_MODE(AW9523_PINS_PER_PORT) && 838 reg < AW9523_REG_SOFT_RESET) || 839 (reg > AW9523_REG_INTR_DIS(AW9523_PINS_PER_PORT) && 840 reg < AW9523_REG_CHIPID); 841 } 842 843 static bool aw9523_readable_reg(struct device *dev, unsigned int reg) 844 { 845 /* All available registers (minus holes) can be read */ 846 return !aw9523_is_reg_hole(reg); 847 } 848 849 static bool aw9523_volatile_reg(struct device *dev, unsigned int reg) 850 { 851 return aw9523_is_reg_hole(reg) || 852 reg == AW9523_REG_IN_STATE(0) || 853 reg == AW9523_REG_IN_STATE(AW9523_PINS_PER_PORT) || 854 reg == AW9523_REG_CHIPID || 855 reg == AW9523_REG_SOFT_RESET; 856 } 857 858 static bool aw9523_writeable_reg(struct device *dev, unsigned int reg) 859 { 860 return !aw9523_is_reg_hole(reg) && reg != AW9523_REG_CHIPID; 861 } 862 863 static bool aw9523_precious_reg(struct device *dev, unsigned int reg) 864 { 865 /* Reading AW9523_REG_IN_STATE clears interrupt status */ 866 return aw9523_is_reg_hole(reg) || 867 reg == AW9523_REG_IN_STATE(0) || 868 reg == AW9523_REG_IN_STATE(AW9523_PINS_PER_PORT); 869 } 870 871 static const struct regmap_config aw9523_regmap = { 872 .reg_bits = 8, 873 .val_bits = 8, 874 .reg_stride = 1, 875 876 .precious_reg = aw9523_precious_reg, 877 .readable_reg = aw9523_readable_reg, 878 .volatile_reg = aw9523_volatile_reg, 879 .writeable_reg = aw9523_writeable_reg, 880 881 .cache_type = REGCACHE_FLAT, 882 .disable_locking = true, 883 884 .num_reg_defaults_raw = AW9523_REG_SOFT_RESET, 885 }; 886 887 static int aw9523_hw_init(struct aw9523 *awi) 888 { 889 u8 p1_pin = AW9523_PINS_PER_PORT; 890 unsigned int val; 891 int ret; 892 893 /* No register caching during initialization */ 894 regcache_cache_bypass(awi->regmap, true); 895 896 /* Bring up the chip */ 897 ret = aw9523_hw_reset(awi); 898 if (ret) { 899 dev_err(awi->dev, "HW Reset failed: %d\n", ret); 900 return ret; 901 } 902 903 /* 904 * This is the expected chip and it is running: it's time to 905 * set a safe default configuration in case the user doesn't 906 * configure (all of the available) pins in this chip. 907 * P.S.: The writes order doesn't matter. 908 */ 909 910 /* Set all pins as GPIO */ 911 ret = regmap_write(awi->regmap, AW9523_REG_PORT_MODE(0), U8_MAX); 912 if (ret) 913 return ret; 914 ret = regmap_write(awi->regmap, AW9523_REG_PORT_MODE(p1_pin), U8_MAX); 915 if (ret) 916 return ret; 917 918 /* Set Open-Drain mode on Port 0 (Port 1 is always P-P) */ 919 ret = regmap_write(awi->regmap, AW9523_REG_GCR, 0); 920 if (ret) 921 return ret; 922 923 /* Set all pins as inputs */ 924 ret = regmap_write(awi->regmap, AW9523_REG_CONF_STATE(0), U8_MAX); 925 if (ret) 926 return ret; 927 ret = regmap_write(awi->regmap, AW9523_REG_CONF_STATE(p1_pin), U8_MAX); 928 if (ret) 929 return ret; 930 931 /* Disable all interrupts to avoid unreasoned wakeups */ 932 ret = regmap_write(awi->regmap, AW9523_REG_INTR_DIS(0), U8_MAX); 933 if (ret) 934 return ret; 935 ret = regmap_write(awi->regmap, AW9523_REG_INTR_DIS(p1_pin), U8_MAX); 936 if (ret) 937 return ret; 938 939 /* Clear setup-generated interrupts by performing a port state read */ 940 ret = aw9523_get_port_state(awi->regmap, 0, 0, &val); 941 if (ret) 942 return ret; 943 ret = aw9523_get_port_state(awi->regmap, p1_pin, 0, &val); 944 if (ret) 945 return ret; 946 947 /* Everything went fine: activate and reinitialize register cache */ 948 regcache_cache_bypass(awi->regmap, false); 949 return regmap_reinit_cache(awi->regmap, &aw9523_regmap); 950 } 951 952 static int aw9523_probe(struct i2c_client *client) 953 { 954 struct device *dev = &client->dev; 955 struct pinctrl_desc *pdesc; 956 struct aw9523 *awi; 957 int ret; 958 959 awi = devm_kzalloc(dev, sizeof(*awi), GFP_KERNEL); 960 if (!awi) 961 return -ENOMEM; 962 963 i2c_set_clientdata(client, awi); 964 965 awi->dev = dev; 966 awi->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); 967 if (IS_ERR(awi->reset_gpio)) 968 return PTR_ERR(awi->reset_gpio); 969 gpiod_set_consumer_name(awi->reset_gpio, "aw9523 reset"); 970 971 awi->regmap = devm_regmap_init_i2c(client, &aw9523_regmap); 972 if (IS_ERR(awi->regmap)) 973 return PTR_ERR(awi->regmap); 974 975 awi->vio_vreg = devm_regulator_get_optional(dev, "vio"); 976 if (IS_ERR(awi->vio_vreg)) { 977 if (PTR_ERR(awi->vio_vreg) == -EPROBE_DEFER) 978 return -EPROBE_DEFER; 979 awi->vio_vreg = NULL; 980 } else { 981 ret = regulator_enable(awi->vio_vreg); 982 if (ret) 983 return ret; 984 } 985 986 mutex_init(&awi->i2c_lock); 987 lockdep_set_subclass(&awi->i2c_lock, i2c_adapter_depth(client->adapter)); 988 989 pdesc = devm_kzalloc(dev, sizeof(*pdesc), GFP_KERNEL); 990 if (!pdesc) 991 return -ENOMEM; 992 993 ret = aw9523_hw_init(awi); 994 if (ret) 995 goto err_disable_vregs; 996 997 pdesc->name = dev_name(dev); 998 pdesc->owner = THIS_MODULE; 999 pdesc->pctlops = &aw9523_pinctrl_ops; 1000 pdesc->pmxops = &aw9523_pinmux_ops; 1001 pdesc->confops = &aw9523_pinconf_ops; 1002 pdesc->pins = aw9523_pins; 1003 pdesc->npins = ARRAY_SIZE(aw9523_pins); 1004 1005 ret = aw9523_init_gpiochip(awi, pdesc->npins); 1006 if (ret) 1007 goto err_disable_vregs; 1008 1009 if (client->irq) { 1010 ret = aw9523_init_irq(awi, client->irq); 1011 if (ret) 1012 goto err_disable_vregs; 1013 } 1014 1015 awi->pctl = devm_pinctrl_register(dev, pdesc, awi); 1016 if (IS_ERR(awi->pctl)) { 1017 ret = dev_err_probe(dev, PTR_ERR(awi->pctl), "Cannot register pinctrl"); 1018 goto err_disable_vregs; 1019 } 1020 1021 ret = devm_gpiochip_add_data(dev, &awi->gpio, awi); 1022 if (ret) 1023 goto err_disable_vregs; 1024 1025 return ret; 1026 1027 err_disable_vregs: 1028 if (awi->vio_vreg) 1029 regulator_disable(awi->vio_vreg); 1030 mutex_destroy(&awi->i2c_lock); 1031 return ret; 1032 } 1033 1034 static void aw9523_remove(struct i2c_client *client) 1035 { 1036 struct aw9523 *awi = i2c_get_clientdata(client); 1037 1038 /* 1039 * If the chip VIO is connected to a regulator that we can turn 1040 * off, life is easy... otherwise, reinitialize the chip and 1041 * set the pins to hardware defaults before removing the driver 1042 * to leave it in a clean, safe and predictable state. 1043 */ 1044 if (awi->vio_vreg) { 1045 regulator_disable(awi->vio_vreg); 1046 } else { 1047 mutex_lock(&awi->i2c_lock); 1048 aw9523_hw_init(awi); 1049 mutex_unlock(&awi->i2c_lock); 1050 } 1051 1052 mutex_destroy(&awi->i2c_lock); 1053 } 1054 1055 static const struct i2c_device_id aw9523_i2c_id_table[] = { 1056 { "aw9523_i2c", 0 }, 1057 { } 1058 }; 1059 MODULE_DEVICE_TABLE(i2c, aw9523_i2c_id_table); 1060 1061 static const struct of_device_id of_aw9523_i2c_match[] = { 1062 { .compatible = "awinic,aw9523-pinctrl", }, 1063 { } 1064 }; 1065 MODULE_DEVICE_TABLE(of, of_aw9523_i2c_match); 1066 1067 static struct i2c_driver aw9523_driver = { 1068 .driver = { 1069 .name = "aw9523-pinctrl", 1070 .of_match_table = of_aw9523_i2c_match, 1071 }, 1072 .probe = aw9523_probe, 1073 .remove = aw9523_remove, 1074 .id_table = aw9523_i2c_id_table, 1075 }; 1076 module_i2c_driver(aw9523_driver); 1077 1078 MODULE_DESCRIPTION("Awinic AW9523 I2C GPIO Expander driver"); 1079 MODULE_AUTHOR("AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>"); 1080 MODULE_LICENSE("GPL v2"); 1081