xref: /linux/drivers/pinctrl/nuvoton/Kconfig (revision 2a6b6c9a226279b4f6668450ddb21ae655558087)
1# SPDX-License-Identifier: GPL-2.0-only
2
3config PINCTRL_WPCM450
4	tristate "Pinctrl and GPIO driver for Nuvoton WPCM450"
5	depends on (ARCH_WPCM450 || COMPILE_TEST) && OF
6	select PINMUX
7	select PINCONF
8	select GENERIC_PINCONF
9	select GENERIC_PINCTRL_GROUPS
10	select GPIOLIB
11	select GPIO_GENERIC
12	select GPIOLIB_IRQCHIP
13	select MFD_SYSCON
14	help
15	  Say Y or M here to enable pin controller and GPIO support for
16	  the Nuvoton WPCM450 SoC. This is strongly recommended when
17	  building a kernel that will run on this chip.
18
19	  If this driver is compiled as a module, it will be named
20	  pinctrl-wpcm450.
21
22config PINCTRL_NPCM7XX
23	bool "Pinctrl and GPIO driver for Nuvoton NPCM7XX"
24	depends on (ARCH_NPCM7XX || COMPILE_TEST) && OF
25	select PINMUX
26	select PINCONF
27	select GENERIC_PINCONF
28	select GPIOLIB
29	select GPIO_GENERIC
30	select GPIOLIB_IRQCHIP
31	help
32	  Say Y here to enable pin controller and GPIO support
33	  for Nuvoton NPCM750/730/715/705 SoCs.
34
35config PINCTRL_NPCM8XX
36	tristate "Pinctrl and GPIO driver for Nuvoton NPCM8XX"
37	depends on (ARCH_NPCM || COMPILE_TEST) && OF
38	select PINMUX
39	select PINCONF
40	select GENERIC_PINCONF
41	select GPIOLIB
42	select GPIO_GENERIC
43	select GPIOLIB_IRQCHIP
44	help
45	  Say Y or M here to enable pin controller and GPIO support for
46	  the Nuvoton NPCM8XX SoC. This is strongly recommended when
47	  building a kernel that will run on this chip.
48
49config PINCTRL_MA35
50	bool
51	depends on (ARCH_MA35 || COMPILE_TEST) && OF
52	select GENERIC_PINCTRL_GROUPS
53	select GENERIC_PINMUX_FUNCTIONS
54	select GENERIC_PINCONF
55	select GPIOLIB
56	select GPIO_GENERIC
57	select GPIOLIB_IRQCHIP
58	select MFD_SYSCON
59
60config PINCTRL_MA35D1
61	bool "Pinctrl and GPIO driver for Nuvoton MA35D1"
62	depends on (ARCH_MA35 || COMPILE_TEST) && OF
63	select PINCTRL_MA35
64	help
65	  Say Y here to enable pin controller and GPIO support
66	  for Nuvoton MA35D1 SoC.
67