1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) ST-Ericsson SA 2013 4 * 5 * Author: Patrice Chotard <patrice.chotard@st.com> 6 * 7 * Driver allows to use AxB5xx unused pins to be used as GPIO 8 */ 9 10 #include <linux/bitops.h> 11 #include <linux/cleanup.h> 12 #include <linux/err.h> 13 #include <linux/gpio/driver.h> 14 #include <linux/init.h> 15 #include <linux/interrupt.h> 16 #include <linux/irq.h> 17 #include <linux/irqdomain.h> 18 #include <linux/kernel.h> 19 #include <linux/of.h> 20 #include <linux/of_device.h> 21 #include <linux/platform_device.h> 22 #include <linux/property.h> 23 #include <linux/seq_file.h> 24 #include <linux/slab.h> 25 #include <linux/string_choices.h> 26 #include <linux/types.h> 27 28 #include <linux/mfd/abx500.h> 29 #include <linux/mfd/abx500/ab8500.h> 30 31 #include <linux/pinctrl/consumer.h> 32 #include <linux/pinctrl/machine.h> 33 #include <linux/pinctrl/pinconf-generic.h> 34 #include <linux/pinctrl/pinconf.h> 35 #include <linux/pinctrl/pinctrl.h> 36 #include <linux/pinctrl/pinmux.h> 37 38 #include "../core.h" 39 #include "../pinconf.h" 40 #include "../pinctrl-utils.h" 41 42 #include "pinctrl-abx500.h" 43 44 /* 45 * GPIO registers offset 46 * Bank: 0x10 47 */ 48 #define AB8500_GPIO_SEL1_REG 0x00 49 #define AB8500_GPIO_SEL2_REG 0x01 50 #define AB8500_GPIO_SEL3_REG 0x02 51 #define AB8500_GPIO_SEL4_REG 0x03 52 #define AB8500_GPIO_SEL5_REG 0x04 53 #define AB8500_GPIO_SEL6_REG 0x05 54 55 #define AB8500_GPIO_DIR1_REG 0x10 56 #define AB8500_GPIO_DIR2_REG 0x11 57 #define AB8500_GPIO_DIR3_REG 0x12 58 #define AB8500_GPIO_DIR4_REG 0x13 59 #define AB8500_GPIO_DIR5_REG 0x14 60 #define AB8500_GPIO_DIR6_REG 0x15 61 62 #define AB8500_GPIO_OUT1_REG 0x20 63 #define AB8500_GPIO_OUT2_REG 0x21 64 #define AB8500_GPIO_OUT3_REG 0x22 65 #define AB8500_GPIO_OUT4_REG 0x23 66 #define AB8500_GPIO_OUT5_REG 0x24 67 #define AB8500_GPIO_OUT6_REG 0x25 68 69 #define AB8500_GPIO_PUD1_REG 0x30 70 #define AB8500_GPIO_PUD2_REG 0x31 71 #define AB8500_GPIO_PUD3_REG 0x32 72 #define AB8500_GPIO_PUD4_REG 0x33 73 #define AB8500_GPIO_PUD5_REG 0x34 74 #define AB8500_GPIO_PUD6_REG 0x35 75 76 #define AB8500_GPIO_IN1_REG 0x40 77 #define AB8500_GPIO_IN2_REG 0x41 78 #define AB8500_GPIO_IN3_REG 0x42 79 #define AB8500_GPIO_IN4_REG 0x43 80 #define AB8500_GPIO_IN5_REG 0x44 81 #define AB8500_GPIO_IN6_REG 0x45 82 #define AB8500_GPIO_ALTFUN_REG 0x50 83 84 #define ABX500_GPIO_INPUT 0 85 #define ABX500_GPIO_OUTPUT 1 86 87 struct abx500_pinctrl { 88 struct device *dev; 89 struct pinctrl_dev *pctldev; 90 struct abx500_pinctrl_soc_data *soc; 91 struct gpio_chip chip; 92 struct ab8500 *parent; 93 struct abx500_gpio_irq_cluster *irq_cluster; 94 int irq_cluster_size; 95 }; 96 97 static int abx500_gpio_get_bit(struct gpio_chip *chip, u8 reg, 98 unsigned offset, bool *bit) 99 { 100 struct abx500_pinctrl *pct = gpiochip_get_data(chip); 101 u8 pos = offset % 8; 102 u8 val; 103 int ret; 104 105 reg += offset / 8; 106 ret = abx500_get_register_interruptible(pct->dev, 107 AB8500_MISC, reg, &val); 108 if (ret < 0) { 109 dev_err(pct->dev, 110 "%s read reg =%x, offset=%x failed (%d)\n", 111 __func__, reg, offset, ret); 112 return ret; 113 } 114 115 *bit = !!(val & BIT(pos)); 116 117 return 0; 118 } 119 120 static int abx500_gpio_set_bits(struct gpio_chip *chip, u8 reg, 121 unsigned offset, int val) 122 { 123 struct abx500_pinctrl *pct = gpiochip_get_data(chip); 124 u8 pos = offset % 8; 125 int ret; 126 127 reg += offset / 8; 128 ret = abx500_mask_and_set_register_interruptible(pct->dev, 129 AB8500_MISC, reg, BIT(pos), val << pos); 130 if (ret < 0) 131 dev_err(pct->dev, "%s write reg, %x offset %x failed (%d)\n", 132 __func__, reg, offset, ret); 133 134 return ret; 135 } 136 137 /** 138 * abx500_gpio_get() - Get the particular GPIO value 139 * @chip: Gpio device 140 * @offset: GPIO number to read 141 */ 142 static int abx500_gpio_get(struct gpio_chip *chip, unsigned offset) 143 { 144 struct abx500_pinctrl *pct = gpiochip_get_data(chip); 145 bool bit; 146 bool is_out; 147 u8 gpio_offset = offset - 1; 148 int ret; 149 150 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_DIR1_REG, 151 gpio_offset, &is_out); 152 if (ret < 0) 153 goto out; 154 155 if (is_out) 156 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_OUT1_REG, 157 gpio_offset, &bit); 158 else 159 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_IN1_REG, 160 gpio_offset, &bit); 161 out: 162 if (ret < 0) { 163 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret); 164 return ret; 165 } 166 167 return bit; 168 } 169 170 static void abx500_gpio_set(struct gpio_chip *chip, unsigned offset, int val) 171 { 172 struct abx500_pinctrl *pct = gpiochip_get_data(chip); 173 int ret; 174 175 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val); 176 if (ret < 0) 177 dev_err(pct->dev, "%s write failed (%d)\n", __func__, ret); 178 } 179 180 static int abx500_gpio_direction_output(struct gpio_chip *chip, 181 unsigned offset, 182 int val) 183 { 184 struct abx500_pinctrl *pct = gpiochip_get_data(chip); 185 int ret; 186 187 /* set direction as output */ 188 ret = abx500_gpio_set_bits(chip, 189 AB8500_GPIO_DIR1_REG, 190 offset, 191 ABX500_GPIO_OUTPUT); 192 if (ret < 0) 193 goto out; 194 195 /* disable pull down */ 196 ret = abx500_gpio_set_bits(chip, 197 AB8500_GPIO_PUD1_REG, 198 offset, 199 ABX500_GPIO_PULL_NONE); 200 201 out: 202 if (ret < 0) { 203 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret); 204 return ret; 205 } 206 207 /* set the output as 1 or 0 */ 208 return abx500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val); 209 } 210 211 static int abx500_gpio_direction_input(struct gpio_chip *chip, unsigned offset) 212 { 213 /* set the register as input */ 214 return abx500_gpio_set_bits(chip, 215 AB8500_GPIO_DIR1_REG, 216 offset, 217 ABX500_GPIO_INPUT); 218 } 219 220 static int abx500_gpio_to_irq(struct gpio_chip *chip, unsigned offset) 221 { 222 struct abx500_pinctrl *pct = gpiochip_get_data(chip); 223 /* The AB8500 GPIO numbers are off by one */ 224 int gpio = offset + 1; 225 int hwirq; 226 int i; 227 228 for (i = 0; i < pct->irq_cluster_size; i++) { 229 struct abx500_gpio_irq_cluster *cluster = 230 &pct->irq_cluster[i]; 231 232 if (gpio >= cluster->start && gpio <= cluster->end) { 233 /* 234 * The ABx500 GPIO's associated IRQs are clustered together 235 * throughout the interrupt numbers at irregular intervals. 236 * To solve this quandry, we have placed the read-in values 237 * into the cluster information table. 238 */ 239 hwirq = gpio - cluster->start + cluster->to_irq; 240 return irq_create_mapping(pct->parent->domain, hwirq); 241 } 242 } 243 244 return -EINVAL; 245 } 246 247 static int abx500_set_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip, 248 unsigned gpio, int alt_setting) 249 { 250 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 251 struct alternate_functions af = pct->soc->alternate_functions[gpio]; 252 int ret; 253 int val; 254 unsigned offset; 255 256 const char *modes[] = { 257 [ABX500_DEFAULT] = "default", 258 [ABX500_ALT_A] = "altA", 259 [ABX500_ALT_B] = "altB", 260 [ABX500_ALT_C] = "altC", 261 }; 262 263 /* sanity check */ 264 if (((alt_setting == ABX500_ALT_A) && (af.gpiosel_bit == UNUSED)) || 265 ((alt_setting == ABX500_ALT_B) && (af.alt_bit1 == UNUSED)) || 266 ((alt_setting == ABX500_ALT_C) && (af.alt_bit2 == UNUSED))) { 267 dev_dbg(pct->dev, "pin %d doesn't support %s mode\n", gpio, 268 modes[alt_setting]); 269 return -EINVAL; 270 } 271 272 /* on ABx5xx, there is no GPIO0, so adjust the offset */ 273 offset = gpio - 1; 274 275 switch (alt_setting) { 276 case ABX500_DEFAULT: 277 /* 278 * for ABx5xx family, default mode is always selected by 279 * writing 0 to GPIOSELx register, except for pins which 280 * support at least ALT_B mode, default mode is selected 281 * by writing 1 to GPIOSELx register 282 */ 283 val = 0; 284 if (af.alt_bit1 != UNUSED) 285 val++; 286 287 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG, 288 offset, val); 289 break; 290 291 case ABX500_ALT_A: 292 /* 293 * for ABx5xx family, alt_a mode is always selected by 294 * writing 1 to GPIOSELx register, except for pins which 295 * support at least ALT_B mode, alt_a mode is selected 296 * by writing 0 to GPIOSELx register and 0 in ALTFUNC 297 * register 298 */ 299 if (af.alt_bit1 != UNUSED) { 300 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG, 301 offset, 0); 302 if (ret < 0) 303 goto out; 304 305 ret = abx500_gpio_set_bits(chip, 306 AB8500_GPIO_ALTFUN_REG, 307 af.alt_bit1, 308 !!(af.alta_val & BIT(0))); 309 if (ret < 0) 310 goto out; 311 312 if (af.alt_bit2 != UNUSED) 313 ret = abx500_gpio_set_bits(chip, 314 AB8500_GPIO_ALTFUN_REG, 315 af.alt_bit2, 316 !!(af.alta_val & BIT(1))); 317 } else 318 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG, 319 offset, 1); 320 break; 321 322 case ABX500_ALT_B: 323 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG, 324 offset, 0); 325 if (ret < 0) 326 goto out; 327 328 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG, 329 af.alt_bit1, !!(af.altb_val & BIT(0))); 330 if (ret < 0) 331 goto out; 332 333 if (af.alt_bit2 != UNUSED) 334 ret = abx500_gpio_set_bits(chip, 335 AB8500_GPIO_ALTFUN_REG, 336 af.alt_bit2, 337 !!(af.altb_val & BIT(1))); 338 break; 339 340 case ABX500_ALT_C: 341 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG, 342 offset, 0); 343 if (ret < 0) 344 goto out; 345 346 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG, 347 af.alt_bit2, !!(af.altc_val & BIT(0))); 348 if (ret < 0) 349 goto out; 350 351 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG, 352 af.alt_bit2, !!(af.altc_val & BIT(1))); 353 break; 354 355 default: 356 dev_dbg(pct->dev, "unknown alt_setting %d\n", alt_setting); 357 358 return -EINVAL; 359 } 360 out: 361 if (ret < 0) 362 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret); 363 364 return ret; 365 } 366 367 #ifdef CONFIG_DEBUG_FS 368 static int abx500_get_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip, 369 unsigned gpio) 370 { 371 u8 mode; 372 bool bit_mode; 373 bool alt_bit1; 374 bool alt_bit2; 375 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 376 struct alternate_functions af = pct->soc->alternate_functions[gpio]; 377 /* on ABx5xx, there is no GPIO0, so adjust the offset */ 378 unsigned offset = gpio - 1; 379 int ret; 380 381 /* 382 * if gpiosel_bit is set to unused, 383 * it means no GPIO or special case 384 */ 385 if (af.gpiosel_bit == UNUSED) 386 return ABX500_DEFAULT; 387 388 /* read GpioSelx register */ 389 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_SEL1_REG + (offset / 8), 390 af.gpiosel_bit, &bit_mode); 391 if (ret < 0) 392 goto out; 393 394 mode = bit_mode; 395 396 /* sanity check */ 397 if ((af.alt_bit1 < UNUSED) || (af.alt_bit1 > 7) || 398 (af.alt_bit2 < UNUSED) || (af.alt_bit2 > 7)) { 399 dev_err(pct->dev, 400 "alt_bitX value not in correct range (-1 to 7)\n"); 401 return -EINVAL; 402 } 403 404 /* if alt_bit2 is used, alt_bit1 must be used too */ 405 if ((af.alt_bit2 != UNUSED) && (af.alt_bit1 == UNUSED)) { 406 dev_err(pct->dev, 407 "if alt_bit2 is used, alt_bit1 can't be unused\n"); 408 return -EINVAL; 409 } 410 411 /* check if pin use AlternateFunction register */ 412 if ((af.alt_bit1 == UNUSED) && (af.alt_bit2 == UNUSED)) 413 return mode; 414 /* 415 * if pin GPIOSEL bit is set and pin supports alternate function, 416 * it means DEFAULT mode 417 */ 418 if (mode) 419 return ABX500_DEFAULT; 420 421 /* 422 * pin use the AlternatFunction register 423 * read alt_bit1 value 424 */ 425 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_ALTFUN_REG, 426 af.alt_bit1, &alt_bit1); 427 if (ret < 0) 428 goto out; 429 430 if (af.alt_bit2 != UNUSED) { 431 /* read alt_bit2 value */ 432 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_ALTFUN_REG, 433 af.alt_bit2, 434 &alt_bit2); 435 if (ret < 0) 436 goto out; 437 } else 438 alt_bit2 = 0; 439 440 mode = (alt_bit2 << 1) + alt_bit1; 441 if (mode == af.alta_val) 442 return ABX500_ALT_A; 443 else if (mode == af.altb_val) 444 return ABX500_ALT_B; 445 else 446 return ABX500_ALT_C; 447 448 out: 449 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret); 450 return ret; 451 } 452 453 static void abx500_gpio_dbg_show_one(struct seq_file *s, 454 struct pinctrl_dev *pctldev, 455 struct gpio_chip *chip, 456 unsigned offset, unsigned gpio) 457 { 458 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 459 u8 gpio_offset = offset - 1; 460 int mode = -1; 461 bool is_out; 462 bool pd; 463 int ret = -ENOMEM; 464 465 const char *modes[] = { 466 [ABX500_DEFAULT] = "default", 467 [ABX500_ALT_A] = "altA", 468 [ABX500_ALT_B] = "altB", 469 [ABX500_ALT_C] = "altC", 470 }; 471 472 const char *pull_up_down[] = { 473 [ABX500_GPIO_PULL_DOWN] = "pull down", 474 [ABX500_GPIO_PULL_NONE] = "pull none", 475 [ABX500_GPIO_PULL_NONE + 1] = "pull none", 476 [ABX500_GPIO_PULL_UP] = "pull up", 477 }; 478 479 char *label __free(kfree) = gpiochip_dup_line_label(chip, offset - 1); 480 if (IS_ERR(label)) 481 goto out; 482 483 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_DIR1_REG, 484 gpio_offset, &is_out); 485 if (ret < 0) 486 goto out; 487 488 seq_printf(s, " gpio-%-3d (%-20.20s) %-3s", 489 gpio, label ?: "(none)", 490 is_out ? "out" : "in "); 491 492 if (!is_out) { 493 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_PUD1_REG, 494 gpio_offset, &pd); 495 if (ret < 0) 496 goto out; 497 498 seq_printf(s, " %-9s", pull_up_down[pd]); 499 } else 500 seq_printf(s, " %-9s", str_hi_lo(chip->get(chip, offset))); 501 502 mode = abx500_get_mode(pctldev, chip, offset); 503 504 seq_printf(s, " %s", (mode < 0) ? "unknown" : modes[mode]); 505 506 out: 507 if (ret < 0) 508 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret); 509 } 510 511 static void abx500_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) 512 { 513 unsigned i; 514 unsigned gpio = chip->base; 515 struct abx500_pinctrl *pct = gpiochip_get_data(chip); 516 struct pinctrl_dev *pctldev = pct->pctldev; 517 518 for (i = 0; i < chip->ngpio; i++, gpio++) { 519 /* On AB8500, there is no GPIO0, the first is the GPIO 1 */ 520 abx500_gpio_dbg_show_one(s, pctldev, chip, i + 1, gpio); 521 seq_putc(s, '\n'); 522 } 523 } 524 525 #else 526 static inline void abx500_gpio_dbg_show_one(struct seq_file *s, 527 struct pinctrl_dev *pctldev, 528 struct gpio_chip *chip, 529 unsigned offset, unsigned gpio) 530 { 531 } 532 #define abx500_gpio_dbg_show NULL 533 #endif 534 535 static const struct gpio_chip abx500gpio_chip = { 536 .label = "abx500-gpio", 537 .owner = THIS_MODULE, 538 .request = gpiochip_generic_request, 539 .free = gpiochip_generic_free, 540 .direction_input = abx500_gpio_direction_input, 541 .get = abx500_gpio_get, 542 .direction_output = abx500_gpio_direction_output, 543 .set = abx500_gpio_set, 544 .to_irq = abx500_gpio_to_irq, 545 .dbg_show = abx500_gpio_dbg_show, 546 }; 547 548 static int abx500_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev) 549 { 550 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 551 552 return pct->soc->nfunctions; 553 } 554 555 static const char *abx500_pmx_get_func_name(struct pinctrl_dev *pctldev, 556 unsigned function) 557 { 558 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 559 560 return pct->soc->functions[function].name; 561 } 562 563 static int abx500_pmx_get_func_groups(struct pinctrl_dev *pctldev, 564 unsigned function, 565 const char * const **groups, 566 unsigned * const num_groups) 567 { 568 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 569 570 *groups = pct->soc->functions[function].groups; 571 *num_groups = pct->soc->functions[function].ngroups; 572 573 return 0; 574 } 575 576 static int abx500_pmx_set(struct pinctrl_dev *pctldev, unsigned function, 577 unsigned group) 578 { 579 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 580 struct gpio_chip *chip = &pct->chip; 581 const struct abx500_pingroup *g; 582 int i; 583 int ret = 0; 584 585 g = &pct->soc->groups[group]; 586 if (g->altsetting < 0) 587 return -EINVAL; 588 589 dev_dbg(pct->dev, "enable group %s, %u pins\n", g->name, g->npins); 590 591 for (i = 0; i < g->npins; i++) { 592 dev_dbg(pct->dev, "setting pin %d to altsetting %d\n", 593 g->pins[i], g->altsetting); 594 595 ret = abx500_set_mode(pctldev, chip, g->pins[i], g->altsetting); 596 } 597 598 if (ret < 0) 599 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret); 600 601 return ret; 602 } 603 604 static int abx500_gpio_request_enable(struct pinctrl_dev *pctldev, 605 struct pinctrl_gpio_range *range, 606 unsigned offset) 607 { 608 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 609 const struct abx500_pinrange *p; 610 int ret; 611 int i; 612 613 /* 614 * Different ranges have different ways to enable GPIO function on a 615 * pin, so refer back to our local range type, where we handily define 616 * what altfunc enables GPIO for a certain pin. 617 */ 618 for (i = 0; i < pct->soc->gpio_num_ranges; i++) { 619 p = &pct->soc->gpio_ranges[i]; 620 if ((offset >= p->offset) && 621 (offset < (p->offset + p->npins))) 622 break; 623 } 624 625 if (i == pct->soc->gpio_num_ranges) { 626 dev_err(pct->dev, "%s failed to locate range\n", __func__); 627 return -ENODEV; 628 } 629 630 dev_dbg(pct->dev, "enable GPIO by altfunc %d at gpio %d\n", 631 p->altfunc, offset); 632 633 ret = abx500_set_mode(pct->pctldev, &pct->chip, 634 offset, p->altfunc); 635 if (ret < 0) 636 dev_err(pct->dev, "%s setting altfunc failed\n", __func__); 637 638 return ret; 639 } 640 641 static void abx500_gpio_disable_free(struct pinctrl_dev *pctldev, 642 struct pinctrl_gpio_range *range, 643 unsigned offset) 644 { 645 } 646 647 static const struct pinmux_ops abx500_pinmux_ops = { 648 .get_functions_count = abx500_pmx_get_funcs_cnt, 649 .get_function_name = abx500_pmx_get_func_name, 650 .get_function_groups = abx500_pmx_get_func_groups, 651 .set_mux = abx500_pmx_set, 652 .gpio_request_enable = abx500_gpio_request_enable, 653 .gpio_disable_free = abx500_gpio_disable_free, 654 }; 655 656 static int abx500_get_groups_cnt(struct pinctrl_dev *pctldev) 657 { 658 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 659 660 return pct->soc->ngroups; 661 } 662 663 static const char *abx500_get_group_name(struct pinctrl_dev *pctldev, 664 unsigned selector) 665 { 666 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 667 668 return pct->soc->groups[selector].name; 669 } 670 671 static int abx500_get_group_pins(struct pinctrl_dev *pctldev, 672 unsigned selector, 673 const unsigned **pins, 674 unsigned *num_pins) 675 { 676 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 677 678 *pins = pct->soc->groups[selector].pins; 679 *num_pins = pct->soc->groups[selector].npins; 680 681 return 0; 682 } 683 684 static void abx500_pin_dbg_show(struct pinctrl_dev *pctldev, 685 struct seq_file *s, unsigned offset) 686 { 687 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 688 struct gpio_chip *chip = &pct->chip; 689 690 abx500_gpio_dbg_show_one(s, pctldev, chip, offset, 691 chip->base + offset - 1); 692 } 693 694 static int abx500_dt_add_map_mux(struct pinctrl_map **map, 695 unsigned *reserved_maps, 696 unsigned *num_maps, const char *group, 697 const char *function) 698 { 699 if (*num_maps == *reserved_maps) 700 return -ENOSPC; 701 702 (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP; 703 (*map)[*num_maps].data.mux.group = group; 704 (*map)[*num_maps].data.mux.function = function; 705 (*num_maps)++; 706 707 return 0; 708 } 709 710 static int abx500_dt_add_map_configs(struct pinctrl_map **map, 711 unsigned *reserved_maps, 712 unsigned *num_maps, const char *group, 713 unsigned long *configs, unsigned num_configs) 714 { 715 unsigned long *dup_configs; 716 717 if (*num_maps == *reserved_maps) 718 return -ENOSPC; 719 720 dup_configs = kmemdup_array(configs, num_configs, sizeof(*dup_configs), GFP_KERNEL); 721 if (!dup_configs) 722 return -ENOMEM; 723 724 (*map)[*num_maps].type = PIN_MAP_TYPE_CONFIGS_PIN; 725 726 (*map)[*num_maps].data.configs.group_or_pin = group; 727 (*map)[*num_maps].data.configs.configs = dup_configs; 728 (*map)[*num_maps].data.configs.num_configs = num_configs; 729 (*num_maps)++; 730 731 return 0; 732 } 733 734 static const char *abx500_find_pin_name(struct pinctrl_dev *pctldev, 735 const char *pin_name) 736 { 737 int i, pin_number; 738 struct abx500_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); 739 740 if (sscanf((char *)pin_name, "GPIO%d", &pin_number) == 1) 741 for (i = 0; i < npct->soc->npins; i++) 742 if (npct->soc->pins[i].number == pin_number) 743 return npct->soc->pins[i].name; 744 return NULL; 745 } 746 747 static int abx500_dt_subnode_to_map(struct pinctrl_dev *pctldev, 748 struct device_node *np, 749 struct pinctrl_map **map, 750 unsigned *reserved_maps, 751 unsigned *num_maps) 752 { 753 int ret; 754 const char *function = NULL; 755 unsigned long *configs; 756 unsigned int nconfigs = 0; 757 struct property *prop; 758 759 ret = of_property_read_string(np, "function", &function); 760 if (ret >= 0) { 761 const char *group; 762 763 ret = of_property_count_strings(np, "groups"); 764 if (ret < 0) 765 goto exit; 766 767 ret = pinctrl_utils_reserve_map(pctldev, map, reserved_maps, 768 num_maps, ret); 769 if (ret < 0) 770 goto exit; 771 772 of_property_for_each_string(np, "groups", prop, group) { 773 ret = abx500_dt_add_map_mux(map, reserved_maps, 774 num_maps, group, function); 775 if (ret < 0) 776 goto exit; 777 } 778 } 779 780 ret = pinconf_generic_parse_dt_config(np, pctldev, &configs, &nconfigs); 781 if (nconfigs) { 782 const char *gpio_name; 783 const char *pin; 784 785 ret = of_property_count_strings(np, "pins"); 786 if (ret < 0) 787 goto exit; 788 789 ret = pinctrl_utils_reserve_map(pctldev, map, 790 reserved_maps, 791 num_maps, ret); 792 if (ret < 0) 793 goto exit; 794 795 of_property_for_each_string(np, "pins", prop, pin) { 796 gpio_name = abx500_find_pin_name(pctldev, pin); 797 798 ret = abx500_dt_add_map_configs(map, reserved_maps, 799 num_maps, gpio_name, configs, 1); 800 if (ret < 0) 801 goto exit; 802 } 803 } 804 805 exit: 806 return ret; 807 } 808 809 static int abx500_dt_node_to_map(struct pinctrl_dev *pctldev, 810 struct device_node *np_config, 811 struct pinctrl_map **map, unsigned *num_maps) 812 { 813 unsigned reserved_maps; 814 int ret; 815 816 reserved_maps = 0; 817 *map = NULL; 818 *num_maps = 0; 819 820 for_each_child_of_node_scoped(np_config, np) { 821 ret = abx500_dt_subnode_to_map(pctldev, np, map, 822 &reserved_maps, num_maps); 823 if (ret < 0) { 824 pinctrl_utils_free_map(pctldev, *map, *num_maps); 825 return ret; 826 } 827 } 828 829 return 0; 830 } 831 832 static const struct pinctrl_ops abx500_pinctrl_ops = { 833 .get_groups_count = abx500_get_groups_cnt, 834 .get_group_name = abx500_get_group_name, 835 .get_group_pins = abx500_get_group_pins, 836 .pin_dbg_show = abx500_pin_dbg_show, 837 .dt_node_to_map = abx500_dt_node_to_map, 838 .dt_free_map = pinctrl_utils_free_map, 839 }; 840 841 static int abx500_pin_config_get(struct pinctrl_dev *pctldev, 842 unsigned pin, 843 unsigned long *config) 844 { 845 return -ENOSYS; 846 } 847 848 static int abx500_pin_config_set(struct pinctrl_dev *pctldev, 849 unsigned pin, 850 unsigned long *configs, 851 unsigned num_configs) 852 { 853 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 854 struct gpio_chip *chip = &pct->chip; 855 unsigned offset; 856 int ret = -EINVAL; 857 int i; 858 enum pin_config_param param; 859 enum pin_config_param argument; 860 861 for (i = 0; i < num_configs; i++) { 862 param = pinconf_to_config_param(configs[i]); 863 argument = pinconf_to_config_argument(configs[i]); 864 865 dev_dbg(chip->parent, "pin %d [%#lx]: %s %s\n", 866 pin, configs[i], 867 (param == PIN_CONFIG_OUTPUT) ? "output " : "input", 868 (param == PIN_CONFIG_OUTPUT) ? 869 str_high_low(argument) : 870 (argument ? "pull up" : "pull down")); 871 872 /* on ABx500, there is no GPIO0, so adjust the offset */ 873 offset = pin - 1; 874 875 switch (param) { 876 case PIN_CONFIG_BIAS_DISABLE: 877 ret = abx500_gpio_direction_input(chip, offset); 878 if (ret < 0) 879 goto out; 880 881 /* Chip only supports pull down */ 882 ret = abx500_gpio_set_bits(chip, 883 AB8500_GPIO_PUD1_REG, offset, 884 ABX500_GPIO_PULL_NONE); 885 break; 886 887 case PIN_CONFIG_BIAS_PULL_DOWN: 888 ret = abx500_gpio_direction_input(chip, offset); 889 if (ret < 0) 890 goto out; 891 /* 892 * if argument = 1 set the pull down 893 * else clear the pull down 894 * Chip only supports pull down 895 */ 896 ret = abx500_gpio_set_bits(chip, 897 AB8500_GPIO_PUD1_REG, 898 offset, 899 argument ? ABX500_GPIO_PULL_DOWN : 900 ABX500_GPIO_PULL_NONE); 901 break; 902 903 case PIN_CONFIG_BIAS_PULL_UP: 904 ret = abx500_gpio_direction_input(chip, offset); 905 if (ret < 0) 906 goto out; 907 /* 908 * if argument = 1 set the pull up 909 * else clear the pull up 910 */ 911 ret = abx500_gpio_direction_input(chip, offset); 912 break; 913 914 case PIN_CONFIG_OUTPUT: 915 ret = abx500_gpio_direction_output(chip, offset, 916 argument); 917 break; 918 919 default: 920 dev_err(chip->parent, 921 "illegal configuration requested\n"); 922 } 923 } /* for each config */ 924 out: 925 if (ret < 0) 926 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret); 927 928 return ret; 929 } 930 931 static const struct pinconf_ops abx500_pinconf_ops = { 932 .pin_config_get = abx500_pin_config_get, 933 .pin_config_set = abx500_pin_config_set, 934 .is_generic = true, 935 }; 936 937 static struct pinctrl_desc abx500_pinctrl_desc = { 938 .name = "pinctrl-abx500", 939 .pctlops = &abx500_pinctrl_ops, 940 .pmxops = &abx500_pinmux_ops, 941 .confops = &abx500_pinconf_ops, 942 .owner = THIS_MODULE, 943 }; 944 945 static int abx500_get_gpio_num(struct abx500_pinctrl_soc_data *soc) 946 { 947 unsigned int lowest = 0; 948 unsigned int highest = 0; 949 unsigned int npins = 0; 950 int i; 951 952 /* 953 * Compute number of GPIOs from the last SoC gpio range descriptors 954 * These ranges may include "holes" but the GPIO number space shall 955 * still be homogeneous, so we need to detect and account for any 956 * such holes so that these are included in the number of GPIO pins. 957 */ 958 for (i = 0; i < soc->gpio_num_ranges; i++) { 959 unsigned gstart; 960 unsigned gend; 961 const struct abx500_pinrange *p; 962 963 p = &soc->gpio_ranges[i]; 964 gstart = p->offset; 965 gend = p->offset + p->npins - 1; 966 967 if (i == 0) { 968 /* First iteration, set start values */ 969 lowest = gstart; 970 highest = gend; 971 } else { 972 if (gstart < lowest) 973 lowest = gstart; 974 if (gend > highest) 975 highest = gend; 976 } 977 } 978 /* this gives the absolute number of pins */ 979 npins = highest - lowest + 1; 980 return npins; 981 } 982 983 static const struct of_device_id abx500_gpio_match[] = { 984 { .compatible = "stericsson,ab8500-gpio", .data = (void *)PINCTRL_AB8500, }, 985 { .compatible = "stericsson,ab8505-gpio", .data = (void *)PINCTRL_AB8505, }, 986 { } 987 }; 988 989 static int abx500_gpio_probe(struct platform_device *pdev) 990 { 991 struct device_node *np = pdev->dev.of_node; 992 struct abx500_pinctrl *pct; 993 unsigned int id = -1; 994 int ret; 995 int i; 996 997 if (!np) { 998 dev_err(&pdev->dev, "gpio dt node missing\n"); 999 return -ENODEV; 1000 } 1001 1002 pct = devm_kzalloc(&pdev->dev, sizeof(*pct), GFP_KERNEL); 1003 if (!pct) 1004 return -ENOMEM; 1005 1006 pct->dev = &pdev->dev; 1007 pct->parent = dev_get_drvdata(pdev->dev.parent); 1008 pct->chip = abx500gpio_chip; 1009 pct->chip.parent = &pdev->dev; 1010 pct->chip.base = -1; /* Dynamic allocation */ 1011 1012 id = (unsigned long)device_get_match_data(&pdev->dev); 1013 1014 /* Poke in other ASIC variants here */ 1015 switch (id) { 1016 case PINCTRL_AB8500: 1017 abx500_pinctrl_ab8500_init(&pct->soc); 1018 break; 1019 case PINCTRL_AB8505: 1020 abx500_pinctrl_ab8505_init(&pct->soc); 1021 break; 1022 default: 1023 dev_err(&pdev->dev, "Unsupported pinctrl sub driver (%d)\n", id); 1024 return -EINVAL; 1025 } 1026 1027 if (!pct->soc) { 1028 dev_err(&pdev->dev, "Invalid SOC data\n"); 1029 return -EINVAL; 1030 } 1031 1032 pct->chip.ngpio = abx500_get_gpio_num(pct->soc); 1033 pct->irq_cluster = pct->soc->gpio_irq_cluster; 1034 pct->irq_cluster_size = pct->soc->ngpio_irq_cluster; 1035 1036 ret = gpiochip_add_data(&pct->chip, pct); 1037 if (ret) { 1038 dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret); 1039 return ret; 1040 } 1041 dev_info(&pdev->dev, "added gpiochip\n"); 1042 1043 abx500_pinctrl_desc.pins = pct->soc->pins; 1044 abx500_pinctrl_desc.npins = pct->soc->npins; 1045 pct->pctldev = devm_pinctrl_register(&pdev->dev, &abx500_pinctrl_desc, 1046 pct); 1047 if (IS_ERR(pct->pctldev)) { 1048 dev_err(&pdev->dev, 1049 "could not register abx500 pinctrl driver\n"); 1050 ret = PTR_ERR(pct->pctldev); 1051 goto out_rem_chip; 1052 } 1053 dev_info(&pdev->dev, "registered pin controller\n"); 1054 1055 /* We will handle a range of GPIO pins */ 1056 for (i = 0; i < pct->soc->gpio_num_ranges; i++) { 1057 const struct abx500_pinrange *p = &pct->soc->gpio_ranges[i]; 1058 1059 ret = gpiochip_add_pin_range(&pct->chip, 1060 dev_name(&pdev->dev), 1061 p->offset - 1, p->offset, p->npins); 1062 if (ret < 0) 1063 goto out_rem_chip; 1064 } 1065 1066 platform_set_drvdata(pdev, pct); 1067 dev_info(&pdev->dev, "initialized abx500 pinctrl driver\n"); 1068 1069 return 0; 1070 1071 out_rem_chip: 1072 gpiochip_remove(&pct->chip); 1073 return ret; 1074 } 1075 1076 /** 1077 * abx500_gpio_remove() - remove Ab8500-gpio driver 1078 * @pdev: Platform device registered 1079 */ 1080 static void abx500_gpio_remove(struct platform_device *pdev) 1081 { 1082 struct abx500_pinctrl *pct = platform_get_drvdata(pdev); 1083 1084 gpiochip_remove(&pct->chip); 1085 } 1086 1087 static struct platform_driver abx500_gpio_driver = { 1088 .driver = { 1089 .name = "abx500-gpio", 1090 .of_match_table = abx500_gpio_match, 1091 }, 1092 .probe = abx500_gpio_probe, 1093 .remove = abx500_gpio_remove, 1094 }; 1095 1096 static int __init abx500_gpio_init(void) 1097 { 1098 return platform_driver_register(&abx500_gpio_driver); 1099 } 1100 core_initcall(abx500_gpio_init); 1101