1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) ST-Ericsson SA 2013 4 * 5 * Author: Patrice Chotard <patrice.chotard@st.com> 6 * 7 * Driver allows to use AxB5xx unused pins to be used as GPIO 8 */ 9 #include <linux/bitops.h> 10 #include <linux/err.h> 11 #include <linux/gpio/driver.h> 12 #include <linux/init.h> 13 #include <linux/interrupt.h> 14 #include <linux/irq.h> 15 #include <linux/irqdomain.h> 16 #include <linux/kernel.h> 17 #include <linux/of.h> 18 #include <linux/of_device.h> 19 #include <linux/platform_device.h> 20 #include <linux/property.h> 21 #include <linux/seq_file.h> 22 #include <linux/slab.h> 23 #include <linux/types.h> 24 25 #include <linux/mfd/abx500.h> 26 #include <linux/mfd/abx500/ab8500.h> 27 28 #include <linux/pinctrl/consumer.h> 29 #include <linux/pinctrl/machine.h> 30 #include <linux/pinctrl/pinconf-generic.h> 31 #include <linux/pinctrl/pinconf.h> 32 #include <linux/pinctrl/pinctrl.h> 33 #include <linux/pinctrl/pinmux.h> 34 35 #include "../core.h" 36 #include "../pinconf.h" 37 #include "../pinctrl-utils.h" 38 39 #include "pinctrl-abx500.h" 40 41 /* 42 * GPIO registers offset 43 * Bank: 0x10 44 */ 45 #define AB8500_GPIO_SEL1_REG 0x00 46 #define AB8500_GPIO_SEL2_REG 0x01 47 #define AB8500_GPIO_SEL3_REG 0x02 48 #define AB8500_GPIO_SEL4_REG 0x03 49 #define AB8500_GPIO_SEL5_REG 0x04 50 #define AB8500_GPIO_SEL6_REG 0x05 51 52 #define AB8500_GPIO_DIR1_REG 0x10 53 #define AB8500_GPIO_DIR2_REG 0x11 54 #define AB8500_GPIO_DIR3_REG 0x12 55 #define AB8500_GPIO_DIR4_REG 0x13 56 #define AB8500_GPIO_DIR5_REG 0x14 57 #define AB8500_GPIO_DIR6_REG 0x15 58 59 #define AB8500_GPIO_OUT1_REG 0x20 60 #define AB8500_GPIO_OUT2_REG 0x21 61 #define AB8500_GPIO_OUT3_REG 0x22 62 #define AB8500_GPIO_OUT4_REG 0x23 63 #define AB8500_GPIO_OUT5_REG 0x24 64 #define AB8500_GPIO_OUT6_REG 0x25 65 66 #define AB8500_GPIO_PUD1_REG 0x30 67 #define AB8500_GPIO_PUD2_REG 0x31 68 #define AB8500_GPIO_PUD3_REG 0x32 69 #define AB8500_GPIO_PUD4_REG 0x33 70 #define AB8500_GPIO_PUD5_REG 0x34 71 #define AB8500_GPIO_PUD6_REG 0x35 72 73 #define AB8500_GPIO_IN1_REG 0x40 74 #define AB8500_GPIO_IN2_REG 0x41 75 #define AB8500_GPIO_IN3_REG 0x42 76 #define AB8500_GPIO_IN4_REG 0x43 77 #define AB8500_GPIO_IN5_REG 0x44 78 #define AB8500_GPIO_IN6_REG 0x45 79 #define AB8500_GPIO_ALTFUN_REG 0x50 80 81 #define ABX500_GPIO_INPUT 0 82 #define ABX500_GPIO_OUTPUT 1 83 84 struct abx500_pinctrl { 85 struct device *dev; 86 struct pinctrl_dev *pctldev; 87 struct abx500_pinctrl_soc_data *soc; 88 struct gpio_chip chip; 89 struct ab8500 *parent; 90 struct abx500_gpio_irq_cluster *irq_cluster; 91 int irq_cluster_size; 92 }; 93 94 static int abx500_gpio_get_bit(struct gpio_chip *chip, u8 reg, 95 unsigned offset, bool *bit) 96 { 97 struct abx500_pinctrl *pct = gpiochip_get_data(chip); 98 u8 pos = offset % 8; 99 u8 val; 100 int ret; 101 102 reg += offset / 8; 103 ret = abx500_get_register_interruptible(pct->dev, 104 AB8500_MISC, reg, &val); 105 if (ret < 0) { 106 dev_err(pct->dev, 107 "%s read reg =%x, offset=%x failed (%d)\n", 108 __func__, reg, offset, ret); 109 return ret; 110 } 111 112 *bit = !!(val & BIT(pos)); 113 114 return 0; 115 } 116 117 static int abx500_gpio_set_bits(struct gpio_chip *chip, u8 reg, 118 unsigned offset, int val) 119 { 120 struct abx500_pinctrl *pct = gpiochip_get_data(chip); 121 u8 pos = offset % 8; 122 int ret; 123 124 reg += offset / 8; 125 ret = abx500_mask_and_set_register_interruptible(pct->dev, 126 AB8500_MISC, reg, BIT(pos), val << pos); 127 if (ret < 0) 128 dev_err(pct->dev, "%s write reg, %x offset %x failed (%d)\n", 129 __func__, reg, offset, ret); 130 131 return ret; 132 } 133 134 /** 135 * abx500_gpio_get() - Get the particular GPIO value 136 * @chip: Gpio device 137 * @offset: GPIO number to read 138 */ 139 static int abx500_gpio_get(struct gpio_chip *chip, unsigned offset) 140 { 141 struct abx500_pinctrl *pct = gpiochip_get_data(chip); 142 bool bit; 143 bool is_out; 144 u8 gpio_offset = offset - 1; 145 int ret; 146 147 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_DIR1_REG, 148 gpio_offset, &is_out); 149 if (ret < 0) 150 goto out; 151 152 if (is_out) 153 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_OUT1_REG, 154 gpio_offset, &bit); 155 else 156 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_IN1_REG, 157 gpio_offset, &bit); 158 out: 159 if (ret < 0) { 160 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret); 161 return ret; 162 } 163 164 return bit; 165 } 166 167 static void abx500_gpio_set(struct gpio_chip *chip, unsigned offset, int val) 168 { 169 struct abx500_pinctrl *pct = gpiochip_get_data(chip); 170 int ret; 171 172 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val); 173 if (ret < 0) 174 dev_err(pct->dev, "%s write failed (%d)\n", __func__, ret); 175 } 176 177 static int abx500_gpio_direction_output(struct gpio_chip *chip, 178 unsigned offset, 179 int val) 180 { 181 struct abx500_pinctrl *pct = gpiochip_get_data(chip); 182 int ret; 183 184 /* set direction as output */ 185 ret = abx500_gpio_set_bits(chip, 186 AB8500_GPIO_DIR1_REG, 187 offset, 188 ABX500_GPIO_OUTPUT); 189 if (ret < 0) 190 goto out; 191 192 /* disable pull down */ 193 ret = abx500_gpio_set_bits(chip, 194 AB8500_GPIO_PUD1_REG, 195 offset, 196 ABX500_GPIO_PULL_NONE); 197 198 out: 199 if (ret < 0) { 200 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret); 201 return ret; 202 } 203 204 /* set the output as 1 or 0 */ 205 return abx500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val); 206 } 207 208 static int abx500_gpio_direction_input(struct gpio_chip *chip, unsigned offset) 209 { 210 /* set the register as input */ 211 return abx500_gpio_set_bits(chip, 212 AB8500_GPIO_DIR1_REG, 213 offset, 214 ABX500_GPIO_INPUT); 215 } 216 217 static int abx500_gpio_to_irq(struct gpio_chip *chip, unsigned offset) 218 { 219 struct abx500_pinctrl *pct = gpiochip_get_data(chip); 220 /* The AB8500 GPIO numbers are off by one */ 221 int gpio = offset + 1; 222 int hwirq; 223 int i; 224 225 for (i = 0; i < pct->irq_cluster_size; i++) { 226 struct abx500_gpio_irq_cluster *cluster = 227 &pct->irq_cluster[i]; 228 229 if (gpio >= cluster->start && gpio <= cluster->end) { 230 /* 231 * The ABx500 GPIO's associated IRQs are clustered together 232 * throughout the interrupt numbers at irregular intervals. 233 * To solve this quandry, we have placed the read-in values 234 * into the cluster information table. 235 */ 236 hwirq = gpio - cluster->start + cluster->to_irq; 237 return irq_create_mapping(pct->parent->domain, hwirq); 238 } 239 } 240 241 return -EINVAL; 242 } 243 244 static int abx500_set_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip, 245 unsigned gpio, int alt_setting) 246 { 247 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 248 struct alternate_functions af = pct->soc->alternate_functions[gpio]; 249 int ret; 250 int val; 251 unsigned offset; 252 253 const char *modes[] = { 254 [ABX500_DEFAULT] = "default", 255 [ABX500_ALT_A] = "altA", 256 [ABX500_ALT_B] = "altB", 257 [ABX500_ALT_C] = "altC", 258 }; 259 260 /* sanity check */ 261 if (((alt_setting == ABX500_ALT_A) && (af.gpiosel_bit == UNUSED)) || 262 ((alt_setting == ABX500_ALT_B) && (af.alt_bit1 == UNUSED)) || 263 ((alt_setting == ABX500_ALT_C) && (af.alt_bit2 == UNUSED))) { 264 dev_dbg(pct->dev, "pin %d doesn't support %s mode\n", gpio, 265 modes[alt_setting]); 266 return -EINVAL; 267 } 268 269 /* on ABx5xx, there is no GPIO0, so adjust the offset */ 270 offset = gpio - 1; 271 272 switch (alt_setting) { 273 case ABX500_DEFAULT: 274 /* 275 * for ABx5xx family, default mode is always selected by 276 * writing 0 to GPIOSELx register, except for pins which 277 * support at least ALT_B mode, default mode is selected 278 * by writing 1 to GPIOSELx register 279 */ 280 val = 0; 281 if (af.alt_bit1 != UNUSED) 282 val++; 283 284 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG, 285 offset, val); 286 break; 287 288 case ABX500_ALT_A: 289 /* 290 * for ABx5xx family, alt_a mode is always selected by 291 * writing 1 to GPIOSELx register, except for pins which 292 * support at least ALT_B mode, alt_a mode is selected 293 * by writing 0 to GPIOSELx register and 0 in ALTFUNC 294 * register 295 */ 296 if (af.alt_bit1 != UNUSED) { 297 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG, 298 offset, 0); 299 if (ret < 0) 300 goto out; 301 302 ret = abx500_gpio_set_bits(chip, 303 AB8500_GPIO_ALTFUN_REG, 304 af.alt_bit1, 305 !!(af.alta_val & BIT(0))); 306 if (ret < 0) 307 goto out; 308 309 if (af.alt_bit2 != UNUSED) 310 ret = abx500_gpio_set_bits(chip, 311 AB8500_GPIO_ALTFUN_REG, 312 af.alt_bit2, 313 !!(af.alta_val & BIT(1))); 314 } else 315 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG, 316 offset, 1); 317 break; 318 319 case ABX500_ALT_B: 320 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG, 321 offset, 0); 322 if (ret < 0) 323 goto out; 324 325 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG, 326 af.alt_bit1, !!(af.altb_val & BIT(0))); 327 if (ret < 0) 328 goto out; 329 330 if (af.alt_bit2 != UNUSED) 331 ret = abx500_gpio_set_bits(chip, 332 AB8500_GPIO_ALTFUN_REG, 333 af.alt_bit2, 334 !!(af.altb_val & BIT(1))); 335 break; 336 337 case ABX500_ALT_C: 338 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG, 339 offset, 0); 340 if (ret < 0) 341 goto out; 342 343 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG, 344 af.alt_bit2, !!(af.altc_val & BIT(0))); 345 if (ret < 0) 346 goto out; 347 348 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG, 349 af.alt_bit2, !!(af.altc_val & BIT(1))); 350 break; 351 352 default: 353 dev_dbg(pct->dev, "unknown alt_setting %d\n", alt_setting); 354 355 return -EINVAL; 356 } 357 out: 358 if (ret < 0) 359 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret); 360 361 return ret; 362 } 363 364 #ifdef CONFIG_DEBUG_FS 365 static int abx500_get_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip, 366 unsigned gpio) 367 { 368 u8 mode; 369 bool bit_mode; 370 bool alt_bit1; 371 bool alt_bit2; 372 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 373 struct alternate_functions af = pct->soc->alternate_functions[gpio]; 374 /* on ABx5xx, there is no GPIO0, so adjust the offset */ 375 unsigned offset = gpio - 1; 376 int ret; 377 378 /* 379 * if gpiosel_bit is set to unused, 380 * it means no GPIO or special case 381 */ 382 if (af.gpiosel_bit == UNUSED) 383 return ABX500_DEFAULT; 384 385 /* read GpioSelx register */ 386 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_SEL1_REG + (offset / 8), 387 af.gpiosel_bit, &bit_mode); 388 if (ret < 0) 389 goto out; 390 391 mode = bit_mode; 392 393 /* sanity check */ 394 if ((af.alt_bit1 < UNUSED) || (af.alt_bit1 > 7) || 395 (af.alt_bit2 < UNUSED) || (af.alt_bit2 > 7)) { 396 dev_err(pct->dev, 397 "alt_bitX value not in correct range (-1 to 7)\n"); 398 return -EINVAL; 399 } 400 401 /* if alt_bit2 is used, alt_bit1 must be used too */ 402 if ((af.alt_bit2 != UNUSED) && (af.alt_bit1 == UNUSED)) { 403 dev_err(pct->dev, 404 "if alt_bit2 is used, alt_bit1 can't be unused\n"); 405 return -EINVAL; 406 } 407 408 /* check if pin use AlternateFunction register */ 409 if ((af.alt_bit1 == UNUSED) && (af.alt_bit2 == UNUSED)) 410 return mode; 411 /* 412 * if pin GPIOSEL bit is set and pin supports alternate function, 413 * it means DEFAULT mode 414 */ 415 if (mode) 416 return ABX500_DEFAULT; 417 418 /* 419 * pin use the AlternatFunction register 420 * read alt_bit1 value 421 */ 422 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_ALTFUN_REG, 423 af.alt_bit1, &alt_bit1); 424 if (ret < 0) 425 goto out; 426 427 if (af.alt_bit2 != UNUSED) { 428 /* read alt_bit2 value */ 429 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_ALTFUN_REG, 430 af.alt_bit2, 431 &alt_bit2); 432 if (ret < 0) 433 goto out; 434 } else 435 alt_bit2 = 0; 436 437 mode = (alt_bit2 << 1) + alt_bit1; 438 if (mode == af.alta_val) 439 return ABX500_ALT_A; 440 else if (mode == af.altb_val) 441 return ABX500_ALT_B; 442 else 443 return ABX500_ALT_C; 444 445 out: 446 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret); 447 return ret; 448 } 449 450 static void abx500_gpio_dbg_show_one(struct seq_file *s, 451 struct pinctrl_dev *pctldev, 452 struct gpio_chip *chip, 453 unsigned offset, unsigned gpio) 454 { 455 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 456 const char *label = gpiochip_is_requested(chip, offset - 1); 457 u8 gpio_offset = offset - 1; 458 int mode = -1; 459 bool is_out; 460 bool pd; 461 int ret; 462 463 const char *modes[] = { 464 [ABX500_DEFAULT] = "default", 465 [ABX500_ALT_A] = "altA", 466 [ABX500_ALT_B] = "altB", 467 [ABX500_ALT_C] = "altC", 468 }; 469 470 const char *pull_up_down[] = { 471 [ABX500_GPIO_PULL_DOWN] = "pull down", 472 [ABX500_GPIO_PULL_NONE] = "pull none", 473 [ABX500_GPIO_PULL_NONE + 1] = "pull none", 474 [ABX500_GPIO_PULL_UP] = "pull up", 475 }; 476 477 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_DIR1_REG, 478 gpio_offset, &is_out); 479 if (ret < 0) 480 goto out; 481 482 seq_printf(s, " gpio-%-3d (%-20.20s) %-3s", 483 gpio, label ?: "(none)", 484 is_out ? "out" : "in "); 485 486 if (!is_out) { 487 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_PUD1_REG, 488 gpio_offset, &pd); 489 if (ret < 0) 490 goto out; 491 492 seq_printf(s, " %-9s", pull_up_down[pd]); 493 } else 494 seq_printf(s, " %-9s", chip->get(chip, offset) ? "hi" : "lo"); 495 496 mode = abx500_get_mode(pctldev, chip, offset); 497 498 seq_printf(s, " %s", (mode < 0) ? "unknown" : modes[mode]); 499 500 out: 501 if (ret < 0) 502 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret); 503 } 504 505 static void abx500_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) 506 { 507 unsigned i; 508 unsigned gpio = chip->base; 509 struct abx500_pinctrl *pct = gpiochip_get_data(chip); 510 struct pinctrl_dev *pctldev = pct->pctldev; 511 512 for (i = 0; i < chip->ngpio; i++, gpio++) { 513 /* On AB8500, there is no GPIO0, the first is the GPIO 1 */ 514 abx500_gpio_dbg_show_one(s, pctldev, chip, i + 1, gpio); 515 seq_putc(s, '\n'); 516 } 517 } 518 519 #else 520 static inline void abx500_gpio_dbg_show_one(struct seq_file *s, 521 struct pinctrl_dev *pctldev, 522 struct gpio_chip *chip, 523 unsigned offset, unsigned gpio) 524 { 525 } 526 #define abx500_gpio_dbg_show NULL 527 #endif 528 529 static const struct gpio_chip abx500gpio_chip = { 530 .label = "abx500-gpio", 531 .owner = THIS_MODULE, 532 .request = gpiochip_generic_request, 533 .free = gpiochip_generic_free, 534 .direction_input = abx500_gpio_direction_input, 535 .get = abx500_gpio_get, 536 .direction_output = abx500_gpio_direction_output, 537 .set = abx500_gpio_set, 538 .to_irq = abx500_gpio_to_irq, 539 .dbg_show = abx500_gpio_dbg_show, 540 }; 541 542 static int abx500_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev) 543 { 544 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 545 546 return pct->soc->nfunctions; 547 } 548 549 static const char *abx500_pmx_get_func_name(struct pinctrl_dev *pctldev, 550 unsigned function) 551 { 552 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 553 554 return pct->soc->functions[function].name; 555 } 556 557 static int abx500_pmx_get_func_groups(struct pinctrl_dev *pctldev, 558 unsigned function, 559 const char * const **groups, 560 unsigned * const num_groups) 561 { 562 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 563 564 *groups = pct->soc->functions[function].groups; 565 *num_groups = pct->soc->functions[function].ngroups; 566 567 return 0; 568 } 569 570 static int abx500_pmx_set(struct pinctrl_dev *pctldev, unsigned function, 571 unsigned group) 572 { 573 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 574 struct gpio_chip *chip = &pct->chip; 575 const struct abx500_pingroup *g; 576 int i; 577 int ret = 0; 578 579 g = &pct->soc->groups[group]; 580 if (g->altsetting < 0) 581 return -EINVAL; 582 583 dev_dbg(pct->dev, "enable group %s, %u pins\n", g->name, g->npins); 584 585 for (i = 0; i < g->npins; i++) { 586 dev_dbg(pct->dev, "setting pin %d to altsetting %d\n", 587 g->pins[i], g->altsetting); 588 589 ret = abx500_set_mode(pctldev, chip, g->pins[i], g->altsetting); 590 } 591 592 if (ret < 0) 593 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret); 594 595 return ret; 596 } 597 598 static int abx500_gpio_request_enable(struct pinctrl_dev *pctldev, 599 struct pinctrl_gpio_range *range, 600 unsigned offset) 601 { 602 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 603 const struct abx500_pinrange *p; 604 int ret; 605 int i; 606 607 /* 608 * Different ranges have different ways to enable GPIO function on a 609 * pin, so refer back to our local range type, where we handily define 610 * what altfunc enables GPIO for a certain pin. 611 */ 612 for (i = 0; i < pct->soc->gpio_num_ranges; i++) { 613 p = &pct->soc->gpio_ranges[i]; 614 if ((offset >= p->offset) && 615 (offset < (p->offset + p->npins))) 616 break; 617 } 618 619 if (i == pct->soc->gpio_num_ranges) { 620 dev_err(pct->dev, "%s failed to locate range\n", __func__); 621 return -ENODEV; 622 } 623 624 dev_dbg(pct->dev, "enable GPIO by altfunc %d at gpio %d\n", 625 p->altfunc, offset); 626 627 ret = abx500_set_mode(pct->pctldev, &pct->chip, 628 offset, p->altfunc); 629 if (ret < 0) 630 dev_err(pct->dev, "%s setting altfunc failed\n", __func__); 631 632 return ret; 633 } 634 635 static void abx500_gpio_disable_free(struct pinctrl_dev *pctldev, 636 struct pinctrl_gpio_range *range, 637 unsigned offset) 638 { 639 } 640 641 static const struct pinmux_ops abx500_pinmux_ops = { 642 .get_functions_count = abx500_pmx_get_funcs_cnt, 643 .get_function_name = abx500_pmx_get_func_name, 644 .get_function_groups = abx500_pmx_get_func_groups, 645 .set_mux = abx500_pmx_set, 646 .gpio_request_enable = abx500_gpio_request_enable, 647 .gpio_disable_free = abx500_gpio_disable_free, 648 }; 649 650 static int abx500_get_groups_cnt(struct pinctrl_dev *pctldev) 651 { 652 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 653 654 return pct->soc->ngroups; 655 } 656 657 static const char *abx500_get_group_name(struct pinctrl_dev *pctldev, 658 unsigned selector) 659 { 660 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 661 662 return pct->soc->groups[selector].name; 663 } 664 665 static int abx500_get_group_pins(struct pinctrl_dev *pctldev, 666 unsigned selector, 667 const unsigned **pins, 668 unsigned *num_pins) 669 { 670 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 671 672 *pins = pct->soc->groups[selector].pins; 673 *num_pins = pct->soc->groups[selector].npins; 674 675 return 0; 676 } 677 678 static void abx500_pin_dbg_show(struct pinctrl_dev *pctldev, 679 struct seq_file *s, unsigned offset) 680 { 681 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 682 struct gpio_chip *chip = &pct->chip; 683 684 abx500_gpio_dbg_show_one(s, pctldev, chip, offset, 685 chip->base + offset - 1); 686 } 687 688 static int abx500_dt_add_map_mux(struct pinctrl_map **map, 689 unsigned *reserved_maps, 690 unsigned *num_maps, const char *group, 691 const char *function) 692 { 693 if (*num_maps == *reserved_maps) 694 return -ENOSPC; 695 696 (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP; 697 (*map)[*num_maps].data.mux.group = group; 698 (*map)[*num_maps].data.mux.function = function; 699 (*num_maps)++; 700 701 return 0; 702 } 703 704 static int abx500_dt_add_map_configs(struct pinctrl_map **map, 705 unsigned *reserved_maps, 706 unsigned *num_maps, const char *group, 707 unsigned long *configs, unsigned num_configs) 708 { 709 unsigned long *dup_configs; 710 711 if (*num_maps == *reserved_maps) 712 return -ENOSPC; 713 714 dup_configs = kmemdup(configs, num_configs * sizeof(*dup_configs), 715 GFP_KERNEL); 716 if (!dup_configs) 717 return -ENOMEM; 718 719 (*map)[*num_maps].type = PIN_MAP_TYPE_CONFIGS_PIN; 720 721 (*map)[*num_maps].data.configs.group_or_pin = group; 722 (*map)[*num_maps].data.configs.configs = dup_configs; 723 (*map)[*num_maps].data.configs.num_configs = num_configs; 724 (*num_maps)++; 725 726 return 0; 727 } 728 729 static const char *abx500_find_pin_name(struct pinctrl_dev *pctldev, 730 const char *pin_name) 731 { 732 int i, pin_number; 733 struct abx500_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev); 734 735 if (sscanf((char *)pin_name, "GPIO%d", &pin_number) == 1) 736 for (i = 0; i < npct->soc->npins; i++) 737 if (npct->soc->pins[i].number == pin_number) 738 return npct->soc->pins[i].name; 739 return NULL; 740 } 741 742 static int abx500_dt_subnode_to_map(struct pinctrl_dev *pctldev, 743 struct device_node *np, 744 struct pinctrl_map **map, 745 unsigned *reserved_maps, 746 unsigned *num_maps) 747 { 748 int ret; 749 const char *function = NULL; 750 unsigned long *configs; 751 unsigned int nconfigs = 0; 752 struct property *prop; 753 754 ret = of_property_read_string(np, "function", &function); 755 if (ret >= 0) { 756 const char *group; 757 758 ret = of_property_count_strings(np, "groups"); 759 if (ret < 0) 760 goto exit; 761 762 ret = pinctrl_utils_reserve_map(pctldev, map, reserved_maps, 763 num_maps, ret); 764 if (ret < 0) 765 goto exit; 766 767 of_property_for_each_string(np, "groups", prop, group) { 768 ret = abx500_dt_add_map_mux(map, reserved_maps, 769 num_maps, group, function); 770 if (ret < 0) 771 goto exit; 772 } 773 } 774 775 ret = pinconf_generic_parse_dt_config(np, pctldev, &configs, &nconfigs); 776 if (nconfigs) { 777 const char *gpio_name; 778 const char *pin; 779 780 ret = of_property_count_strings(np, "pins"); 781 if (ret < 0) 782 goto exit; 783 784 ret = pinctrl_utils_reserve_map(pctldev, map, 785 reserved_maps, 786 num_maps, ret); 787 if (ret < 0) 788 goto exit; 789 790 of_property_for_each_string(np, "pins", prop, pin) { 791 gpio_name = abx500_find_pin_name(pctldev, pin); 792 793 ret = abx500_dt_add_map_configs(map, reserved_maps, 794 num_maps, gpio_name, configs, 1); 795 if (ret < 0) 796 goto exit; 797 } 798 } 799 800 exit: 801 return ret; 802 } 803 804 static int abx500_dt_node_to_map(struct pinctrl_dev *pctldev, 805 struct device_node *np_config, 806 struct pinctrl_map **map, unsigned *num_maps) 807 { 808 unsigned reserved_maps; 809 struct device_node *np; 810 int ret; 811 812 reserved_maps = 0; 813 *map = NULL; 814 *num_maps = 0; 815 816 for_each_child_of_node(np_config, np) { 817 ret = abx500_dt_subnode_to_map(pctldev, np, map, 818 &reserved_maps, num_maps); 819 if (ret < 0) { 820 pinctrl_utils_free_map(pctldev, *map, *num_maps); 821 of_node_put(np); 822 return ret; 823 } 824 } 825 826 return 0; 827 } 828 829 static const struct pinctrl_ops abx500_pinctrl_ops = { 830 .get_groups_count = abx500_get_groups_cnt, 831 .get_group_name = abx500_get_group_name, 832 .get_group_pins = abx500_get_group_pins, 833 .pin_dbg_show = abx500_pin_dbg_show, 834 .dt_node_to_map = abx500_dt_node_to_map, 835 .dt_free_map = pinctrl_utils_free_map, 836 }; 837 838 static int abx500_pin_config_get(struct pinctrl_dev *pctldev, 839 unsigned pin, 840 unsigned long *config) 841 { 842 return -ENOSYS; 843 } 844 845 static int abx500_pin_config_set(struct pinctrl_dev *pctldev, 846 unsigned pin, 847 unsigned long *configs, 848 unsigned num_configs) 849 { 850 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); 851 struct gpio_chip *chip = &pct->chip; 852 unsigned offset; 853 int ret = -EINVAL; 854 int i; 855 enum pin_config_param param; 856 enum pin_config_param argument; 857 858 for (i = 0; i < num_configs; i++) { 859 param = pinconf_to_config_param(configs[i]); 860 argument = pinconf_to_config_argument(configs[i]); 861 862 dev_dbg(chip->parent, "pin %d [%#lx]: %s %s\n", 863 pin, configs[i], 864 (param == PIN_CONFIG_OUTPUT) ? "output " : "input", 865 (param == PIN_CONFIG_OUTPUT) ? 866 (argument ? "high" : "low") : 867 (argument ? "pull up" : "pull down")); 868 869 /* on ABx500, there is no GPIO0, so adjust the offset */ 870 offset = pin - 1; 871 872 switch (param) { 873 case PIN_CONFIG_BIAS_DISABLE: 874 ret = abx500_gpio_direction_input(chip, offset); 875 if (ret < 0) 876 goto out; 877 878 /* Chip only supports pull down */ 879 ret = abx500_gpio_set_bits(chip, 880 AB8500_GPIO_PUD1_REG, offset, 881 ABX500_GPIO_PULL_NONE); 882 break; 883 884 case PIN_CONFIG_BIAS_PULL_DOWN: 885 ret = abx500_gpio_direction_input(chip, offset); 886 if (ret < 0) 887 goto out; 888 /* 889 * if argument = 1 set the pull down 890 * else clear the pull down 891 * Chip only supports pull down 892 */ 893 ret = abx500_gpio_set_bits(chip, 894 AB8500_GPIO_PUD1_REG, 895 offset, 896 argument ? ABX500_GPIO_PULL_DOWN : 897 ABX500_GPIO_PULL_NONE); 898 break; 899 900 case PIN_CONFIG_BIAS_PULL_UP: 901 ret = abx500_gpio_direction_input(chip, offset); 902 if (ret < 0) 903 goto out; 904 /* 905 * if argument = 1 set the pull up 906 * else clear the pull up 907 */ 908 ret = abx500_gpio_direction_input(chip, offset); 909 break; 910 911 case PIN_CONFIG_OUTPUT: 912 ret = abx500_gpio_direction_output(chip, offset, 913 argument); 914 break; 915 916 default: 917 dev_err(chip->parent, 918 "illegal configuration requested\n"); 919 } 920 } /* for each config */ 921 out: 922 if (ret < 0) 923 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret); 924 925 return ret; 926 } 927 928 static const struct pinconf_ops abx500_pinconf_ops = { 929 .pin_config_get = abx500_pin_config_get, 930 .pin_config_set = abx500_pin_config_set, 931 .is_generic = true, 932 }; 933 934 static struct pinctrl_desc abx500_pinctrl_desc = { 935 .name = "pinctrl-abx500", 936 .pctlops = &abx500_pinctrl_ops, 937 .pmxops = &abx500_pinmux_ops, 938 .confops = &abx500_pinconf_ops, 939 .owner = THIS_MODULE, 940 }; 941 942 static int abx500_get_gpio_num(struct abx500_pinctrl_soc_data *soc) 943 { 944 unsigned int lowest = 0; 945 unsigned int highest = 0; 946 unsigned int npins = 0; 947 int i; 948 949 /* 950 * Compute number of GPIOs from the last SoC gpio range descriptors 951 * These ranges may include "holes" but the GPIO number space shall 952 * still be homogeneous, so we need to detect and account for any 953 * such holes so that these are included in the number of GPIO pins. 954 */ 955 for (i = 0; i < soc->gpio_num_ranges; i++) { 956 unsigned gstart; 957 unsigned gend; 958 const struct abx500_pinrange *p; 959 960 p = &soc->gpio_ranges[i]; 961 gstart = p->offset; 962 gend = p->offset + p->npins - 1; 963 964 if (i == 0) { 965 /* First iteration, set start values */ 966 lowest = gstart; 967 highest = gend; 968 } else { 969 if (gstart < lowest) 970 lowest = gstart; 971 if (gend > highest) 972 highest = gend; 973 } 974 } 975 /* this gives the absolute number of pins */ 976 npins = highest - lowest + 1; 977 return npins; 978 } 979 980 static const struct of_device_id abx500_gpio_match[] = { 981 { .compatible = "stericsson,ab8500-gpio", .data = (void *)PINCTRL_AB8500, }, 982 { .compatible = "stericsson,ab8505-gpio", .data = (void *)PINCTRL_AB8505, }, 983 { } 984 }; 985 986 static int abx500_gpio_probe(struct platform_device *pdev) 987 { 988 struct device_node *np = pdev->dev.of_node; 989 struct abx500_pinctrl *pct; 990 unsigned int id = -1; 991 int ret; 992 int i; 993 994 if (!np) { 995 dev_err(&pdev->dev, "gpio dt node missing\n"); 996 return -ENODEV; 997 } 998 999 pct = devm_kzalloc(&pdev->dev, sizeof(*pct), GFP_KERNEL); 1000 if (!pct) 1001 return -ENOMEM; 1002 1003 pct->dev = &pdev->dev; 1004 pct->parent = dev_get_drvdata(pdev->dev.parent); 1005 pct->chip = abx500gpio_chip; 1006 pct->chip.parent = &pdev->dev; 1007 pct->chip.base = -1; /* Dynamic allocation */ 1008 1009 id = (unsigned long)device_get_match_data(&pdev->dev); 1010 1011 /* Poke in other ASIC variants here */ 1012 switch (id) { 1013 case PINCTRL_AB8500: 1014 abx500_pinctrl_ab8500_init(&pct->soc); 1015 break; 1016 case PINCTRL_AB8505: 1017 abx500_pinctrl_ab8505_init(&pct->soc); 1018 break; 1019 default: 1020 dev_err(&pdev->dev, "Unsupported pinctrl sub driver (%d)\n", id); 1021 return -EINVAL; 1022 } 1023 1024 if (!pct->soc) { 1025 dev_err(&pdev->dev, "Invalid SOC data\n"); 1026 return -EINVAL; 1027 } 1028 1029 pct->chip.ngpio = abx500_get_gpio_num(pct->soc); 1030 pct->irq_cluster = pct->soc->gpio_irq_cluster; 1031 pct->irq_cluster_size = pct->soc->ngpio_irq_cluster; 1032 1033 ret = gpiochip_add_data(&pct->chip, pct); 1034 if (ret) { 1035 dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret); 1036 return ret; 1037 } 1038 dev_info(&pdev->dev, "added gpiochip\n"); 1039 1040 abx500_pinctrl_desc.pins = pct->soc->pins; 1041 abx500_pinctrl_desc.npins = pct->soc->npins; 1042 pct->pctldev = devm_pinctrl_register(&pdev->dev, &abx500_pinctrl_desc, 1043 pct); 1044 if (IS_ERR(pct->pctldev)) { 1045 dev_err(&pdev->dev, 1046 "could not register abx500 pinctrl driver\n"); 1047 ret = PTR_ERR(pct->pctldev); 1048 goto out_rem_chip; 1049 } 1050 dev_info(&pdev->dev, "registered pin controller\n"); 1051 1052 /* We will handle a range of GPIO pins */ 1053 for (i = 0; i < pct->soc->gpio_num_ranges; i++) { 1054 const struct abx500_pinrange *p = &pct->soc->gpio_ranges[i]; 1055 1056 ret = gpiochip_add_pin_range(&pct->chip, 1057 dev_name(&pdev->dev), 1058 p->offset - 1, p->offset, p->npins); 1059 if (ret < 0) 1060 goto out_rem_chip; 1061 } 1062 1063 platform_set_drvdata(pdev, pct); 1064 dev_info(&pdev->dev, "initialized abx500 pinctrl driver\n"); 1065 1066 return 0; 1067 1068 out_rem_chip: 1069 gpiochip_remove(&pct->chip); 1070 return ret; 1071 } 1072 1073 /** 1074 * abx500_gpio_remove() - remove Ab8500-gpio driver 1075 * @pdev: Platform device registered 1076 */ 1077 static void abx500_gpio_remove(struct platform_device *pdev) 1078 { 1079 struct abx500_pinctrl *pct = platform_get_drvdata(pdev); 1080 1081 gpiochip_remove(&pct->chip); 1082 } 1083 1084 static struct platform_driver abx500_gpio_driver = { 1085 .driver = { 1086 .name = "abx500-gpio", 1087 .of_match_table = abx500_gpio_match, 1088 }, 1089 .probe = abx500_gpio_probe, 1090 .remove_new = abx500_gpio_remove, 1091 }; 1092 1093 static int __init abx500_gpio_init(void) 1094 { 1095 return platform_driver_register(&abx500_gpio_driver); 1096 } 1097 core_initcall(abx500_gpio_init); 1098