106763c74SThomas Petazzoni /* 206763c74SThomas Petazzoni * Marvell Armada XP pinctrl driver based on mvebu pinctrl core 306763c74SThomas Petazzoni * 406763c74SThomas Petazzoni * Copyright (C) 2012 Marvell 506763c74SThomas Petazzoni * 606763c74SThomas Petazzoni * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 706763c74SThomas Petazzoni * 806763c74SThomas Petazzoni * This program is free software; you can redistribute it and/or modify 906763c74SThomas Petazzoni * it under the terms of the GNU General Public License as published by 1006763c74SThomas Petazzoni * the Free Software Foundation; either version 2 of the License, or 1106763c74SThomas Petazzoni * (at your option) any later version. 1206763c74SThomas Petazzoni * 1306763c74SThomas Petazzoni * This file supports the three variants of Armada XP SoCs that are 1406763c74SThomas Petazzoni * available: mv78230, mv78260 and mv78460. From a pin muxing 1506763c74SThomas Petazzoni * perspective, the mv78230 has 49 MPP pins. The mv78260 and mv78460 1606763c74SThomas Petazzoni * both have 67 MPP pins (more GPIOs and address lines for the memory 1780b3d04fSThomas Petazzoni * bus mainly). 1806763c74SThomas Petazzoni */ 1906763c74SThomas Petazzoni 2006763c74SThomas Petazzoni #include <linux/err.h> 2106763c74SThomas Petazzoni #include <linux/init.h> 2206763c74SThomas Petazzoni #include <linux/io.h> 2306763c74SThomas Petazzoni #include <linux/platform_device.h> 2406763c74SThomas Petazzoni #include <linux/clk.h> 2506763c74SThomas Petazzoni #include <linux/of.h> 2606763c74SThomas Petazzoni #include <linux/of_device.h> 2706763c74SThomas Petazzoni #include <linux/pinctrl/pinctrl.h> 2806763c74SThomas Petazzoni #include <linux/bitops.h> 2906763c74SThomas Petazzoni 3006763c74SThomas Petazzoni #include "pinctrl-mvebu.h" 3106763c74SThomas Petazzoni 3212149a20SThomas Petazzoni static u32 *mpp_saved_regs; 33ad2a4f2bSSebastian Hesselbarth 3406763c74SThomas Petazzoni enum armada_xp_variant { 3506763c74SThomas Petazzoni V_MV78230 = BIT(0), 3606763c74SThomas Petazzoni V_MV78260 = BIT(1), 3706763c74SThomas Petazzoni V_MV78460 = BIT(2), 3806763c74SThomas Petazzoni V_MV78230_PLUS = (V_MV78230 | V_MV78260 | V_MV78460), 3906763c74SThomas Petazzoni V_MV78260_PLUS = (V_MV78260 | V_MV78460), 40d7ae8f8dSKalyan Kinthada V_98DX3236 = BIT(3), 41d7ae8f8dSKalyan Kinthada V_98DX3336 = BIT(4), 42d7ae8f8dSKalyan Kinthada V_98DX4251 = BIT(5), 43d7ae8f8dSKalyan Kinthada V_98DX3236_PLUS = (V_98DX3236 | V_98DX3336 | V_98DX4251), 4406763c74SThomas Petazzoni }; 4506763c74SThomas Petazzoni 4606763c74SThomas Petazzoni static struct mvebu_mpp_mode armada_xp_mpp_modes[] = { 4706763c74SThomas Petazzoni MPP_MODE(0, 4806763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 49a361cbc5SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "txclkout", V_MV78230_PLUS), 5006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d0", V_MV78230_PLUS)), 5106763c74SThomas Petazzoni MPP_MODE(1, 5206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 5306763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "txd0", V_MV78230_PLUS), 5406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d1", V_MV78230_PLUS)), 5506763c74SThomas Petazzoni MPP_MODE(2, 5606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 5706763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "txd1", V_MV78230_PLUS), 5806763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d2", V_MV78230_PLUS)), 5906763c74SThomas Petazzoni MPP_MODE(3, 6006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 6106763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "txd2", V_MV78230_PLUS), 6206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d3", V_MV78230_PLUS)), 6306763c74SThomas Petazzoni MPP_MODE(4, 6406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 6506763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "txd3", V_MV78230_PLUS), 6606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d4", V_MV78230_PLUS)), 6706763c74SThomas Petazzoni MPP_MODE(5, 6806763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 6906763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "txctl", V_MV78230_PLUS), 7006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d5", V_MV78230_PLUS)), 7106763c74SThomas Petazzoni MPP_MODE(6, 7206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 7306763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "rxd0", V_MV78230_PLUS), 7406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d6", V_MV78230_PLUS)), 7506763c74SThomas Petazzoni MPP_MODE(7, 7606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 7706763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "rxd1", V_MV78230_PLUS), 7806763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d7", V_MV78230_PLUS)), 7906763c74SThomas Petazzoni MPP_MODE(8, 8006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 8106763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "rxd2", V_MV78230_PLUS), 8206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d8", V_MV78230_PLUS)), 8306763c74SThomas Petazzoni MPP_MODE(9, 8406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 8506763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "rxd3", V_MV78230_PLUS), 8606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d9", V_MV78230_PLUS)), 8706763c74SThomas Petazzoni MPP_MODE(10, 8806763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 8906763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "rxctl", V_MV78230_PLUS), 9006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d10", V_MV78230_PLUS)), 9106763c74SThomas Petazzoni MPP_MODE(11, 9206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 9306763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "rxclk", V_MV78230_PLUS), 9406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d11", V_MV78230_PLUS)), 9506763c74SThomas Petazzoni MPP_MODE(12, 9606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 9706763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "txd4", V_MV78230_PLUS), 98a361cbc5SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "ge1", "txclkout", V_MV78230_PLUS), 9906763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d12", V_MV78230_PLUS)), 10006763c74SThomas Petazzoni MPP_MODE(13, 10106763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 10206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "txd5", V_MV78230_PLUS), 10306763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "ge1", "txd0", V_MV78230_PLUS), 10488b355f1SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "spi1", "mosi", V_MV78230_PLUS), 10506763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d13", V_MV78230_PLUS)), 10606763c74SThomas Petazzoni MPP_MODE(14, 10706763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 10806763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "txd6", V_MV78230_PLUS), 10906763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "ge1", "txd1", V_MV78230_PLUS), 11088b355f1SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "spi1", "sck", V_MV78230_PLUS), 11106763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d14", V_MV78230_PLUS)), 11206763c74SThomas Petazzoni MPP_MODE(15, 11306763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 11406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "txd7", V_MV78230_PLUS), 11506763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "ge1", "txd2", V_MV78230_PLUS), 11606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d15", V_MV78230_PLUS)), 11706763c74SThomas Petazzoni MPP_MODE(16, 11806763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 11906763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "txclk", V_MV78230_PLUS), 12006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "ge1", "txd3", V_MV78230_PLUS), 12188b355f1SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "spi1", "cs0", V_MV78230_PLUS), 12206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d16", V_MV78230_PLUS)), 12306763c74SThomas Petazzoni MPP_MODE(17, 12406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 12506763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "col", V_MV78230_PLUS), 12606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "ge1", "txctl", V_MV78230_PLUS), 12788b355f1SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "spi1", "miso", V_MV78230_PLUS), 12806763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d17", V_MV78230_PLUS)), 12906763c74SThomas Petazzoni MPP_MODE(18, 13006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 13106763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "rxerr", V_MV78230_PLUS), 13206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "ge1", "rxd0", V_MV78230_PLUS), 13306763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "ptp", "trig", V_MV78230_PLUS), 13406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d18", V_MV78230_PLUS)), 13506763c74SThomas Petazzoni MPP_MODE(19, 13606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 13706763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "crs", V_MV78230_PLUS), 13806763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "ge1", "rxd1", V_MV78230_PLUS), 13906763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "ptp", "evreq", V_MV78230_PLUS), 14006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d19", V_MV78230_PLUS)), 14106763c74SThomas Petazzoni MPP_MODE(20, 14206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 14306763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "rxd4", V_MV78230_PLUS), 14406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "ge1", "rxd2", V_MV78230_PLUS), 14506763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "ptp", "clk", V_MV78230_PLUS), 14606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d20", V_MV78230_PLUS)), 14706763c74SThomas Petazzoni MPP_MODE(21, 14806763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 14906763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "rxd5", V_MV78230_PLUS), 15006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "ge1", "rxd3", V_MV78230_PLUS), 151100dc5d8SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "dram", "bat", V_MV78230_PLUS), 15206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d21", V_MV78230_PLUS)), 15306763c74SThomas Petazzoni MPP_MODE(22, 15406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 15506763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "rxd6", V_MV78230_PLUS), 15606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "ge1", "rxctl", V_MV78230_PLUS), 15706763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "sata0", "prsnt", V_MV78230_PLUS), 15806763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d22", V_MV78230_PLUS)), 15906763c74SThomas Petazzoni MPP_MODE(23, 16006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 16106763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "rxd7", V_MV78230_PLUS), 16206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "ge1", "rxclk", V_MV78230_PLUS), 16306763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "sata1", "prsnt", V_MV78230_PLUS), 16406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d23", V_MV78230_PLUS)), 16506763c74SThomas Petazzoni MPP_MODE(24, 16606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 16706763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "sata1", "prsnt", V_MV78230_PLUS), 16806763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "tdm", "rst", V_MV78230_PLUS), 16906763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "hsync", V_MV78230_PLUS)), 17006763c74SThomas Petazzoni MPP_MODE(25, 17106763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 17206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "sata0", "prsnt", V_MV78230_PLUS), 17306763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "tdm", "pclk", V_MV78230_PLUS), 17406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "vsync", V_MV78230_PLUS)), 17506763c74SThomas Petazzoni MPP_MODE(26, 17606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 17706763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "tdm", "fsync", V_MV78230_PLUS), 17880b3d04fSThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "clk", V_MV78230_PLUS)), 17906763c74SThomas Petazzoni MPP_MODE(27, 18006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 18106763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ptp", "trig", V_MV78230_PLUS), 18206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "tdm", "dtx", V_MV78230_PLUS), 18306763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "e", V_MV78230_PLUS)), 18406763c74SThomas Petazzoni MPP_MODE(28, 18506763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 18606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ptp", "evreq", V_MV78230_PLUS), 18706763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "tdm", "drx", V_MV78230_PLUS), 18806763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "pwm", V_MV78230_PLUS)), 18906763c74SThomas Petazzoni MPP_MODE(29, 19006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 19106763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ptp", "clk", V_MV78230_PLUS), 19206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "tdm", "int0", V_MV78230_PLUS), 19380b3d04fSThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "ref-clk", V_MV78230_PLUS)), 19406763c74SThomas Petazzoni MPP_MODE(30, 19506763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 19606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "sd0", "clk", V_MV78230_PLUS), 19706763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "tdm", "int1", V_MV78230_PLUS)), 19806763c74SThomas Petazzoni MPP_MODE(31, 19906763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 20006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "sd0", "cmd", V_MV78230_PLUS), 20180b3d04fSThomas Petazzoni MPP_VAR_FUNCTION(0x3, "tdm", "int2", V_MV78230_PLUS)), 20206763c74SThomas Petazzoni MPP_MODE(32, 20306763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 20406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "sd0", "d0", V_MV78230_PLUS), 20580b3d04fSThomas Petazzoni MPP_VAR_FUNCTION(0x3, "tdm", "int3", V_MV78230_PLUS)), 20606763c74SThomas Petazzoni MPP_MODE(33, 20706763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 20806763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "sd0", "d1", V_MV78230_PLUS), 20906763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "tdm", "int4", V_MV78230_PLUS), 210b19bf379SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "dram", "bat", V_MV78230_PLUS), 211b19bf379SThomas Petazzoni MPP_VAR_FUNCTION(0x5, "dram", "vttctrl", V_MV78230_PLUS)), 21206763c74SThomas Petazzoni MPP_MODE(34, 21306763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 21406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "sd0", "d2", V_MV78230_PLUS), 21506763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "sata0", "prsnt", V_MV78230_PLUS), 216b19bf379SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "tdm", "int5", V_MV78230_PLUS), 217b19bf379SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "dram", "deccerr", V_MV78230_PLUS)), 21806763c74SThomas Petazzoni MPP_MODE(35, 21906763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 22006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "sd0", "d3", V_MV78230_PLUS), 22106763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "sata1", "prsnt", V_MV78230_PLUS), 22206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "tdm", "int6", V_MV78230_PLUS)), 22306763c74SThomas Petazzoni MPP_MODE(36, 22406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 22550a7d13dSThomas Petazzoni MPP_VAR_FUNCTION(0x1, "spi0", "mosi", V_MV78230_PLUS)), 22606763c74SThomas Petazzoni MPP_MODE(37, 22706763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 22850a7d13dSThomas Petazzoni MPP_VAR_FUNCTION(0x1, "spi0", "miso", V_MV78230_PLUS)), 22906763c74SThomas Petazzoni MPP_MODE(38, 23006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 23150a7d13dSThomas Petazzoni MPP_VAR_FUNCTION(0x1, "spi0", "sck", V_MV78230_PLUS)), 23206763c74SThomas Petazzoni MPP_MODE(39, 23306763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 23450a7d13dSThomas Petazzoni MPP_VAR_FUNCTION(0x1, "spi0", "cs0", V_MV78230_PLUS)), 23506763c74SThomas Petazzoni MPP_MODE(40, 23606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 23750a7d13dSThomas Petazzoni MPP_VAR_FUNCTION(0x1, "spi0", "cs1", V_MV78230_PLUS), 23806763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "uart2", "cts", V_MV78230_PLUS), 23906763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "vga-hsync", V_MV78230_PLUS), 24088b355f1SThomas Petazzoni MPP_VAR_FUNCTION(0x5, "pcie", "clkreq0", V_MV78230_PLUS), 24188b355f1SThomas Petazzoni MPP_VAR_FUNCTION(0x6, "spi1", "cs1", V_MV78230_PLUS)), 24206763c74SThomas Petazzoni MPP_MODE(41, 24306763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 24450a7d13dSThomas Petazzoni MPP_VAR_FUNCTION(0x1, "spi0", "cs2", V_MV78230_PLUS), 24506763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "uart2", "rts", V_MV78230_PLUS), 24606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "sata1", "prsnt", V_MV78230_PLUS), 24706763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "vga-vsync", V_MV78230_PLUS), 24888b355f1SThomas Petazzoni MPP_VAR_FUNCTION(0x5, "pcie", "clkreq1", V_MV78230_PLUS), 24988b355f1SThomas Petazzoni MPP_VAR_FUNCTION(0x6, "spi1", "cs2", V_MV78230_PLUS)), 25006763c74SThomas Petazzoni MPP_MODE(42, 25106763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 25206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "uart2", "rxd", V_MV78230_PLUS), 25306763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "uart0", "cts", V_MV78230_PLUS), 25406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "tdm", "int7", V_MV78230_PLUS), 255dae5597fSThomas Petazzoni MPP_VAR_FUNCTION(0x4, "tdm", "timer", V_MV78230_PLUS)), 25606763c74SThomas Petazzoni MPP_MODE(43, 25706763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 25806763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "uart2", "txd", V_MV78230_PLUS), 25906763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "uart0", "rts", V_MV78230_PLUS), 26050a7d13dSThomas Petazzoni MPP_VAR_FUNCTION(0x3, "spi0", "cs3", V_MV78230_PLUS), 26188b355f1SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "pcie", "rstout", V_MV78230_PLUS), 26288b355f1SThomas Petazzoni MPP_VAR_FUNCTION(0x6, "spi1", "cs3", V_MV78230_PLUS)), 26306763c74SThomas Petazzoni MPP_MODE(44, 26406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 26506763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "uart2", "cts", V_MV78230_PLUS), 26606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "uart3", "rxd", V_MV78230_PLUS), 26750a7d13dSThomas Petazzoni MPP_VAR_FUNCTION(0x3, "spi0", "cs4", V_MV78230_PLUS), 268100dc5d8SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "dram", "bat", V_MV78230_PLUS), 26988b355f1SThomas Petazzoni MPP_VAR_FUNCTION(0x5, "pcie", "clkreq2", V_MV78230_PLUS), 27088b355f1SThomas Petazzoni MPP_VAR_FUNCTION(0x6, "spi1", "cs4", V_MV78230_PLUS)), 27106763c74SThomas Petazzoni MPP_MODE(45, 27206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 27306763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "uart2", "rts", V_MV78230_PLUS), 27406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "uart3", "txd", V_MV78230_PLUS), 27550a7d13dSThomas Petazzoni MPP_VAR_FUNCTION(0x3, "spi0", "cs5", V_MV78230_PLUS), 27688b355f1SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "sata1", "prsnt", V_MV78230_PLUS), 277b19bf379SThomas Petazzoni MPP_VAR_FUNCTION(0x5, "dram", "vttctrl", V_MV78230_PLUS), 27888b355f1SThomas Petazzoni MPP_VAR_FUNCTION(0x6, "spi1", "cs5", V_MV78230_PLUS)), 27906763c74SThomas Petazzoni MPP_MODE(46, 28006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 28106763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "uart3", "rts", V_MV78230_PLUS), 28206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "uart1", "rts", V_MV78230_PLUS), 28350a7d13dSThomas Petazzoni MPP_VAR_FUNCTION(0x3, "spi0", "cs6", V_MV78230_PLUS), 28488b355f1SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "sata0", "prsnt", V_MV78230_PLUS), 28588b355f1SThomas Petazzoni MPP_VAR_FUNCTION(0x6, "spi1", "cs6", V_MV78230_PLUS)), 28606763c74SThomas Petazzoni MPP_MODE(47, 28706763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 28806763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "uart3", "cts", V_MV78230_PLUS), 28906763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "uart1", "cts", V_MV78230_PLUS), 29050a7d13dSThomas Petazzoni MPP_VAR_FUNCTION(0x3, "spi0", "cs7", V_MV78230_PLUS), 29106763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "ref", "clkout", V_MV78230_PLUS), 29288b355f1SThomas Petazzoni MPP_VAR_FUNCTION(0x5, "pcie", "clkreq3", V_MV78230_PLUS), 29388b355f1SThomas Petazzoni MPP_VAR_FUNCTION(0x6, "spi1", "cs7", V_MV78230_PLUS)), 29406763c74SThomas Petazzoni MPP_MODE(48, 29506763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 296ea78b951SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "dev", "clkout", V_MV78230_PLUS), 297fb53b61dSThomas Petazzoni MPP_VAR_FUNCTION(0x2, "dev", "burst/last", V_MV78230_PLUS), 298fb53b61dSThomas Petazzoni MPP_VAR_FUNCTION(0x3, "nand", "rb", V_MV78230_PLUS)), 29906763c74SThomas Petazzoni MPP_MODE(49, 30006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS), 30106763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "dev", "we3", V_MV78260_PLUS)), 30206763c74SThomas Petazzoni MPP_MODE(50, 30306763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS), 30406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "dev", "we2", V_MV78260_PLUS)), 30506763c74SThomas Petazzoni MPP_MODE(51, 30606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS), 30706763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "dev", "ad16", V_MV78260_PLUS)), 30806763c74SThomas Petazzoni MPP_MODE(52, 30906763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS), 31006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "dev", "ad17", V_MV78260_PLUS)), 31106763c74SThomas Petazzoni MPP_MODE(53, 31206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS), 31306763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "dev", "ad18", V_MV78260_PLUS)), 31406763c74SThomas Petazzoni MPP_MODE(54, 31506763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS), 31606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "dev", "ad19", V_MV78260_PLUS)), 31706763c74SThomas Petazzoni MPP_MODE(55, 31806763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS), 31980b3d04fSThomas Petazzoni MPP_VAR_FUNCTION(0x1, "dev", "ad20", V_MV78260_PLUS)), 32006763c74SThomas Petazzoni MPP_MODE(56, 32106763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS), 32280b3d04fSThomas Petazzoni MPP_VAR_FUNCTION(0x1, "dev", "ad21", V_MV78260_PLUS)), 32306763c74SThomas Petazzoni MPP_MODE(57, 32406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS), 32580b3d04fSThomas Petazzoni MPP_VAR_FUNCTION(0x1, "dev", "ad22", V_MV78260_PLUS)), 32606763c74SThomas Petazzoni MPP_MODE(58, 32706763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS), 32806763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "dev", "ad23", V_MV78260_PLUS)), 32906763c74SThomas Petazzoni MPP_MODE(59, 33006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS), 33106763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "dev", "ad24", V_MV78260_PLUS)), 33206763c74SThomas Petazzoni MPP_MODE(60, 33306763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS), 33406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "dev", "ad25", V_MV78260_PLUS)), 33506763c74SThomas Petazzoni MPP_MODE(61, 33606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS), 33706763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "dev", "ad26", V_MV78260_PLUS)), 33806763c74SThomas Petazzoni MPP_MODE(62, 33906763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS), 34006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "dev", "ad27", V_MV78260_PLUS)), 34106763c74SThomas Petazzoni MPP_MODE(63, 34206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS), 34306763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "dev", "ad28", V_MV78260_PLUS)), 34406763c74SThomas Petazzoni MPP_MODE(64, 34506763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS), 34606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "dev", "ad29", V_MV78260_PLUS)), 34706763c74SThomas Petazzoni MPP_MODE(65, 34806763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS), 34906763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "dev", "ad30", V_MV78260_PLUS)), 35006763c74SThomas Petazzoni MPP_MODE(66, 35106763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS), 35206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "dev", "ad31", V_MV78260_PLUS)), 35306763c74SThomas Petazzoni }; 35406763c74SThomas Petazzoni 355d7ae8f8dSKalyan Kinthada static struct mvebu_mpp_mode mv98dx3236_mpp_modes[] = { 356d7ae8f8dSKalyan Kinthada MPP_MODE(0, 357d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), 358d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x2, "spi0", "mosi", V_98DX3236_PLUS), 359d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x4, "dev", "ad8", V_98DX3236_PLUS)), 360d7ae8f8dSKalyan Kinthada MPP_MODE(1, 361d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS), 362d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x2, "spi0", "miso", V_98DX3236_PLUS), 363d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x4, "dev", "ad9", V_98DX3236_PLUS)), 364d7ae8f8dSKalyan Kinthada MPP_MODE(2, 365d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), 366d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x2, "spi0", "sck", V_98DX3236_PLUS), 367d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x4, "dev", "ad10", V_98DX3236_PLUS)), 368d7ae8f8dSKalyan Kinthada MPP_MODE(3, 369d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS), 370d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x2, "spi0", "cs0", V_98DX3236_PLUS), 371d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x4, "dev", "ad11", V_98DX3236_PLUS)), 372d7ae8f8dSKalyan Kinthada MPP_MODE(4, 373d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS), 374d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x2, "spi0", "cs1", V_98DX3236_PLUS), 375d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x3, "smi", "mdc", V_98DX3236_PLUS), 376d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x4, "dev", "cs0", V_98DX3236_PLUS)), 377d7ae8f8dSKalyan Kinthada MPP_MODE(5, 378d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS), 379d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x1, "pex", "rsto", V_98DX3236_PLUS), 380d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x2, "sd0", "cmd", V_98DX4251), 381d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x4, "dev", "bootcs", V_98DX3236_PLUS)), 382d7ae8f8dSKalyan Kinthada MPP_MODE(6, 383d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), 384d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x2, "sd0", "clk", V_98DX4251), 385d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x4, "dev", "a2", V_98DX3236_PLUS)), 386d7ae8f8dSKalyan Kinthada MPP_MODE(7, 387d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS), 388d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x2, "sd0", "d0", V_98DX4251), 389d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x4, "dev", "ale0", V_98DX3236_PLUS)), 390d7ae8f8dSKalyan Kinthada MPP_MODE(8, 391d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS), 392d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x2, "sd0", "d1", V_98DX4251), 393d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x4, "dev", "ale1", V_98DX3236_PLUS)), 394d7ae8f8dSKalyan Kinthada MPP_MODE(9, 395d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS), 396d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x2, "sd0", "d2", V_98DX4251), 397d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x4, "dev", "ready0", V_98DX3236_PLUS)), 398d7ae8f8dSKalyan Kinthada MPP_MODE(10, 399d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS), 400d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x2, "sd0", "d3", V_98DX4251), 401d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x4, "dev", "ad12", V_98DX3236_PLUS)), 402d7ae8f8dSKalyan Kinthada MPP_MODE(11, 403d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS), 404d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x2, "uart1", "rxd", V_98DX3236_PLUS), 405d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x3, "uart0", "cts", V_98DX3236_PLUS), 406d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x4, "dev", "ad13", V_98DX3236_PLUS)), 407d7ae8f8dSKalyan Kinthada MPP_MODE(12, 408d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), 409d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x2, "uart1", "txd", V_98DX3236_PLUS), 410d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x3, "uart0", "rts", V_98DX3236_PLUS), 411d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x4, "dev", "ad14", V_98DX3236_PLUS)), 412d7ae8f8dSKalyan Kinthada MPP_MODE(13, 413d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS), 414d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x1, "intr", "out", V_98DX3236_PLUS), 415d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x4, "dev", "ad15", V_98DX3236_PLUS)), 416d7ae8f8dSKalyan Kinthada MPP_MODE(14, 417d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS), 418d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x1, "i2c0", "sck", V_98DX3236_PLUS)), 419d7ae8f8dSKalyan Kinthada MPP_MODE(15, 420d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS), 421d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x4, "i2c0", "sda", V_98DX3236_PLUS)), 422d7ae8f8dSKalyan Kinthada MPP_MODE(16, 423d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), 424d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x4, "dev", "oe", V_98DX3236_PLUS)), 425d7ae8f8dSKalyan Kinthada MPP_MODE(17, 426d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), 427d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x4, "dev", "clkout", V_98DX3236_PLUS)), 428d7ae8f8dSKalyan Kinthada MPP_MODE(18, 429d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS), 430d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x3, "uart1", "txd", V_98DX3236_PLUS)), 431d7ae8f8dSKalyan Kinthada MPP_MODE(19, 432d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS), 433d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x3, "uart1", "rxd", V_98DX3236_PLUS), 434*f61f5a21SChris Packham MPP_VAR_FUNCTION(0x4, "nand", "rb", V_98DX3236_PLUS)), 435d7ae8f8dSKalyan Kinthada MPP_MODE(20, 436d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), 437d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x4, "dev", "we0", V_98DX3236_PLUS)), 438d7ae8f8dSKalyan Kinthada MPP_MODE(21, 439d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), 440c3234d3bSChris Packham MPP_VAR_FUNCTION(0x4, "dev", "ad0", V_98DX3236_PLUS)), 441d7ae8f8dSKalyan Kinthada MPP_MODE(22, 442d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), 443c3234d3bSChris Packham MPP_VAR_FUNCTION(0x4, "dev", "ad1", V_98DX3236_PLUS)), 444d7ae8f8dSKalyan Kinthada MPP_MODE(23, 445d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), 446c3234d3bSChris Packham MPP_VAR_FUNCTION(0x4, "dev", "ad2", V_98DX3236_PLUS)), 447d7ae8f8dSKalyan Kinthada MPP_MODE(24, 448d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), 449c3234d3bSChris Packham MPP_VAR_FUNCTION(0x4, "dev", "ad3", V_98DX3236_PLUS)), 450d7ae8f8dSKalyan Kinthada MPP_MODE(25, 451d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), 452c3234d3bSChris Packham MPP_VAR_FUNCTION(0x4, "dev", "ad4", V_98DX3236_PLUS)), 453d7ae8f8dSKalyan Kinthada MPP_MODE(26, 454d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), 455c3234d3bSChris Packham MPP_VAR_FUNCTION(0x4, "dev", "ad5", V_98DX3236_PLUS)), 456d7ae8f8dSKalyan Kinthada MPP_MODE(27, 457d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), 458c3234d3bSChris Packham MPP_VAR_FUNCTION(0x4, "dev", "ad6", V_98DX3236_PLUS)), 459d7ae8f8dSKalyan Kinthada MPP_MODE(28, 460d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), 461c3234d3bSChris Packham MPP_VAR_FUNCTION(0x4, "dev", "ad7", V_98DX3236_PLUS)), 462d7ae8f8dSKalyan Kinthada MPP_MODE(29, 463d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), 464c3234d3bSChris Packham MPP_VAR_FUNCTION(0x4, "dev", "a0", V_98DX3236_PLUS)), 465d7ae8f8dSKalyan Kinthada MPP_MODE(30, 466d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), 467c3234d3bSChris Packham MPP_VAR_FUNCTION(0x4, "dev", "a1", V_98DX3236_PLUS)), 468d7ae8f8dSKalyan Kinthada MPP_MODE(31, 469d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS), 470d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x1, "slv_smi", "mdc", V_98DX3236_PLUS), 471d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x3, "smi", "mdc", V_98DX3236_PLUS), 472d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x4, "dev", "we1", V_98DX3236_PLUS)), 473d7ae8f8dSKalyan Kinthada MPP_MODE(32, 474d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS), 475d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x1, "slv_smi", "mdio", V_98DX3236_PLUS), 476d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x3, "smi", "mdio", V_98DX3236_PLUS), 477d7ae8f8dSKalyan Kinthada MPP_VAR_FUNCTION(0x4, "dev", "cs1", V_98DX3236_PLUS)), 478d7ae8f8dSKalyan Kinthada }; 479d7ae8f8dSKalyan Kinthada 48006763c74SThomas Petazzoni static struct mvebu_pinctrl_soc_info armada_xp_pinctrl_info; 48106763c74SThomas Petazzoni 482baa9946eSFabian Frederick static const struct of_device_id armada_xp_pinctrl_of_match[] = { 48306763c74SThomas Petazzoni { 48406763c74SThomas Petazzoni .compatible = "marvell,mv78230-pinctrl", 48506763c74SThomas Petazzoni .data = (void *) V_MV78230, 48606763c74SThomas Petazzoni }, 48706763c74SThomas Petazzoni { 48806763c74SThomas Petazzoni .compatible = "marvell,mv78260-pinctrl", 48906763c74SThomas Petazzoni .data = (void *) V_MV78260, 49006763c74SThomas Petazzoni }, 49106763c74SThomas Petazzoni { 49206763c74SThomas Petazzoni .compatible = "marvell,mv78460-pinctrl", 49306763c74SThomas Petazzoni .data = (void *) V_MV78460, 49406763c74SThomas Petazzoni }, 495d7ae8f8dSKalyan Kinthada { 496d7ae8f8dSKalyan Kinthada .compatible = "marvell,98dx3236-pinctrl", 497d7ae8f8dSKalyan Kinthada .data = (void *) V_98DX3236, 498d7ae8f8dSKalyan Kinthada }, 499d7ae8f8dSKalyan Kinthada { 500d7ae8f8dSKalyan Kinthada .compatible = "marvell,98dx4251-pinctrl", 501d7ae8f8dSKalyan Kinthada .data = (void *) V_98DX4251, 502d7ae8f8dSKalyan Kinthada }, 50306763c74SThomas Petazzoni { }, 50406763c74SThomas Petazzoni }; 50506763c74SThomas Petazzoni 50630be3fb9SRussell King static const struct mvebu_mpp_ctrl mv78230_mpp_controls[] = { 507ad9ec4ecSRussell King MPP_FUNC_CTRL(0, 48, NULL, mvebu_mmio_mpp_ctrl), 50806763c74SThomas Petazzoni }; 50906763c74SThomas Petazzoni 51006763c74SThomas Petazzoni static struct pinctrl_gpio_range mv78230_mpp_gpio_ranges[] = { 51106763c74SThomas Petazzoni MPP_GPIO_RANGE(0, 0, 0, 32), 51206763c74SThomas Petazzoni MPP_GPIO_RANGE(1, 32, 32, 17), 51306763c74SThomas Petazzoni }; 51406763c74SThomas Petazzoni 51530be3fb9SRussell King static const struct mvebu_mpp_ctrl mv78260_mpp_controls[] = { 516ad9ec4ecSRussell King MPP_FUNC_CTRL(0, 66, NULL, mvebu_mmio_mpp_ctrl), 51706763c74SThomas Petazzoni }; 51806763c74SThomas Petazzoni 51906763c74SThomas Petazzoni static struct pinctrl_gpio_range mv78260_mpp_gpio_ranges[] = { 52006763c74SThomas Petazzoni MPP_GPIO_RANGE(0, 0, 0, 32), 52106763c74SThomas Petazzoni MPP_GPIO_RANGE(1, 32, 32, 32), 52206763c74SThomas Petazzoni MPP_GPIO_RANGE(2, 64, 64, 3), 52306763c74SThomas Petazzoni }; 52406763c74SThomas Petazzoni 52530be3fb9SRussell King static const struct mvebu_mpp_ctrl mv78460_mpp_controls[] = { 526ad9ec4ecSRussell King MPP_FUNC_CTRL(0, 66, NULL, mvebu_mmio_mpp_ctrl), 52706763c74SThomas Petazzoni }; 52806763c74SThomas Petazzoni 52906763c74SThomas Petazzoni static struct pinctrl_gpio_range mv78460_mpp_gpio_ranges[] = { 53006763c74SThomas Petazzoni MPP_GPIO_RANGE(0, 0, 0, 32), 53106763c74SThomas Petazzoni MPP_GPIO_RANGE(1, 32, 32, 32), 53206763c74SThomas Petazzoni MPP_GPIO_RANGE(2, 64, 64, 3), 53306763c74SThomas Petazzoni }; 53406763c74SThomas Petazzoni 535d7ae8f8dSKalyan Kinthada static struct mvebu_mpp_ctrl mv98dx3236_mpp_controls[] = { 536d7ae8f8dSKalyan Kinthada MPP_FUNC_CTRL(0, 32, NULL, mvebu_mmio_mpp_ctrl), 537d7ae8f8dSKalyan Kinthada }; 538d7ae8f8dSKalyan Kinthada 539d7ae8f8dSKalyan Kinthada static struct pinctrl_gpio_range mv98dx3236_mpp_gpio_ranges[] = { 540d7ae8f8dSKalyan Kinthada MPP_GPIO_RANGE(0, 0, 0, 32), 541d7ae8f8dSKalyan Kinthada }; 542d7ae8f8dSKalyan Kinthada 54312149a20SThomas Petazzoni static int armada_xp_pinctrl_suspend(struct platform_device *pdev, 54412149a20SThomas Petazzoni pm_message_t state) 54512149a20SThomas Petazzoni { 54612149a20SThomas Petazzoni struct mvebu_pinctrl_soc_info *soc = 54712149a20SThomas Petazzoni platform_get_drvdata(pdev); 54812149a20SThomas Petazzoni int i, nregs; 54912149a20SThomas Petazzoni 55012149a20SThomas Petazzoni nregs = DIV_ROUND_UP(soc->nmodes, MVEBU_MPPS_PER_REG); 55112149a20SThomas Petazzoni 55212149a20SThomas Petazzoni for (i = 0; i < nregs; i++) 553ad9ec4ecSRussell King mpp_saved_regs[i] = readl(soc->control_data[0].base + i * 4); 55412149a20SThomas Petazzoni 55512149a20SThomas Petazzoni return 0; 55612149a20SThomas Petazzoni } 55712149a20SThomas Petazzoni 55812149a20SThomas Petazzoni static int armada_xp_pinctrl_resume(struct platform_device *pdev) 55912149a20SThomas Petazzoni { 56012149a20SThomas Petazzoni struct mvebu_pinctrl_soc_info *soc = 56112149a20SThomas Petazzoni platform_get_drvdata(pdev); 56212149a20SThomas Petazzoni int i, nregs; 56312149a20SThomas Petazzoni 56412149a20SThomas Petazzoni nregs = DIV_ROUND_UP(soc->nmodes, MVEBU_MPPS_PER_REG); 56512149a20SThomas Petazzoni 56612149a20SThomas Petazzoni for (i = 0; i < nregs; i++) 567ad9ec4ecSRussell King writel(mpp_saved_regs[i], soc->control_data[0].base + i * 4); 56812149a20SThomas Petazzoni 56912149a20SThomas Petazzoni return 0; 57012149a20SThomas Petazzoni } 57112149a20SThomas Petazzoni 572150632b0SGreg Kroah-Hartman static int armada_xp_pinctrl_probe(struct platform_device *pdev) 57306763c74SThomas Petazzoni { 57406763c74SThomas Petazzoni struct mvebu_pinctrl_soc_info *soc = &armada_xp_pinctrl_info; 57506763c74SThomas Petazzoni const struct of_device_id *match = 57606763c74SThomas Petazzoni of_match_device(armada_xp_pinctrl_of_match, &pdev->dev); 57712149a20SThomas Petazzoni int nregs; 57806763c74SThomas Petazzoni 57906763c74SThomas Petazzoni if (!match) 58006763c74SThomas Petazzoni return -ENODEV; 58106763c74SThomas Petazzoni 58206763c74SThomas Petazzoni soc->variant = (unsigned) match->data & 0xff; 58306763c74SThomas Petazzoni 58406763c74SThomas Petazzoni switch (soc->variant) { 58506763c74SThomas Petazzoni case V_MV78230: 58606763c74SThomas Petazzoni soc->controls = mv78230_mpp_controls; 58706763c74SThomas Petazzoni soc->ncontrols = ARRAY_SIZE(mv78230_mpp_controls); 58806763c74SThomas Petazzoni soc->modes = armada_xp_mpp_modes; 58906763c74SThomas Petazzoni /* We don't necessarily want the full list of the 59006763c74SThomas Petazzoni * armada_xp_mpp_modes, but only the first 'n' ones 59106763c74SThomas Petazzoni * that are available on this SoC */ 59206763c74SThomas Petazzoni soc->nmodes = mv78230_mpp_controls[0].npins; 59306763c74SThomas Petazzoni soc->gpioranges = mv78230_mpp_gpio_ranges; 59406763c74SThomas Petazzoni soc->ngpioranges = ARRAY_SIZE(mv78230_mpp_gpio_ranges); 59506763c74SThomas Petazzoni break; 59606763c74SThomas Petazzoni case V_MV78260: 59706763c74SThomas Petazzoni soc->controls = mv78260_mpp_controls; 59806763c74SThomas Petazzoni soc->ncontrols = ARRAY_SIZE(mv78260_mpp_controls); 59906763c74SThomas Petazzoni soc->modes = armada_xp_mpp_modes; 60006763c74SThomas Petazzoni /* We don't necessarily want the full list of the 60106763c74SThomas Petazzoni * armada_xp_mpp_modes, but only the first 'n' ones 60206763c74SThomas Petazzoni * that are available on this SoC */ 60306763c74SThomas Petazzoni soc->nmodes = mv78260_mpp_controls[0].npins; 60406763c74SThomas Petazzoni soc->gpioranges = mv78260_mpp_gpio_ranges; 60506763c74SThomas Petazzoni soc->ngpioranges = ARRAY_SIZE(mv78260_mpp_gpio_ranges); 60606763c74SThomas Petazzoni break; 60706763c74SThomas Petazzoni case V_MV78460: 60806763c74SThomas Petazzoni soc->controls = mv78460_mpp_controls; 60906763c74SThomas Petazzoni soc->ncontrols = ARRAY_SIZE(mv78460_mpp_controls); 61006763c74SThomas Petazzoni soc->modes = armada_xp_mpp_modes; 61106763c74SThomas Petazzoni /* We don't necessarily want the full list of the 61206763c74SThomas Petazzoni * armada_xp_mpp_modes, but only the first 'n' ones 61306763c74SThomas Petazzoni * that are available on this SoC */ 61406763c74SThomas Petazzoni soc->nmodes = mv78460_mpp_controls[0].npins; 61506763c74SThomas Petazzoni soc->gpioranges = mv78460_mpp_gpio_ranges; 61606763c74SThomas Petazzoni soc->ngpioranges = ARRAY_SIZE(mv78460_mpp_gpio_ranges); 61706763c74SThomas Petazzoni break; 618d7ae8f8dSKalyan Kinthada case V_98DX3236: 619d7ae8f8dSKalyan Kinthada case V_98DX3336: 620d7ae8f8dSKalyan Kinthada case V_98DX4251: 621d7ae8f8dSKalyan Kinthada /* fall-through */ 622d7ae8f8dSKalyan Kinthada soc->controls = mv98dx3236_mpp_controls; 623d7ae8f8dSKalyan Kinthada soc->ncontrols = ARRAY_SIZE(mv98dx3236_mpp_controls); 624d7ae8f8dSKalyan Kinthada soc->modes = mv98dx3236_mpp_modes; 625d7ae8f8dSKalyan Kinthada soc->nmodes = mv98dx3236_mpp_controls[0].npins; 626d7ae8f8dSKalyan Kinthada soc->gpioranges = mv98dx3236_mpp_gpio_ranges; 627d7ae8f8dSKalyan Kinthada soc->ngpioranges = ARRAY_SIZE(mv98dx3236_mpp_gpio_ranges); 628d7ae8f8dSKalyan Kinthada break; 62906763c74SThomas Petazzoni } 63006763c74SThomas Petazzoni 63112149a20SThomas Petazzoni nregs = DIV_ROUND_UP(soc->nmodes, MVEBU_MPPS_PER_REG); 63212149a20SThomas Petazzoni 63312149a20SThomas Petazzoni mpp_saved_regs = devm_kmalloc(&pdev->dev, nregs * sizeof(u32), 63412149a20SThomas Petazzoni GFP_KERNEL); 63512149a20SThomas Petazzoni if (!mpp_saved_regs) 63612149a20SThomas Petazzoni return -ENOMEM; 63712149a20SThomas Petazzoni 63806763c74SThomas Petazzoni pdev->dev.platform_data = soc; 63906763c74SThomas Petazzoni 640ad9ec4ecSRussell King return mvebu_pinctrl_simple_mmio_probe(pdev); 64106763c74SThomas Petazzoni } 64206763c74SThomas Petazzoni 64306763c74SThomas Petazzoni static struct platform_driver armada_xp_pinctrl_driver = { 64406763c74SThomas Petazzoni .driver = { 64506763c74SThomas Petazzoni .name = "armada-xp-pinctrl", 646f2e9394dSSachin Kamat .of_match_table = armada_xp_pinctrl_of_match, 64706763c74SThomas Petazzoni }, 64806763c74SThomas Petazzoni .probe = armada_xp_pinctrl_probe, 64912149a20SThomas Petazzoni .suspend = armada_xp_pinctrl_suspend, 65012149a20SThomas Petazzoni .resume = armada_xp_pinctrl_resume, 65106763c74SThomas Petazzoni }; 652fdbde81bSPaul Gortmaker builtin_platform_driver(armada_xp_pinctrl_driver); 653