106763c74SThomas Petazzoni /* 206763c74SThomas Petazzoni * Marvell Armada XP pinctrl driver based on mvebu pinctrl core 306763c74SThomas Petazzoni * 406763c74SThomas Petazzoni * Copyright (C) 2012 Marvell 506763c74SThomas Petazzoni * 606763c74SThomas Petazzoni * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 706763c74SThomas Petazzoni * 806763c74SThomas Petazzoni * This program is free software; you can redistribute it and/or modify 906763c74SThomas Petazzoni * it under the terms of the GNU General Public License as published by 1006763c74SThomas Petazzoni * the Free Software Foundation; either version 2 of the License, or 1106763c74SThomas Petazzoni * (at your option) any later version. 1206763c74SThomas Petazzoni * 1306763c74SThomas Petazzoni * This file supports the three variants of Armada XP SoCs that are 1406763c74SThomas Petazzoni * available: mv78230, mv78260 and mv78460. From a pin muxing 1506763c74SThomas Petazzoni * perspective, the mv78230 has 49 MPP pins. The mv78260 and mv78460 1606763c74SThomas Petazzoni * both have 67 MPP pins (more GPIOs and address lines for the memory 1780b3d04fSThomas Petazzoni * bus mainly). 1806763c74SThomas Petazzoni */ 1906763c74SThomas Petazzoni 2006763c74SThomas Petazzoni #include <linux/err.h> 2106763c74SThomas Petazzoni #include <linux/init.h> 2206763c74SThomas Petazzoni #include <linux/io.h> 2306763c74SThomas Petazzoni #include <linux/module.h> 2406763c74SThomas Petazzoni #include <linux/platform_device.h> 2506763c74SThomas Petazzoni #include <linux/clk.h> 2606763c74SThomas Petazzoni #include <linux/of.h> 2706763c74SThomas Petazzoni #include <linux/of_device.h> 2806763c74SThomas Petazzoni #include <linux/pinctrl/pinctrl.h> 2906763c74SThomas Petazzoni #include <linux/bitops.h> 3006763c74SThomas Petazzoni 3106763c74SThomas Petazzoni #include "pinctrl-mvebu.h" 3206763c74SThomas Petazzoni 33ad2a4f2bSSebastian Hesselbarth static void __iomem *mpp_base; 3412149a20SThomas Petazzoni static u32 *mpp_saved_regs; 35ad2a4f2bSSebastian Hesselbarth 36ad2a4f2bSSebastian Hesselbarth static int armada_xp_mpp_ctrl_get(unsigned pid, unsigned long *config) 37ad2a4f2bSSebastian Hesselbarth { 38ad2a4f2bSSebastian Hesselbarth return default_mpp_ctrl_get(mpp_base, pid, config); 39ad2a4f2bSSebastian Hesselbarth } 40ad2a4f2bSSebastian Hesselbarth 41ad2a4f2bSSebastian Hesselbarth static int armada_xp_mpp_ctrl_set(unsigned pid, unsigned long config) 42ad2a4f2bSSebastian Hesselbarth { 43ad2a4f2bSSebastian Hesselbarth return default_mpp_ctrl_set(mpp_base, pid, config); 44ad2a4f2bSSebastian Hesselbarth } 45ad2a4f2bSSebastian Hesselbarth 4606763c74SThomas Petazzoni enum armada_xp_variant { 4706763c74SThomas Petazzoni V_MV78230 = BIT(0), 4806763c74SThomas Petazzoni V_MV78260 = BIT(1), 4906763c74SThomas Petazzoni V_MV78460 = BIT(2), 5006763c74SThomas Petazzoni V_MV78230_PLUS = (V_MV78230 | V_MV78260 | V_MV78460), 5106763c74SThomas Petazzoni V_MV78260_PLUS = (V_MV78260 | V_MV78460), 5206763c74SThomas Petazzoni }; 5306763c74SThomas Petazzoni 5406763c74SThomas Petazzoni static struct mvebu_mpp_mode armada_xp_mpp_modes[] = { 5506763c74SThomas Petazzoni MPP_MODE(0, 5606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 57a361cbc5SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "txclkout", V_MV78230_PLUS), 5806763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d0", V_MV78230_PLUS)), 5906763c74SThomas Petazzoni MPP_MODE(1, 6006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 6106763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "txd0", V_MV78230_PLUS), 6206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d1", V_MV78230_PLUS)), 6306763c74SThomas Petazzoni MPP_MODE(2, 6406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 6506763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "txd1", V_MV78230_PLUS), 6606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d2", V_MV78230_PLUS)), 6706763c74SThomas Petazzoni MPP_MODE(3, 6806763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 6906763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "txd2", V_MV78230_PLUS), 7006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d3", V_MV78230_PLUS)), 7106763c74SThomas Petazzoni MPP_MODE(4, 7206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 7306763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "txd3", V_MV78230_PLUS), 7406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d4", V_MV78230_PLUS)), 7506763c74SThomas Petazzoni MPP_MODE(5, 7606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 7706763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "txctl", V_MV78230_PLUS), 7806763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d5", V_MV78230_PLUS)), 7906763c74SThomas Petazzoni MPP_MODE(6, 8006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 8106763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "rxd0", V_MV78230_PLUS), 8206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d6", V_MV78230_PLUS)), 8306763c74SThomas Petazzoni MPP_MODE(7, 8406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 8506763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "rxd1", V_MV78230_PLUS), 8606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d7", V_MV78230_PLUS)), 8706763c74SThomas Petazzoni MPP_MODE(8, 8806763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 8906763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "rxd2", V_MV78230_PLUS), 9006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d8", V_MV78230_PLUS)), 9106763c74SThomas Petazzoni MPP_MODE(9, 9206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 9306763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "rxd3", V_MV78230_PLUS), 9406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d9", V_MV78230_PLUS)), 9506763c74SThomas Petazzoni MPP_MODE(10, 9606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 9706763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "rxctl", V_MV78230_PLUS), 9806763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d10", V_MV78230_PLUS)), 9906763c74SThomas Petazzoni MPP_MODE(11, 10006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 10106763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "rxclk", V_MV78230_PLUS), 10206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d11", V_MV78230_PLUS)), 10306763c74SThomas Petazzoni MPP_MODE(12, 10406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 10506763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "txd4", V_MV78230_PLUS), 106a361cbc5SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "ge1", "txclkout", V_MV78230_PLUS), 10706763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d12", V_MV78230_PLUS)), 10806763c74SThomas Petazzoni MPP_MODE(13, 10906763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 11006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "txd5", V_MV78230_PLUS), 11106763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "ge1", "txd0", V_MV78230_PLUS), 112*88b355f1SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "spi1", "mosi", V_MV78230_PLUS), 11306763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d13", V_MV78230_PLUS)), 11406763c74SThomas Petazzoni MPP_MODE(14, 11506763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 11606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "txd6", V_MV78230_PLUS), 11706763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "ge1", "txd1", V_MV78230_PLUS), 118*88b355f1SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "spi1", "sck", V_MV78230_PLUS), 11906763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d14", V_MV78230_PLUS)), 12006763c74SThomas Petazzoni MPP_MODE(15, 12106763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 12206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "txd7", V_MV78230_PLUS), 12306763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "ge1", "txd2", V_MV78230_PLUS), 12406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d15", V_MV78230_PLUS)), 12506763c74SThomas Petazzoni MPP_MODE(16, 12606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 12706763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "txclk", V_MV78230_PLUS), 12806763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "ge1", "txd3", V_MV78230_PLUS), 129*88b355f1SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "spi1", "cs0", V_MV78230_PLUS), 13006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d16", V_MV78230_PLUS)), 13106763c74SThomas Petazzoni MPP_MODE(17, 13206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 13306763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "col", V_MV78230_PLUS), 13406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "ge1", "txctl", V_MV78230_PLUS), 135*88b355f1SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "spi1", "miso", V_MV78230_PLUS), 13606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d17", V_MV78230_PLUS)), 13706763c74SThomas Petazzoni MPP_MODE(18, 13806763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 13906763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "rxerr", V_MV78230_PLUS), 14006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "ge1", "rxd0", V_MV78230_PLUS), 14106763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "ptp", "trig", V_MV78230_PLUS), 14206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d18", V_MV78230_PLUS)), 14306763c74SThomas Petazzoni MPP_MODE(19, 14406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 14506763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "crs", V_MV78230_PLUS), 14606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "ge1", "rxd1", V_MV78230_PLUS), 14706763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "ptp", "evreq", V_MV78230_PLUS), 14806763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d19", V_MV78230_PLUS)), 14906763c74SThomas Petazzoni MPP_MODE(20, 15006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 15106763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "rxd4", V_MV78230_PLUS), 15206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "ge1", "rxd2", V_MV78230_PLUS), 15306763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "ptp", "clk", V_MV78230_PLUS), 15406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d20", V_MV78230_PLUS)), 15506763c74SThomas Petazzoni MPP_MODE(21, 15606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 15706763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "rxd5", V_MV78230_PLUS), 15806763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "ge1", "rxd3", V_MV78230_PLUS), 159100dc5d8SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "dram", "bat", V_MV78230_PLUS), 16006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d21", V_MV78230_PLUS)), 16106763c74SThomas Petazzoni MPP_MODE(22, 16206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 16306763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "rxd6", V_MV78230_PLUS), 16406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "ge1", "rxctl", V_MV78230_PLUS), 16506763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "sata0", "prsnt", V_MV78230_PLUS), 16606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d22", V_MV78230_PLUS)), 16706763c74SThomas Petazzoni MPP_MODE(23, 16806763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 16906763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ge0", "rxd7", V_MV78230_PLUS), 17006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "ge1", "rxclk", V_MV78230_PLUS), 17106763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "sata1", "prsnt", V_MV78230_PLUS), 17206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "d23", V_MV78230_PLUS)), 17306763c74SThomas Petazzoni MPP_MODE(24, 17406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 17506763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "sata1", "prsnt", V_MV78230_PLUS), 17606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "tdm", "rst", V_MV78230_PLUS), 17706763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "hsync", V_MV78230_PLUS)), 17806763c74SThomas Petazzoni MPP_MODE(25, 17906763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 18006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "sata0", "prsnt", V_MV78230_PLUS), 18106763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "tdm", "pclk", V_MV78230_PLUS), 18206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "vsync", V_MV78230_PLUS)), 18306763c74SThomas Petazzoni MPP_MODE(26, 18406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 18506763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "tdm", "fsync", V_MV78230_PLUS), 18680b3d04fSThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "clk", V_MV78230_PLUS)), 18706763c74SThomas Petazzoni MPP_MODE(27, 18806763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 18906763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ptp", "trig", V_MV78230_PLUS), 19006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "tdm", "dtx", V_MV78230_PLUS), 19106763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "e", V_MV78230_PLUS)), 19206763c74SThomas Petazzoni MPP_MODE(28, 19306763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 19406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ptp", "evreq", V_MV78230_PLUS), 19506763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "tdm", "drx", V_MV78230_PLUS), 19606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "pwm", V_MV78230_PLUS)), 19706763c74SThomas Petazzoni MPP_MODE(29, 19806763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 19906763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "ptp", "clk", V_MV78230_PLUS), 20006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "tdm", "int0", V_MV78230_PLUS), 20180b3d04fSThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "ref-clk", V_MV78230_PLUS)), 20206763c74SThomas Petazzoni MPP_MODE(30, 20306763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 20406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "sd0", "clk", V_MV78230_PLUS), 20506763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "tdm", "int1", V_MV78230_PLUS)), 20606763c74SThomas Petazzoni MPP_MODE(31, 20706763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 20806763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "sd0", "cmd", V_MV78230_PLUS), 20980b3d04fSThomas Petazzoni MPP_VAR_FUNCTION(0x3, "tdm", "int2", V_MV78230_PLUS)), 21006763c74SThomas Petazzoni MPP_MODE(32, 21106763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 21206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "sd0", "d0", V_MV78230_PLUS), 21380b3d04fSThomas Petazzoni MPP_VAR_FUNCTION(0x3, "tdm", "int3", V_MV78230_PLUS)), 21406763c74SThomas Petazzoni MPP_MODE(33, 21506763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 21606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "sd0", "d1", V_MV78230_PLUS), 21706763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "tdm", "int4", V_MV78230_PLUS), 218100dc5d8SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "dram", "bat", V_MV78230_PLUS)), 21906763c74SThomas Petazzoni MPP_MODE(34, 22006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 22106763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "sd0", "d2", V_MV78230_PLUS), 22206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "sata0", "prsnt", V_MV78230_PLUS), 22306763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "tdm", "int5", V_MV78230_PLUS)), 22406763c74SThomas Petazzoni MPP_MODE(35, 22506763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 22606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "sd0", "d3", V_MV78230_PLUS), 22706763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "sata1", "prsnt", V_MV78230_PLUS), 22806763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "tdm", "int6", V_MV78230_PLUS)), 22906763c74SThomas Petazzoni MPP_MODE(36, 23006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 23150a7d13dSThomas Petazzoni MPP_VAR_FUNCTION(0x1, "spi0", "mosi", V_MV78230_PLUS)), 23206763c74SThomas Petazzoni MPP_MODE(37, 23306763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 23450a7d13dSThomas Petazzoni MPP_VAR_FUNCTION(0x1, "spi0", "miso", V_MV78230_PLUS)), 23506763c74SThomas Petazzoni MPP_MODE(38, 23606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 23750a7d13dSThomas Petazzoni MPP_VAR_FUNCTION(0x1, "spi0", "sck", V_MV78230_PLUS)), 23806763c74SThomas Petazzoni MPP_MODE(39, 23906763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 24050a7d13dSThomas Petazzoni MPP_VAR_FUNCTION(0x1, "spi0", "cs0", V_MV78230_PLUS)), 24106763c74SThomas Petazzoni MPP_MODE(40, 24206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 24350a7d13dSThomas Petazzoni MPP_VAR_FUNCTION(0x1, "spi0", "cs1", V_MV78230_PLUS), 24406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "uart2", "cts", V_MV78230_PLUS), 24506763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "vga-hsync", V_MV78230_PLUS), 246*88b355f1SThomas Petazzoni MPP_VAR_FUNCTION(0x5, "pcie", "clkreq0", V_MV78230_PLUS), 247*88b355f1SThomas Petazzoni MPP_VAR_FUNCTION(0x6, "spi1", "cs1", V_MV78230_PLUS)), 24806763c74SThomas Petazzoni MPP_MODE(41, 24906763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 25050a7d13dSThomas Petazzoni MPP_VAR_FUNCTION(0x1, "spi0", "cs2", V_MV78230_PLUS), 25106763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "uart2", "rts", V_MV78230_PLUS), 25206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "sata1", "prsnt", V_MV78230_PLUS), 25306763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "lcd", "vga-vsync", V_MV78230_PLUS), 254*88b355f1SThomas Petazzoni MPP_VAR_FUNCTION(0x5, "pcie", "clkreq1", V_MV78230_PLUS), 255*88b355f1SThomas Petazzoni MPP_VAR_FUNCTION(0x6, "spi1", "cs2", V_MV78230_PLUS)), 25606763c74SThomas Petazzoni MPP_MODE(42, 25706763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 25806763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "uart2", "rxd", V_MV78230_PLUS), 25906763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "uart0", "cts", V_MV78230_PLUS), 26006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x3, "tdm", "int7", V_MV78230_PLUS), 261dae5597fSThomas Petazzoni MPP_VAR_FUNCTION(0x4, "tdm", "timer", V_MV78230_PLUS)), 26206763c74SThomas Petazzoni MPP_MODE(43, 26306763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 26406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "uart2", "txd", V_MV78230_PLUS), 26506763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "uart0", "rts", V_MV78230_PLUS), 26650a7d13dSThomas Petazzoni MPP_VAR_FUNCTION(0x3, "spi0", "cs3", V_MV78230_PLUS), 267*88b355f1SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "pcie", "rstout", V_MV78230_PLUS), 268*88b355f1SThomas Petazzoni MPP_VAR_FUNCTION(0x6, "spi1", "cs3", V_MV78230_PLUS)), 26906763c74SThomas Petazzoni MPP_MODE(44, 27006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 27106763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "uart2", "cts", V_MV78230_PLUS), 27206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "uart3", "rxd", V_MV78230_PLUS), 27350a7d13dSThomas Petazzoni MPP_VAR_FUNCTION(0x3, "spi0", "cs4", V_MV78230_PLUS), 274100dc5d8SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "dram", "bat", V_MV78230_PLUS), 275*88b355f1SThomas Petazzoni MPP_VAR_FUNCTION(0x5, "pcie", "clkreq2", V_MV78230_PLUS), 276*88b355f1SThomas Petazzoni MPP_VAR_FUNCTION(0x6, "spi1", "cs4", V_MV78230_PLUS)), 27706763c74SThomas Petazzoni MPP_MODE(45, 27806763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 27906763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "uart2", "rts", V_MV78230_PLUS), 28006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "uart3", "txd", V_MV78230_PLUS), 28150a7d13dSThomas Petazzoni MPP_VAR_FUNCTION(0x3, "spi0", "cs5", V_MV78230_PLUS), 282*88b355f1SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "sata1", "prsnt", V_MV78230_PLUS), 283*88b355f1SThomas Petazzoni MPP_VAR_FUNCTION(0x6, "spi1", "cs5", V_MV78230_PLUS)), 28406763c74SThomas Petazzoni MPP_MODE(46, 28506763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 28606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "uart3", "rts", V_MV78230_PLUS), 28706763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "uart1", "rts", V_MV78230_PLUS), 28850a7d13dSThomas Petazzoni MPP_VAR_FUNCTION(0x3, "spi0", "cs6", V_MV78230_PLUS), 289*88b355f1SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "sata0", "prsnt", V_MV78230_PLUS), 290*88b355f1SThomas Petazzoni MPP_VAR_FUNCTION(0x6, "spi1", "cs6", V_MV78230_PLUS)), 29106763c74SThomas Petazzoni MPP_MODE(47, 29206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 29306763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "uart3", "cts", V_MV78230_PLUS), 29406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "uart1", "cts", V_MV78230_PLUS), 29550a7d13dSThomas Petazzoni MPP_VAR_FUNCTION(0x3, "spi0", "cs7", V_MV78230_PLUS), 29606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x4, "ref", "clkout", V_MV78230_PLUS), 297*88b355f1SThomas Petazzoni MPP_VAR_FUNCTION(0x5, "pcie", "clkreq3", V_MV78230_PLUS), 298*88b355f1SThomas Petazzoni MPP_VAR_FUNCTION(0x6, "spi1", "cs7", V_MV78230_PLUS)), 29906763c74SThomas Petazzoni MPP_MODE(48, 30006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78230_PLUS), 301ea78b951SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "dev", "clkout", V_MV78230_PLUS), 30206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x2, "dev", "burst/last", V_MV78230_PLUS)), 30306763c74SThomas Petazzoni MPP_MODE(49, 30406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS), 30506763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "dev", "we3", V_MV78260_PLUS)), 30606763c74SThomas Petazzoni MPP_MODE(50, 30706763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS), 30806763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "dev", "we2", V_MV78260_PLUS)), 30906763c74SThomas Petazzoni MPP_MODE(51, 31006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS), 31106763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "dev", "ad16", V_MV78260_PLUS)), 31206763c74SThomas Petazzoni MPP_MODE(52, 31306763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS), 31406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "dev", "ad17", V_MV78260_PLUS)), 31506763c74SThomas Petazzoni MPP_MODE(53, 31606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS), 31706763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "dev", "ad18", V_MV78260_PLUS)), 31806763c74SThomas Petazzoni MPP_MODE(54, 31906763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS), 32006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "dev", "ad19", V_MV78260_PLUS)), 32106763c74SThomas Petazzoni MPP_MODE(55, 32206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS), 32380b3d04fSThomas Petazzoni MPP_VAR_FUNCTION(0x1, "dev", "ad20", V_MV78260_PLUS)), 32406763c74SThomas Petazzoni MPP_MODE(56, 32506763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS), 32680b3d04fSThomas Petazzoni MPP_VAR_FUNCTION(0x1, "dev", "ad21", V_MV78260_PLUS)), 32706763c74SThomas Petazzoni MPP_MODE(57, 32806763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS), 32980b3d04fSThomas Petazzoni MPP_VAR_FUNCTION(0x1, "dev", "ad22", V_MV78260_PLUS)), 33006763c74SThomas Petazzoni MPP_MODE(58, 33106763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS), 33206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "dev", "ad23", V_MV78260_PLUS)), 33306763c74SThomas Petazzoni MPP_MODE(59, 33406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS), 33506763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "dev", "ad24", V_MV78260_PLUS)), 33606763c74SThomas Petazzoni MPP_MODE(60, 33706763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS), 33806763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "dev", "ad25", V_MV78260_PLUS)), 33906763c74SThomas Petazzoni MPP_MODE(61, 34006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS), 34106763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "dev", "ad26", V_MV78260_PLUS)), 34206763c74SThomas Petazzoni MPP_MODE(62, 34306763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS), 34406763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "dev", "ad27", V_MV78260_PLUS)), 34506763c74SThomas Petazzoni MPP_MODE(63, 34606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS), 34706763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "dev", "ad28", V_MV78260_PLUS)), 34806763c74SThomas Petazzoni MPP_MODE(64, 34906763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS), 35006763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "dev", "ad29", V_MV78260_PLUS)), 35106763c74SThomas Petazzoni MPP_MODE(65, 35206763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS), 35306763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "dev", "ad30", V_MV78260_PLUS)), 35406763c74SThomas Petazzoni MPP_MODE(66, 35506763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_MV78260_PLUS), 35606763c74SThomas Petazzoni MPP_VAR_FUNCTION(0x1, "dev", "ad31", V_MV78260_PLUS)), 35706763c74SThomas Petazzoni }; 35806763c74SThomas Petazzoni 35906763c74SThomas Petazzoni static struct mvebu_pinctrl_soc_info armada_xp_pinctrl_info; 36006763c74SThomas Petazzoni 361baa9946eSFabian Frederick static const struct of_device_id armada_xp_pinctrl_of_match[] = { 36206763c74SThomas Petazzoni { 36306763c74SThomas Petazzoni .compatible = "marvell,mv78230-pinctrl", 36406763c74SThomas Petazzoni .data = (void *) V_MV78230, 36506763c74SThomas Petazzoni }, 36606763c74SThomas Petazzoni { 36706763c74SThomas Petazzoni .compatible = "marvell,mv78260-pinctrl", 36806763c74SThomas Petazzoni .data = (void *) V_MV78260, 36906763c74SThomas Petazzoni }, 37006763c74SThomas Petazzoni { 37106763c74SThomas Petazzoni .compatible = "marvell,mv78460-pinctrl", 37206763c74SThomas Petazzoni .data = (void *) V_MV78460, 37306763c74SThomas Petazzoni }, 37406763c74SThomas Petazzoni { }, 37506763c74SThomas Petazzoni }; 37606763c74SThomas Petazzoni 37706763c74SThomas Petazzoni static struct mvebu_mpp_ctrl mv78230_mpp_controls[] = { 3781217b790SSebastian Hesselbarth MPP_FUNC_CTRL(0, 48, NULL, armada_xp_mpp_ctrl), 37906763c74SThomas Petazzoni }; 38006763c74SThomas Petazzoni 38106763c74SThomas Petazzoni static struct pinctrl_gpio_range mv78230_mpp_gpio_ranges[] = { 38206763c74SThomas Petazzoni MPP_GPIO_RANGE(0, 0, 0, 32), 38306763c74SThomas Petazzoni MPP_GPIO_RANGE(1, 32, 32, 17), 38406763c74SThomas Petazzoni }; 38506763c74SThomas Petazzoni 38606763c74SThomas Petazzoni static struct mvebu_mpp_ctrl mv78260_mpp_controls[] = { 3871217b790SSebastian Hesselbarth MPP_FUNC_CTRL(0, 66, NULL, armada_xp_mpp_ctrl), 38806763c74SThomas Petazzoni }; 38906763c74SThomas Petazzoni 39006763c74SThomas Petazzoni static struct pinctrl_gpio_range mv78260_mpp_gpio_ranges[] = { 39106763c74SThomas Petazzoni MPP_GPIO_RANGE(0, 0, 0, 32), 39206763c74SThomas Petazzoni MPP_GPIO_RANGE(1, 32, 32, 32), 39306763c74SThomas Petazzoni MPP_GPIO_RANGE(2, 64, 64, 3), 39406763c74SThomas Petazzoni }; 39506763c74SThomas Petazzoni 39606763c74SThomas Petazzoni static struct mvebu_mpp_ctrl mv78460_mpp_controls[] = { 3971217b790SSebastian Hesselbarth MPP_FUNC_CTRL(0, 66, NULL, armada_xp_mpp_ctrl), 39806763c74SThomas Petazzoni }; 39906763c74SThomas Petazzoni 40006763c74SThomas Petazzoni static struct pinctrl_gpio_range mv78460_mpp_gpio_ranges[] = { 40106763c74SThomas Petazzoni MPP_GPIO_RANGE(0, 0, 0, 32), 40206763c74SThomas Petazzoni MPP_GPIO_RANGE(1, 32, 32, 32), 40306763c74SThomas Petazzoni MPP_GPIO_RANGE(2, 64, 64, 3), 40406763c74SThomas Petazzoni }; 40506763c74SThomas Petazzoni 40612149a20SThomas Petazzoni static int armada_xp_pinctrl_suspend(struct platform_device *pdev, 40712149a20SThomas Petazzoni pm_message_t state) 40812149a20SThomas Petazzoni { 40912149a20SThomas Petazzoni struct mvebu_pinctrl_soc_info *soc = 41012149a20SThomas Petazzoni platform_get_drvdata(pdev); 41112149a20SThomas Petazzoni int i, nregs; 41212149a20SThomas Petazzoni 41312149a20SThomas Petazzoni nregs = DIV_ROUND_UP(soc->nmodes, MVEBU_MPPS_PER_REG); 41412149a20SThomas Petazzoni 41512149a20SThomas Petazzoni for (i = 0; i < nregs; i++) 41612149a20SThomas Petazzoni mpp_saved_regs[i] = readl(mpp_base + i * 4); 41712149a20SThomas Petazzoni 41812149a20SThomas Petazzoni return 0; 41912149a20SThomas Petazzoni } 42012149a20SThomas Petazzoni 42112149a20SThomas Petazzoni static int armada_xp_pinctrl_resume(struct platform_device *pdev) 42212149a20SThomas Petazzoni { 42312149a20SThomas Petazzoni struct mvebu_pinctrl_soc_info *soc = 42412149a20SThomas Petazzoni platform_get_drvdata(pdev); 42512149a20SThomas Petazzoni int i, nregs; 42612149a20SThomas Petazzoni 42712149a20SThomas Petazzoni nregs = DIV_ROUND_UP(soc->nmodes, MVEBU_MPPS_PER_REG); 42812149a20SThomas Petazzoni 42912149a20SThomas Petazzoni for (i = 0; i < nregs; i++) 43012149a20SThomas Petazzoni writel(mpp_saved_regs[i], mpp_base + i * 4); 43112149a20SThomas Petazzoni 43212149a20SThomas Petazzoni return 0; 43312149a20SThomas Petazzoni } 43412149a20SThomas Petazzoni 435150632b0SGreg Kroah-Hartman static int armada_xp_pinctrl_probe(struct platform_device *pdev) 43606763c74SThomas Petazzoni { 43706763c74SThomas Petazzoni struct mvebu_pinctrl_soc_info *soc = &armada_xp_pinctrl_info; 43806763c74SThomas Petazzoni const struct of_device_id *match = 43906763c74SThomas Petazzoni of_match_device(armada_xp_pinctrl_of_match, &pdev->dev); 4401217b790SSebastian Hesselbarth struct resource *res; 44112149a20SThomas Petazzoni int nregs; 44206763c74SThomas Petazzoni 44306763c74SThomas Petazzoni if (!match) 44406763c74SThomas Petazzoni return -ENODEV; 44506763c74SThomas Petazzoni 4461217b790SSebastian Hesselbarth res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 4471217b790SSebastian Hesselbarth mpp_base = devm_ioremap_resource(&pdev->dev, res); 4481217b790SSebastian Hesselbarth if (IS_ERR(mpp_base)) 4491217b790SSebastian Hesselbarth return PTR_ERR(mpp_base); 4501217b790SSebastian Hesselbarth 45106763c74SThomas Petazzoni soc->variant = (unsigned) match->data & 0xff; 45206763c74SThomas Petazzoni 45306763c74SThomas Petazzoni switch (soc->variant) { 45406763c74SThomas Petazzoni case V_MV78230: 45506763c74SThomas Petazzoni soc->controls = mv78230_mpp_controls; 45606763c74SThomas Petazzoni soc->ncontrols = ARRAY_SIZE(mv78230_mpp_controls); 45706763c74SThomas Petazzoni soc->modes = armada_xp_mpp_modes; 45806763c74SThomas Petazzoni /* We don't necessarily want the full list of the 45906763c74SThomas Petazzoni * armada_xp_mpp_modes, but only the first 'n' ones 46006763c74SThomas Petazzoni * that are available on this SoC */ 46106763c74SThomas Petazzoni soc->nmodes = mv78230_mpp_controls[0].npins; 46206763c74SThomas Petazzoni soc->gpioranges = mv78230_mpp_gpio_ranges; 46306763c74SThomas Petazzoni soc->ngpioranges = ARRAY_SIZE(mv78230_mpp_gpio_ranges); 46406763c74SThomas Petazzoni break; 46506763c74SThomas Petazzoni case V_MV78260: 46606763c74SThomas Petazzoni soc->controls = mv78260_mpp_controls; 46706763c74SThomas Petazzoni soc->ncontrols = ARRAY_SIZE(mv78260_mpp_controls); 46806763c74SThomas Petazzoni soc->modes = armada_xp_mpp_modes; 46906763c74SThomas Petazzoni /* We don't necessarily want the full list of the 47006763c74SThomas Petazzoni * armada_xp_mpp_modes, but only the first 'n' ones 47106763c74SThomas Petazzoni * that are available on this SoC */ 47206763c74SThomas Petazzoni soc->nmodes = mv78260_mpp_controls[0].npins; 47306763c74SThomas Petazzoni soc->gpioranges = mv78260_mpp_gpio_ranges; 47406763c74SThomas Petazzoni soc->ngpioranges = ARRAY_SIZE(mv78260_mpp_gpio_ranges); 47506763c74SThomas Petazzoni break; 47606763c74SThomas Petazzoni case V_MV78460: 47706763c74SThomas Petazzoni soc->controls = mv78460_mpp_controls; 47806763c74SThomas Petazzoni soc->ncontrols = ARRAY_SIZE(mv78460_mpp_controls); 47906763c74SThomas Petazzoni soc->modes = armada_xp_mpp_modes; 48006763c74SThomas Petazzoni /* We don't necessarily want the full list of the 48106763c74SThomas Petazzoni * armada_xp_mpp_modes, but only the first 'n' ones 48206763c74SThomas Petazzoni * that are available on this SoC */ 48306763c74SThomas Petazzoni soc->nmodes = mv78460_mpp_controls[0].npins; 48406763c74SThomas Petazzoni soc->gpioranges = mv78460_mpp_gpio_ranges; 48506763c74SThomas Petazzoni soc->ngpioranges = ARRAY_SIZE(mv78460_mpp_gpio_ranges); 48606763c74SThomas Petazzoni break; 48706763c74SThomas Petazzoni } 48806763c74SThomas Petazzoni 48912149a20SThomas Petazzoni nregs = DIV_ROUND_UP(soc->nmodes, MVEBU_MPPS_PER_REG); 49012149a20SThomas Petazzoni 49112149a20SThomas Petazzoni mpp_saved_regs = devm_kmalloc(&pdev->dev, nregs * sizeof(u32), 49212149a20SThomas Petazzoni GFP_KERNEL); 49312149a20SThomas Petazzoni if (!mpp_saved_regs) 49412149a20SThomas Petazzoni return -ENOMEM; 49512149a20SThomas Petazzoni 49606763c74SThomas Petazzoni pdev->dev.platform_data = soc; 49706763c74SThomas Petazzoni 49806763c74SThomas Petazzoni return mvebu_pinctrl_probe(pdev); 49906763c74SThomas Petazzoni } 50006763c74SThomas Petazzoni 501150632b0SGreg Kroah-Hartman static int armada_xp_pinctrl_remove(struct platform_device *pdev) 50206763c74SThomas Petazzoni { 50306763c74SThomas Petazzoni return mvebu_pinctrl_remove(pdev); 50406763c74SThomas Petazzoni } 50506763c74SThomas Petazzoni 50606763c74SThomas Petazzoni static struct platform_driver armada_xp_pinctrl_driver = { 50706763c74SThomas Petazzoni .driver = { 50806763c74SThomas Petazzoni .name = "armada-xp-pinctrl", 509f2e9394dSSachin Kamat .of_match_table = armada_xp_pinctrl_of_match, 51006763c74SThomas Petazzoni }, 51106763c74SThomas Petazzoni .probe = armada_xp_pinctrl_probe, 512150632b0SGreg Kroah-Hartman .remove = armada_xp_pinctrl_remove, 51312149a20SThomas Petazzoni .suspend = armada_xp_pinctrl_suspend, 51412149a20SThomas Petazzoni .resume = armada_xp_pinctrl_resume, 51506763c74SThomas Petazzoni }; 51606763c74SThomas Petazzoni 51706763c74SThomas Petazzoni module_platform_driver(armada_xp_pinctrl_driver); 51806763c74SThomas Petazzoni 51906763c74SThomas Petazzoni MODULE_AUTHOR("Thomas Petazzoni <thomas.petazzoni@free-electrons.com>"); 52006763c74SThomas Petazzoni MODULE_DESCRIPTION("Marvell Armada XP pinctrl driver"); 52106763c74SThomas Petazzoni MODULE_LICENSE("GPL v2"); 522