xref: /linux/drivers/pinctrl/mvebu/pinctrl-armada-375.c (revision 24168c5e6dfbdd5b414f048f47f75d64533296ca)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Marvell Armada 375 pinctrl driver based on mvebu pinctrl core
4  *
5  * Copyright (C) 2012 Marvell
6  *
7  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
8  */
9 
10 #include <linux/err.h>
11 #include <linux/init.h>
12 #include <linux/io.h>
13 #include <linux/platform_device.h>
14 #include <linux/clk.h>
15 #include <linux/of.h>
16 #include <linux/pinctrl/pinctrl.h>
17 
18 #include "pinctrl-mvebu.h"
19 
20 static struct mvebu_mpp_mode mv88f6720_mpp_modes[] = {
21 	MPP_MODE(0,
22 		 MPP_FUNCTION(0x0, "gpio", NULL),
23 		 MPP_FUNCTION(0x1, "dev", "ad2"),
24 		 MPP_FUNCTION(0x2, "spi0", "cs1"),
25 		 MPP_FUNCTION(0x3, "spi1", "cs1"),
26 		 MPP_FUNCTION(0x5, "nand", "io2")),
27 	MPP_MODE(1,
28 		 MPP_FUNCTION(0x0, "gpio", NULL),
29 		 MPP_FUNCTION(0x1, "dev", "ad3"),
30 		 MPP_FUNCTION(0x2, "spi0", "mosi"),
31 		 MPP_FUNCTION(0x3, "spi1", "mosi"),
32 		 MPP_FUNCTION(0x5, "nand", "io3")),
33 	MPP_MODE(2,
34 		 MPP_FUNCTION(0x0, "gpio", NULL),
35 		 MPP_FUNCTION(0x1, "dev", "ad4"),
36 		 MPP_FUNCTION(0x2, "ptp", "evreq"),
37 		 MPP_FUNCTION(0x3, "led", "c0"),
38 		 MPP_FUNCTION(0x4, "audio", "sdi"),
39 		 MPP_FUNCTION(0x5, "nand", "io4"),
40 		 MPP_FUNCTION(0x6, "spi1", "mosi")),
41 	MPP_MODE(3,
42 		 MPP_FUNCTION(0x0, "gpio", NULL),
43 		 MPP_FUNCTION(0x1, "dev", "ad5"),
44 		 MPP_FUNCTION(0x2, "ptp", "trig"),
45 		 MPP_FUNCTION(0x3, "led", "p3"),
46 		 MPP_FUNCTION(0x4, "audio", "mclk"),
47 		 MPP_FUNCTION(0x5, "nand", "io5"),
48 		 MPP_FUNCTION(0x6, "spi1", "miso")),
49 	MPP_MODE(4,
50 		 MPP_FUNCTION(0x0, "gpio", NULL),
51 		 MPP_FUNCTION(0x1, "dev", "ad6"),
52 		 MPP_FUNCTION(0x2, "spi0", "miso"),
53 		 MPP_FUNCTION(0x3, "spi1", "miso"),
54 		 MPP_FUNCTION(0x5, "nand", "io6")),
55 	MPP_MODE(5,
56 		 MPP_FUNCTION(0x0, "gpio", NULL),
57 		 MPP_FUNCTION(0x1, "dev", "ad7"),
58 		 MPP_FUNCTION(0x2, "spi0", "cs2"),
59 		 MPP_FUNCTION(0x3, "spi1", "cs2"),
60 		 MPP_FUNCTION(0x5, "nand", "io7"),
61 		 MPP_FUNCTION(0x6, "spi1", "miso")),
62 	MPP_MODE(6,
63 		 MPP_FUNCTION(0x0, "gpio", NULL),
64 		 MPP_FUNCTION(0x1, "dev", "ad0"),
65 		 MPP_FUNCTION(0x3, "led", "p1"),
66 		 MPP_FUNCTION(0x4, "audio", "lrclk"),
67 		 MPP_FUNCTION(0x5, "nand", "io0")),
68 	MPP_MODE(7,
69 		 MPP_FUNCTION(0x0, "gpio", NULL),
70 		 MPP_FUNCTION(0x1, "dev", "ad1"),
71 		 MPP_FUNCTION(0x2, "ptp", "clk"),
72 		 MPP_FUNCTION(0x3, "led", "p2"),
73 		 MPP_FUNCTION(0x4, "audio", "extclk"),
74 		 MPP_FUNCTION(0x5, "nand", "io1")),
75 	MPP_MODE(8,
76 		 MPP_FUNCTION(0x0, "gpio", NULL),
77 		 MPP_FUNCTION(0x1, "dev", "bootcs"),
78 		 MPP_FUNCTION(0x2, "spi0", "cs0"),
79 		 MPP_FUNCTION(0x3, "spi1", "cs0"),
80 		 MPP_FUNCTION(0x5, "nand", "ce")),
81 	MPP_MODE(9,
82 		 MPP_FUNCTION(0x0, "gpio", NULL),
83 		 MPP_FUNCTION(0x2, "spi0", "sck"),
84 		 MPP_FUNCTION(0x3, "spi1", "sck"),
85 		 MPP_FUNCTION(0x5, "nand", "we")),
86 	MPP_MODE(10,
87 		 MPP_FUNCTION(0x0, "gpio", NULL),
88 		 MPP_FUNCTION(0x2, "dram", "vttctrl"),
89 		 MPP_FUNCTION(0x3, "led", "c1"),
90 		 MPP_FUNCTION(0x5, "nand", "re"),
91 		 MPP_FUNCTION(0x6, "spi1", "sck")),
92 	MPP_MODE(11,
93 		 MPP_FUNCTION(0x0, "gpio", NULL),
94 		 MPP_FUNCTION(0x1, "dev", "a0"),
95 		 MPP_FUNCTION(0x3, "led", "c2"),
96 		 MPP_FUNCTION(0x4, "audio", "sdo"),
97 		 MPP_FUNCTION(0x5, "nand", "cle")),
98 	MPP_MODE(12,
99 		 MPP_FUNCTION(0x0, "gpio", NULL),
100 		 MPP_FUNCTION(0x1, "dev", "a1"),
101 		 MPP_FUNCTION(0x4, "audio", "bclk"),
102 		 MPP_FUNCTION(0x5, "nand", "ale")),
103 	MPP_MODE(13,
104 		 MPP_FUNCTION(0x0, "gpio", NULL),
105 		 MPP_FUNCTION(0x1, "dev", "ready"),
106 		 MPP_FUNCTION(0x2, "pcie0", "rstout"),
107 		 MPP_FUNCTION(0x3, "pcie1", "rstout"),
108 		 MPP_FUNCTION(0x5, "nand", "rb"),
109 		 MPP_FUNCTION(0x6, "spi1", "mosi")),
110 	MPP_MODE(14,
111 		 MPP_FUNCTION(0x0, "gpio", NULL),
112 		 MPP_FUNCTION(0x2, "i2c0", "sda"),
113 		 MPP_FUNCTION(0x3, "uart1", "txd")),
114 	MPP_MODE(15,
115 		 MPP_FUNCTION(0x0, "gpio", NULL),
116 		 MPP_FUNCTION(0x2, "i2c0", "sck"),
117 		 MPP_FUNCTION(0x3, "uart1", "rxd")),
118 	MPP_MODE(16,
119 		 MPP_FUNCTION(0x0, "gpio", NULL),
120 		 MPP_FUNCTION(0x2, "uart0", "txd")),
121 	MPP_MODE(17,
122 		 MPP_FUNCTION(0x0, "gpio", NULL),
123 		 MPP_FUNCTION(0x2, "uart0", "rxd")),
124 	MPP_MODE(18,
125 		 MPP_FUNCTION(0x0, "gpio", NULL),
126 		 MPP_FUNCTION(0x2, "tdm", "int")),
127 	MPP_MODE(19,
128 		 MPP_FUNCTION(0x0, "gpio", NULL),
129 		 MPP_FUNCTION(0x2, "tdm", "rst")),
130 	MPP_MODE(20,
131 		 MPP_FUNCTION(0x0, "gpio", NULL),
132 		 MPP_FUNCTION(0x2, "tdm", "pclk")),
133 	MPP_MODE(21,
134 		 MPP_FUNCTION(0x0, "gpio", NULL),
135 		 MPP_FUNCTION(0x2, "tdm", "fsync")),
136 	MPP_MODE(22,
137 		 MPP_FUNCTION(0x0, "gpio", NULL),
138 		 MPP_FUNCTION(0x2, "tdm", "drx")),
139 	MPP_MODE(23,
140 		 MPP_FUNCTION(0x0, "gpio", NULL),
141 		 MPP_FUNCTION(0x2, "tdm", "dtx")),
142 	MPP_MODE(24,
143 		 MPP_FUNCTION(0x0, "gpio", NULL),
144 		 MPP_FUNCTION(0x1, "led", "p0"),
145 		 MPP_FUNCTION(0x2, "ge1", "rxd0"),
146 		 MPP_FUNCTION(0x3, "sd", "cmd"),
147 		 MPP_FUNCTION(0x4, "uart0", "rts"),
148 		 MPP_FUNCTION(0x5, "spi0", "cs0"),
149 		 MPP_FUNCTION(0x6, "dev", "cs1")),
150 	MPP_MODE(25,
151 		 MPP_FUNCTION(0x0, "gpio", NULL),
152 		 MPP_FUNCTION(0x1, "led", "p2"),
153 		 MPP_FUNCTION(0x2, "ge1", "rxd1"),
154 		 MPP_FUNCTION(0x3, "sd", "d0"),
155 		 MPP_FUNCTION(0x4, "uart0", "cts"),
156 		 MPP_FUNCTION(0x5, "spi0", "mosi"),
157 		 MPP_FUNCTION(0x6, "dev", "cs2")),
158 	MPP_MODE(26,
159 		 MPP_FUNCTION(0x0, "gpio", NULL),
160 		 MPP_FUNCTION(0x1, "pcie0", "clkreq"),
161 		 MPP_FUNCTION(0x2, "ge1", "rxd2"),
162 		 MPP_FUNCTION(0x3, "sd", "d2"),
163 		 MPP_FUNCTION(0x4, "uart1", "rts"),
164 		 MPP_FUNCTION(0x5, "spi0", "cs1"),
165 		 MPP_FUNCTION(0x6, "led", "c1")),
166 	MPP_MODE(27,
167 		 MPP_FUNCTION(0x0, "gpio", NULL),
168 		 MPP_FUNCTION(0x1, "pcie1", "clkreq"),
169 		 MPP_FUNCTION(0x2, "ge1", "rxd3"),
170 		 MPP_FUNCTION(0x3, "sd", "d1"),
171 		 MPP_FUNCTION(0x4, "uart1", "cts"),
172 		 MPP_FUNCTION(0x5, "spi0", "miso"),
173 		 MPP_FUNCTION(0x6, "led", "c2")),
174 	MPP_MODE(28,
175 		 MPP_FUNCTION(0x0, "gpio", NULL),
176 		 MPP_FUNCTION(0x1, "led", "p3"),
177 		 MPP_FUNCTION(0x2, "ge1", "txctl"),
178 		 MPP_FUNCTION(0x3, "sd", "clk"),
179 		 MPP_FUNCTION(0x5, "dram", "vttctrl")),
180 	MPP_MODE(29,
181 		 MPP_FUNCTION(0x0, "gpio", NULL),
182 		 MPP_FUNCTION(0x1, "pcie1", "clkreq"),
183 		 MPP_FUNCTION(0x2, "ge1", "rxclk"),
184 		 MPP_FUNCTION(0x3, "sd", "d3"),
185 		 MPP_FUNCTION(0x5, "spi0", "sck"),
186 		 MPP_FUNCTION(0x6, "pcie0", "rstout")),
187 	MPP_MODE(30,
188 		 MPP_FUNCTION(0x0, "gpio", NULL),
189 		 MPP_FUNCTION(0x2, "ge1", "txd0"),
190 		 MPP_FUNCTION(0x3, "spi1", "cs0"),
191 		 MPP_FUNCTION(0x5, "led", "p3"),
192 		 MPP_FUNCTION(0x6, "ptp", "evreq")),
193 	MPP_MODE(31,
194 		 MPP_FUNCTION(0x0, "gpio", NULL),
195 		 MPP_FUNCTION(0x2, "ge1", "txd1"),
196 		 MPP_FUNCTION(0x3, "spi1", "mosi"),
197 		 MPP_FUNCTION(0x5, "led", "p0")),
198 	MPP_MODE(32,
199 		 MPP_FUNCTION(0x0, "gpio", NULL),
200 		 MPP_FUNCTION(0x2, "ge1", "txd2"),
201 		 MPP_FUNCTION(0x3, "spi1", "sck"),
202 		 MPP_FUNCTION(0x4, "ptp", "trig"),
203 		 MPP_FUNCTION(0x5, "led", "c0")),
204 	MPP_MODE(33,
205 		 MPP_FUNCTION(0x0, "gpio", NULL),
206 		 MPP_FUNCTION(0x2, "ge1", "txd3"),
207 		 MPP_FUNCTION(0x3, "spi1", "miso"),
208 		 MPP_FUNCTION(0x5, "led", "p2")),
209 	MPP_MODE(34,
210 		 MPP_FUNCTION(0x0, "gpio", NULL),
211 		 MPP_FUNCTION(0x2, "ge1", "txclkout"),
212 		 MPP_FUNCTION(0x3, "spi1", "sck"),
213 		 MPP_FUNCTION(0x5, "led", "c1")),
214 	MPP_MODE(35,
215 		 MPP_FUNCTION(0x0, "gpio", NULL),
216 		 MPP_FUNCTION(0x2, "ge1", "rxctl"),
217 		 MPP_FUNCTION(0x3, "spi1", "cs1"),
218 		 MPP_FUNCTION(0x4, "spi0", "cs2"),
219 		 MPP_FUNCTION(0x5, "led", "p1")),
220 	MPP_MODE(36,
221 		 MPP_FUNCTION(0x0, "gpio", NULL),
222 		 MPP_FUNCTION(0x1, "pcie0", "clkreq"),
223 		 MPP_FUNCTION(0x5, "led", "c2")),
224 	MPP_MODE(37,
225 		 MPP_FUNCTION(0x0, "gpio", NULL),
226 		 MPP_FUNCTION(0x1, "pcie0", "clkreq"),
227 		 MPP_FUNCTION(0x2, "tdm", "int"),
228 		 MPP_FUNCTION(0x4, "ge", "mdc")),
229 	MPP_MODE(38,
230 		 MPP_FUNCTION(0x0, "gpio", NULL),
231 		 MPP_FUNCTION(0x1, "pcie1", "clkreq"),
232 		 MPP_FUNCTION(0x4, "ge", "mdio")),
233 	MPP_MODE(39,
234 		 MPP_FUNCTION(0x0, "gpio", NULL),
235 		 MPP_FUNCTION(0x4, "ref", "clkout"),
236 		 MPP_FUNCTION(0x5, "led", "p3")),
237 	MPP_MODE(40,
238 		 MPP_FUNCTION(0x0, "gpio", NULL),
239 		 MPP_FUNCTION(0x4, "uart1", "txd"),
240 		 MPP_FUNCTION(0x5, "led", "p0")),
241 	MPP_MODE(41,
242 		 MPP_FUNCTION(0x0, "gpio", NULL),
243 		 MPP_FUNCTION(0x4, "uart1", "rxd"),
244 		 MPP_FUNCTION(0x5, "led", "p1")),
245 	MPP_MODE(42,
246 		 MPP_FUNCTION(0x0, "gpio", NULL),
247 		 MPP_FUNCTION(0x3, "spi1", "cs2"),
248 		 MPP_FUNCTION(0x4, "led", "c0"),
249 		 MPP_FUNCTION(0x6, "ptp", "clk")),
250 	MPP_MODE(43,
251 		 MPP_FUNCTION(0x0, "gpio", NULL),
252 		 MPP_FUNCTION(0x2, "sata0", "prsnt"),
253 		 MPP_FUNCTION(0x4, "dram", "vttctrl"),
254 		 MPP_FUNCTION(0x5, "led", "c1")),
255 	MPP_MODE(44,
256 		 MPP_FUNCTION(0x0, "gpio", NULL),
257 		 MPP_FUNCTION(0x4, "sata0", "prsnt")),
258 	MPP_MODE(45,
259 		 MPP_FUNCTION(0x0, "gpio", NULL),
260 		 MPP_FUNCTION(0x2, "spi0", "cs2"),
261 		 MPP_FUNCTION(0x4, "pcie0", "rstout"),
262 		 MPP_FUNCTION(0x5, "led", "c2"),
263 		 MPP_FUNCTION(0x6, "spi1", "cs2")),
264 	MPP_MODE(46,
265 		 MPP_FUNCTION(0x0, "gpio", NULL),
266 		 MPP_FUNCTION(0x1, "led", "p0"),
267 		 MPP_FUNCTION(0x2, "ge0", "txd0"),
268 		 MPP_FUNCTION(0x3, "ge1", "txd0"),
269 		 MPP_FUNCTION(0x6, "dev", "we1")),
270 	MPP_MODE(47,
271 		 MPP_FUNCTION(0x0, "gpio", NULL),
272 		 MPP_FUNCTION(0x1, "led", "p1"),
273 		 MPP_FUNCTION(0x2, "ge0", "txd1"),
274 		 MPP_FUNCTION(0x3, "ge1", "txd1"),
275 		 MPP_FUNCTION(0x5, "ptp", "trig"),
276 		 MPP_FUNCTION(0x6, "dev", "ale0")),
277 	MPP_MODE(48,
278 		 MPP_FUNCTION(0x0, "gpio", NULL),
279 		 MPP_FUNCTION(0x1, "led", "p2"),
280 		 MPP_FUNCTION(0x2, "ge0", "txd2"),
281 		 MPP_FUNCTION(0x3, "ge1", "txd2"),
282 		 MPP_FUNCTION(0x6, "dev", "ale1")),
283 	MPP_MODE(49,
284 		 MPP_FUNCTION(0x0, "gpio", NULL),
285 		 MPP_FUNCTION(0x1, "led", "p3"),
286 		 MPP_FUNCTION(0x2, "ge0", "txd3"),
287 		 MPP_FUNCTION(0x3, "ge1", "txd3"),
288 		 MPP_FUNCTION(0x6, "dev", "a2")),
289 	MPP_MODE(50,
290 		 MPP_FUNCTION(0x0, "gpio", NULL),
291 		 MPP_FUNCTION(0x1, "led", "c0"),
292 		 MPP_FUNCTION(0x2, "ge0", "rxd0"),
293 		 MPP_FUNCTION(0x3, "ge1", "rxd0"),
294 		 MPP_FUNCTION(0x5, "ptp", "evreq"),
295 		 MPP_FUNCTION(0x6, "dev", "ad12")),
296 	MPP_MODE(51,
297 		 MPP_FUNCTION(0x0, "gpio", NULL),
298 		 MPP_FUNCTION(0x1, "led", "c1"),
299 		 MPP_FUNCTION(0x2, "ge0", "rxd1"),
300 		 MPP_FUNCTION(0x3, "ge1", "rxd1"),
301 		 MPP_FUNCTION(0x6, "dev", "ad8")),
302 	MPP_MODE(52,
303 		 MPP_FUNCTION(0x0, "gpio", NULL),
304 		 MPP_FUNCTION(0x1, "led", "c2"),
305 		 MPP_FUNCTION(0x2, "ge0", "rxd2"),
306 		 MPP_FUNCTION(0x3, "ge1", "rxd2"),
307 		 MPP_FUNCTION(0x5, "i2c0", "sda"),
308 		 MPP_FUNCTION(0x6, "dev", "ad9")),
309 	MPP_MODE(53,
310 		 MPP_FUNCTION(0x0, "gpio", NULL),
311 		 MPP_FUNCTION(0x1, "pcie1", "rstout"),
312 		 MPP_FUNCTION(0x2, "ge0", "rxd3"),
313 		 MPP_FUNCTION(0x3, "ge1", "rxd3"),
314 		 MPP_FUNCTION(0x5, "i2c0", "sck"),
315 		 MPP_FUNCTION(0x6, "dev", "ad10")),
316 	MPP_MODE(54,
317 		 MPP_FUNCTION(0x0, "gpio", NULL),
318 		 MPP_FUNCTION(0x1, "pcie0", "rstout"),
319 		 MPP_FUNCTION(0x2, "ge0", "rxctl"),
320 		 MPP_FUNCTION(0x3, "ge1", "rxctl"),
321 		 MPP_FUNCTION(0x6, "dev", "ad11")),
322 	MPP_MODE(55,
323 		 MPP_FUNCTION(0x0, "gpio", NULL),
324 		 MPP_FUNCTION(0x2, "ge0", "rxclk"),
325 		 MPP_FUNCTION(0x3, "ge1", "rxclk"),
326 		 MPP_FUNCTION(0x6, "dev", "cs0")),
327 	MPP_MODE(56,
328 		 MPP_FUNCTION(0x0, "gpio", NULL),
329 		 MPP_FUNCTION(0x2, "ge0", "txclkout"),
330 		 MPP_FUNCTION(0x3, "ge1", "txclkout"),
331 		 MPP_FUNCTION(0x6, "dev", "oe")),
332 	MPP_MODE(57,
333 		 MPP_FUNCTION(0x0, "gpio", NULL),
334 		 MPP_FUNCTION(0x2, "ge0", "txctl"),
335 		 MPP_FUNCTION(0x3, "ge1", "txctl"),
336 		 MPP_FUNCTION(0x6, "dev", "we0")),
337 	MPP_MODE(58,
338 		 MPP_FUNCTION(0x0, "gpio", NULL),
339 		 MPP_FUNCTION(0x4, "led", "c0")),
340 	MPP_MODE(59,
341 		 MPP_FUNCTION(0x0, "gpio", NULL),
342 		 MPP_FUNCTION(0x4, "led", "c1")),
343 	MPP_MODE(60,
344 		 MPP_FUNCTION(0x0, "gpio", NULL),
345 		 MPP_FUNCTION(0x2, "uart1", "txd"),
346 		 MPP_FUNCTION(0x4, "led", "c2"),
347 		 MPP_FUNCTION(0x6, "dev", "ad13")),
348 	MPP_MODE(61,
349 		 MPP_FUNCTION(0x0, "gpio", NULL),
350 		 MPP_FUNCTION(0x1, "i2c1", "sda"),
351 		 MPP_FUNCTION(0x2, "uart1", "rxd"),
352 		 MPP_FUNCTION(0x3, "spi1", "cs2"),
353 		 MPP_FUNCTION(0x4, "led", "p0"),
354 		 MPP_FUNCTION(0x6, "dev", "ad14")),
355 	MPP_MODE(62,
356 		 MPP_FUNCTION(0x0, "gpio", NULL),
357 		 MPP_FUNCTION(0x1, "i2c1", "sck"),
358 		 MPP_FUNCTION(0x4, "led", "p1"),
359 		 MPP_FUNCTION(0x6, "dev", "ad15")),
360 	MPP_MODE(63,
361 		 MPP_FUNCTION(0x0, "gpio", NULL),
362 		 MPP_FUNCTION(0x2, "ptp", "trig"),
363 		 MPP_FUNCTION(0x4, "led", "p2"),
364 		 MPP_FUNCTION(0x6, "dev", "burst/last")),
365 	MPP_MODE(64,
366 		 MPP_FUNCTION(0x0, "gpio", NULL),
367 		 MPP_FUNCTION(0x2, "dram", "vttctrl"),
368 		 MPP_FUNCTION(0x4, "led", "p3")),
369 	MPP_MODE(65,
370 		 MPP_FUNCTION(0x0, "gpio", NULL),
371 		 MPP_FUNCTION(0x1, "sata1", "prsnt")),
372 	MPP_MODE(66,
373 		 MPP_FUNCTION(0x0, "gpio", NULL),
374 		 MPP_FUNCTION(0x2, "ptp", "evreq"),
375 		 MPP_FUNCTION(0x4, "spi1", "cs3"),
376 		 MPP_FUNCTION(0x5, "pcie0", "rstout"),
377 		 MPP_FUNCTION(0x6, "dev", "cs3")),
378 };
379 
380 static struct mvebu_pinctrl_soc_info armada_375_pinctrl_info;
381 
382 static const struct of_device_id armada_375_pinctrl_of_match[] = {
383 	{ .compatible = "marvell,mv88f6720-pinctrl" },
384 	{ },
385 };
386 
387 static const struct mvebu_mpp_ctrl mv88f6720_mpp_controls[] = {
388 	MPP_FUNC_CTRL(0, 69, NULL, mvebu_mmio_mpp_ctrl),
389 };
390 
391 static struct pinctrl_gpio_range mv88f6720_mpp_gpio_ranges[] = {
392 	MPP_GPIO_RANGE(0,   0,  0, 32),
393 	MPP_GPIO_RANGE(1,  32, 32, 32),
394 	MPP_GPIO_RANGE(2,  64, 64,  3),
395 };
396 
397 static int armada_375_pinctrl_probe(struct platform_device *pdev)
398 {
399 	struct mvebu_pinctrl_soc_info *soc = &armada_375_pinctrl_info;
400 
401 	soc->variant = 0; /* no variants for Armada 375 */
402 	soc->controls = mv88f6720_mpp_controls;
403 	soc->ncontrols = ARRAY_SIZE(mv88f6720_mpp_controls);
404 	soc->modes = mv88f6720_mpp_modes;
405 	soc->nmodes = ARRAY_SIZE(mv88f6720_mpp_modes);
406 	soc->gpioranges = mv88f6720_mpp_gpio_ranges;
407 	soc->ngpioranges = ARRAY_SIZE(mv88f6720_mpp_gpio_ranges);
408 
409 	pdev->dev.platform_data = soc;
410 
411 	return mvebu_pinctrl_simple_mmio_probe(pdev);
412 }
413 
414 static struct platform_driver armada_375_pinctrl_driver = {
415 	.driver = {
416 		.name = "armada-375-pinctrl",
417 		.of_match_table = of_match_ptr(armada_375_pinctrl_of_match),
418 	},
419 	.probe = armada_375_pinctrl_probe,
420 };
421 builtin_platform_driver(armada_375_pinctrl_driver);
422