1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Pin controller and GPIO driver for Amlogic Meson8b. 4 * 5 * Copyright (C) 2015 Endless Mobile, Inc. 6 * Author: Carlo Caione <carlo@endlessm.com> 7 */ 8 9 #include <dt-bindings/gpio/meson8b-gpio.h> 10 #include "pinctrl-meson.h" 11 #include "pinctrl-meson8-pmx.h" 12 13 static const struct pinctrl_pin_desc meson8b_cbus_pins[] = { 14 MESON_PIN(GPIOX_0), 15 MESON_PIN(GPIOX_1), 16 MESON_PIN(GPIOX_2), 17 MESON_PIN(GPIOX_3), 18 MESON_PIN(GPIOX_4), 19 MESON_PIN(GPIOX_5), 20 MESON_PIN(GPIOX_6), 21 MESON_PIN(GPIOX_7), 22 MESON_PIN(GPIOX_8), 23 MESON_PIN(GPIOX_9), 24 MESON_PIN(GPIOX_10), 25 MESON_PIN(GPIOX_11), 26 MESON_PIN(GPIOX_16), 27 MESON_PIN(GPIOX_17), 28 MESON_PIN(GPIOX_18), 29 MESON_PIN(GPIOX_19), 30 MESON_PIN(GPIOX_20), 31 MESON_PIN(GPIOX_21), 32 33 MESON_PIN(GPIOY_0), 34 MESON_PIN(GPIOY_1), 35 MESON_PIN(GPIOY_3), 36 MESON_PIN(GPIOY_6), 37 MESON_PIN(GPIOY_7), 38 MESON_PIN(GPIOY_8), 39 MESON_PIN(GPIOY_9), 40 MESON_PIN(GPIOY_10), 41 MESON_PIN(GPIOY_11), 42 MESON_PIN(GPIOY_12), 43 MESON_PIN(GPIOY_13), 44 MESON_PIN(GPIOY_14), 45 46 MESON_PIN(GPIODV_9), 47 MESON_PIN(GPIODV_24), 48 MESON_PIN(GPIODV_25), 49 MESON_PIN(GPIODV_26), 50 MESON_PIN(GPIODV_27), 51 MESON_PIN(GPIODV_28), 52 MESON_PIN(GPIODV_29), 53 54 MESON_PIN(GPIOH_0), 55 MESON_PIN(GPIOH_1), 56 MESON_PIN(GPIOH_2), 57 MESON_PIN(GPIOH_3), 58 MESON_PIN(GPIOH_4), 59 MESON_PIN(GPIOH_5), 60 MESON_PIN(GPIOH_6), 61 MESON_PIN(GPIOH_7), 62 MESON_PIN(GPIOH_8), 63 MESON_PIN(GPIOH_9), 64 65 MESON_PIN(CARD_0), 66 MESON_PIN(CARD_1), 67 MESON_PIN(CARD_2), 68 MESON_PIN(CARD_3), 69 MESON_PIN(CARD_4), 70 MESON_PIN(CARD_5), 71 MESON_PIN(CARD_6), 72 73 MESON_PIN(BOOT_0), 74 MESON_PIN(BOOT_1), 75 MESON_PIN(BOOT_2), 76 MESON_PIN(BOOT_3), 77 MESON_PIN(BOOT_4), 78 MESON_PIN(BOOT_5), 79 MESON_PIN(BOOT_6), 80 MESON_PIN(BOOT_7), 81 MESON_PIN(BOOT_8), 82 MESON_PIN(BOOT_9), 83 MESON_PIN(BOOT_10), 84 MESON_PIN(BOOT_11), 85 MESON_PIN(BOOT_12), 86 MESON_PIN(BOOT_13), 87 MESON_PIN(BOOT_14), 88 MESON_PIN(BOOT_15), 89 MESON_PIN(BOOT_16), 90 MESON_PIN(BOOT_17), 91 MESON_PIN(BOOT_18), 92 93 MESON_PIN(DIF_0_P), 94 MESON_PIN(DIF_0_N), 95 MESON_PIN(DIF_1_P), 96 MESON_PIN(DIF_1_N), 97 MESON_PIN(DIF_2_P), 98 MESON_PIN(DIF_2_N), 99 MESON_PIN(DIF_3_P), 100 MESON_PIN(DIF_3_N), 101 MESON_PIN(DIF_4_P), 102 MESON_PIN(DIF_4_N), 103 }; 104 105 static const struct pinctrl_pin_desc meson8b_aobus_pins[] = { 106 MESON_PIN(GPIOAO_0), 107 MESON_PIN(GPIOAO_1), 108 MESON_PIN(GPIOAO_2), 109 MESON_PIN(GPIOAO_3), 110 MESON_PIN(GPIOAO_4), 111 MESON_PIN(GPIOAO_5), 112 MESON_PIN(GPIOAO_6), 113 MESON_PIN(GPIOAO_7), 114 MESON_PIN(GPIOAO_8), 115 MESON_PIN(GPIOAO_9), 116 MESON_PIN(GPIOAO_10), 117 MESON_PIN(GPIOAO_11), 118 MESON_PIN(GPIOAO_12), 119 MESON_PIN(GPIOAO_13), 120 121 /* 122 * The following 2 pins are not mentionned in the public datasheet 123 * According to this datasheet, they can't be used with the gpio 124 * interrupt controller 125 */ 126 MESON_PIN(GPIO_BSD_EN), 127 MESON_PIN(GPIO_TEST_N), 128 }; 129 130 /* bank X */ 131 static const unsigned int sd_d0_a_pins[] = { GPIOX_0 }; 132 static const unsigned int sd_d1_a_pins[] = { GPIOX_1 }; 133 static const unsigned int sd_d2_a_pins[] = { GPIOX_2 }; 134 static const unsigned int sd_d3_a_pins[] = { GPIOX_3 }; 135 static const unsigned int sdxc_d0_0_a_pins[] = { GPIOX_4 }; 136 static const unsigned int sdxc_d47_a_pins[] = { GPIOX_4, GPIOX_5, 137 GPIOX_6, GPIOX_7 }; 138 static const unsigned int sdxc_d13_0_a_pins[] = { GPIOX_5, GPIOX_6, 139 GPIOX_7 }; 140 static const unsigned int sd_clk_a_pins[] = { GPIOX_8 }; 141 static const unsigned int sd_cmd_a_pins[] = { GPIOX_9 }; 142 static const unsigned int xtal_32k_out_pins[] = { GPIOX_10 }; 143 static const unsigned int xtal_24m_out_pins[] = { GPIOX_11 }; 144 static const unsigned int uart_tx_b0_pins[] = { GPIOX_16 }; 145 static const unsigned int uart_rx_b0_pins[] = { GPIOX_17 }; 146 static const unsigned int uart_cts_b0_pins[] = { GPIOX_18 }; 147 static const unsigned int uart_rts_b0_pins[] = { GPIOX_19 }; 148 149 static const unsigned int sdxc_d0_1_a_pins[] = { GPIOX_0 }; 150 static const unsigned int sdxc_d13_1_a_pins[] = { GPIOX_1, GPIOX_2, 151 GPIOX_3 }; 152 static const unsigned int pcm_out_a_pins[] = { GPIOX_4 }; 153 static const unsigned int pcm_in_a_pins[] = { GPIOX_5 }; 154 static const unsigned int pcm_fs_a_pins[] = { GPIOX_6 }; 155 static const unsigned int pcm_clk_a_pins[] = { GPIOX_7 }; 156 static const unsigned int sdxc_clk_a_pins[] = { GPIOX_8 }; 157 static const unsigned int sdxc_cmd_a_pins[] = { GPIOX_9 }; 158 static const unsigned int pwm_vs_0_pins[] = { GPIOX_10 }; 159 static const unsigned int pwm_e_pins[] = { GPIOX_10 }; 160 static const unsigned int pwm_vs_1_pins[] = { GPIOX_11 }; 161 162 static const unsigned int uart_tx_a_pins[] = { GPIOX_4 }; 163 static const unsigned int uart_rx_a_pins[] = { GPIOX_5 }; 164 static const unsigned int uart_cts_a_pins[] = { GPIOX_6 }; 165 static const unsigned int uart_rts_a_pins[] = { GPIOX_7 }; 166 static const unsigned int uart_tx_b1_pins[] = { GPIOX_8 }; 167 static const unsigned int uart_rx_b1_pins[] = { GPIOX_9 }; 168 static const unsigned int uart_cts_b1_pins[] = { GPIOX_10 }; 169 static const unsigned int uart_rts_b1_pins[] = { GPIOX_20 }; 170 171 static const unsigned int iso7816_0_clk_pins[] = { GPIOX_6 }; 172 static const unsigned int iso7816_0_data_pins[] = { GPIOX_7 }; 173 static const unsigned int spi_sclk_0_pins[] = { GPIOX_8 }; 174 static const unsigned int spi_miso_0_pins[] = { GPIOX_9 }; 175 static const unsigned int spi_mosi_0_pins[] = { GPIOX_10 }; 176 static const unsigned int iso7816_det_pins[] = { GPIOX_16 }; 177 static const unsigned int iso7816_reset_pins[] = { GPIOX_17 }; 178 static const unsigned int iso7816_1_clk_pins[] = { GPIOX_18 }; 179 static const unsigned int iso7816_1_data_pins[] = { GPIOX_19 }; 180 static const unsigned int spi_ss0_0_pins[] = { GPIOX_20 }; 181 182 static const unsigned int tsin_clk_b_pins[] = { GPIOX_8 }; 183 static const unsigned int tsin_sop_b_pins[] = { GPIOX_9 }; 184 static const unsigned int tsin_d0_b_pins[] = { GPIOX_10 }; 185 static const unsigned int pwm_b_pins[] = { GPIOX_11 }; 186 static const unsigned int i2c_sda_d0_pins[] = { GPIOX_16 }; 187 static const unsigned int i2c_sck_d0_pins[] = { GPIOX_17 }; 188 static const unsigned int tsin_d_valid_b_pins[] = { GPIOX_20 }; 189 190 /* bank Y */ 191 static const unsigned int tsin_d_valid_a_pins[] = { GPIOY_0 }; 192 static const unsigned int tsin_sop_a_pins[] = { GPIOY_1 }; 193 static const unsigned int tsin_d17_a_pins[] = { 194 GPIOY_6, GPIOY_7, GPIOY_10, GPIOY_11, GPIOY_12, GPIOY_13, GPIOY_14, 195 }; 196 static const unsigned int tsin_clk_a_pins[] = { GPIOY_8 }; 197 static const unsigned int tsin_d0_a_pins[] = { GPIOY_9 }; 198 199 static const unsigned int spdif_out_0_pins[] = { GPIOY_3 }; 200 201 static const unsigned int xtal_24m_pins[] = { GPIOY_3 }; 202 static const unsigned int iso7816_2_clk_pins[] = { GPIOY_13 }; 203 static const unsigned int iso7816_2_data_pins[] = { GPIOY_14 }; 204 205 /* bank DV */ 206 static const unsigned int pwm_d_pins[] = { GPIODV_28 }; 207 static const unsigned int pwm_c0_pins[] = { GPIODV_29 }; 208 209 static const unsigned int pwm_vs_2_pins[] = { GPIODV_9 }; 210 static const unsigned int pwm_vs_3_pins[] = { GPIODV_28 }; 211 static const unsigned int pwm_vs_4_pins[] = { GPIODV_29 }; 212 213 static const unsigned int xtal24_out_pins[] = { GPIODV_29 }; 214 215 static const unsigned int uart_tx_c_pins[] = { GPIODV_24 }; 216 static const unsigned int uart_rx_c_pins[] = { GPIODV_25 }; 217 static const unsigned int uart_cts_c_pins[] = { GPIODV_26 }; 218 static const unsigned int uart_rts_c_pins[] = { GPIODV_27 }; 219 220 static const unsigned int pwm_c1_pins[] = { GPIODV_9 }; 221 222 static const unsigned int i2c_sda_a_pins[] = { GPIODV_24 }; 223 static const unsigned int i2c_sck_a_pins[] = { GPIODV_25 }; 224 static const unsigned int i2c_sda_b0_pins[] = { GPIODV_26 }; 225 static const unsigned int i2c_sck_b0_pins[] = { GPIODV_27 }; 226 static const unsigned int i2c_sda_c0_pins[] = { GPIODV_28 }; 227 static const unsigned int i2c_sck_c0_pins[] = { GPIODV_29 }; 228 229 /* bank H */ 230 static const unsigned int hdmi_hpd_pins[] = { GPIOH_0 }; 231 static const unsigned int hdmi_sda_pins[] = { GPIOH_1 }; 232 static const unsigned int hdmi_scl_pins[] = { GPIOH_2 }; 233 static const unsigned int hdmi_cec_0_pins[] = { GPIOH_3 }; 234 static const unsigned int eth_txd1_0_pins[] = { GPIOH_5 }; 235 static const unsigned int eth_txd0_0_pins[] = { GPIOH_6 }; 236 static const unsigned int eth_rxd3_h_pins[] = { GPIOH_5 }; 237 static const unsigned int eth_rxd2_h_pins[] = { GPIOH_6 }; 238 static const unsigned int clk_24m_out_pins[] = { GPIOH_9 }; 239 240 static const unsigned int spi_ss1_pins[] = { GPIOH_0 }; 241 static const unsigned int spi_ss2_pins[] = { GPIOH_1 }; 242 static const unsigned int spi_ss0_1_pins[] = { GPIOH_3 }; 243 static const unsigned int spi_miso_1_pins[] = { GPIOH_4 }; 244 static const unsigned int spi_mosi_1_pins[] = { GPIOH_5 }; 245 static const unsigned int spi_sclk_1_pins[] = { GPIOH_6 }; 246 247 static const unsigned int eth_txd3_pins[] = { GPIOH_7 }; 248 static const unsigned int eth_txd2_pins[] = { GPIOH_8 }; 249 static const unsigned int eth_tx_clk_pins[] = { GPIOH_9 }; 250 251 static const unsigned int i2c_sda_b1_pins[] = { GPIOH_3 }; 252 static const unsigned int i2c_sck_b1_pins[] = { GPIOH_4 }; 253 static const unsigned int i2c_sda_c1_pins[] = { GPIOH_5 }; 254 static const unsigned int i2c_sck_c1_pins[] = { GPIOH_6 }; 255 static const unsigned int i2c_sda_d1_pins[] = { GPIOH_7 }; 256 static const unsigned int i2c_sck_d1_pins[] = { GPIOH_8 }; 257 258 /* bank BOOT */ 259 static const unsigned int nand_io_pins[] = { 260 BOOT_0, BOOT_1, BOOT_2, BOOT_3, BOOT_4, BOOT_5, BOOT_6, BOOT_7 261 }; 262 static const unsigned int nand_io_ce0_pins[] = { BOOT_8 }; 263 static const unsigned int nand_io_ce1_pins[] = { BOOT_9 }; 264 static const unsigned int nand_io_rb0_pins[] = { BOOT_10 }; 265 static const unsigned int nand_ale_pins[] = { BOOT_11 }; 266 static const unsigned int nand_cle_pins[] = { BOOT_12 }; 267 static const unsigned int nand_wen_clk_pins[] = { BOOT_13 }; 268 static const unsigned int nand_ren_clk_pins[] = { BOOT_14 }; 269 static const unsigned int nand_dqs_15_pins[] = { BOOT_15 }; 270 static const unsigned int nand_dqs_18_pins[] = { BOOT_18 }; 271 272 static const unsigned int sdxc_d0_c_pins[] = { BOOT_0}; 273 static const unsigned int sdxc_d13_c_pins[] = { BOOT_1, BOOT_2, 274 BOOT_3 }; 275 static const unsigned int sdxc_d47_c_pins[] = { BOOT_4, BOOT_5, 276 BOOT_6, BOOT_7 }; 277 static const unsigned int sdxc_clk_c_pins[] = { BOOT_8 }; 278 static const unsigned int sdxc_cmd_c_pins[] = { BOOT_10 }; 279 static const unsigned int nor_d_pins[] = { BOOT_11 }; 280 static const unsigned int nor_q_pins[] = { BOOT_12 }; 281 static const unsigned int nor_c_pins[] = { BOOT_13 }; 282 static const unsigned int nor_cs_pins[] = { BOOT_18 }; 283 284 static const unsigned int sd_d0_c_pins[] = { BOOT_0 }; 285 static const unsigned int sd_d1_c_pins[] = { BOOT_1 }; 286 static const unsigned int sd_d2_c_pins[] = { BOOT_2 }; 287 static const unsigned int sd_d3_c_pins[] = { BOOT_3 }; 288 static const unsigned int sd_cmd_c_pins[] = { BOOT_8 }; 289 static const unsigned int sd_clk_c_pins[] = { BOOT_10 }; 290 291 /* bank CARD */ 292 static const unsigned int sd_d1_b_pins[] = { CARD_0 }; 293 static const unsigned int sd_d0_b_pins[] = { CARD_1 }; 294 static const unsigned int sd_clk_b_pins[] = { CARD_2 }; 295 static const unsigned int sd_cmd_b_pins[] = { CARD_3 }; 296 static const unsigned int sd_d3_b_pins[] = { CARD_4 }; 297 static const unsigned int sd_d2_b_pins[] = { CARD_5 }; 298 299 static const unsigned int sdxc_d13_b_pins[] = { CARD_0, CARD_4, 300 CARD_5 }; 301 static const unsigned int sdxc_d0_b_pins[] = { CARD_1 }; 302 static const unsigned int sdxc_clk_b_pins[] = { CARD_2 }; 303 static const unsigned int sdxc_cmd_b_pins[] = { CARD_3 }; 304 305 /* bank AO */ 306 static const unsigned int uart_tx_ao_a_pins[] = { GPIOAO_0 }; 307 static const unsigned int uart_rx_ao_a_pins[] = { GPIOAO_1 }; 308 static const unsigned int uart_cts_ao_a_pins[] = { GPIOAO_2 }; 309 static const unsigned int uart_rts_ao_a_pins[] = { GPIOAO_3 }; 310 static const unsigned int i2c_mst_sck_ao_pins[] = { GPIOAO_4 }; 311 static const unsigned int i2c_mst_sda_ao_pins[] = { GPIOAO_5 }; 312 static const unsigned int clk_32k_in_out_pins[] = { GPIOAO_6 }; 313 static const unsigned int remote_input_pins[] = { GPIOAO_7 }; 314 static const unsigned int hdmi_cec_1_pins[] = { GPIOAO_12 }; 315 static const unsigned int ir_blaster_pins[] = { GPIOAO_13 }; 316 317 static const unsigned int pwm_c2_pins[] = { GPIOAO_3 }; 318 static const unsigned int i2c_sck_ao_pins[] = { GPIOAO_4 }; 319 static const unsigned int i2c_sda_ao_pins[] = { GPIOAO_5 }; 320 static const unsigned int ir_remote_out_pins[] = { GPIOAO_7 }; 321 static const unsigned int i2s_am_clk_out_pins[] = { GPIOAO_8 }; 322 static const unsigned int i2s_ao_clk_out_pins[] = { GPIOAO_9 }; 323 static const unsigned int i2s_lr_clk_out_pins[] = { GPIOAO_10 }; 324 static const unsigned int i2s_out_01_pins[] = { GPIOAO_11 }; 325 326 static const unsigned int uart_tx_ao_b0_pins[] = { GPIOAO_0 }; 327 static const unsigned int uart_rx_ao_b0_pins[] = { GPIOAO_1 }; 328 static const unsigned int uart_cts_ao_b_pins[] = { GPIOAO_2 }; 329 static const unsigned int uart_rts_ao_b_pins[] = { GPIOAO_3 }; 330 static const unsigned int uart_tx_ao_b1_pins[] = { GPIOAO_4 }; 331 static const unsigned int uart_rx_ao_b1_pins[] = { GPIOAO_5 }; 332 static const unsigned int spdif_out_1_pins[] = { GPIOAO_6 }; 333 334 static const unsigned int i2s_in_ch01_pins[] = { GPIOAO_6 }; 335 static const unsigned int i2s_ao_clk_in_pins[] = { GPIOAO_9 }; 336 static const unsigned int i2s_lr_clk_in_pins[] = { GPIOAO_10 }; 337 338 /* bank DIF */ 339 static const unsigned int eth_rxd1_pins[] = { DIF_0_P }; 340 static const unsigned int eth_rxd0_pins[] = { DIF_0_N }; 341 static const unsigned int eth_rx_dv_pins[] = { DIF_1_P }; 342 static const unsigned int eth_rx_clk_pins[] = { DIF_1_N }; 343 static const unsigned int eth_txd0_1_pins[] = { DIF_2_P }; 344 static const unsigned int eth_txd1_1_pins[] = { DIF_2_N }; 345 static const unsigned int eth_rxd3_pins[] = { DIF_2_P }; 346 static const unsigned int eth_rxd2_pins[] = { DIF_2_N }; 347 static const unsigned int eth_tx_en_pins[] = { DIF_3_P }; 348 static const unsigned int eth_ref_clk_pins[] = { DIF_3_N }; 349 static const unsigned int eth_mdc_pins[] = { DIF_4_P }; 350 static const unsigned int eth_mdio_en_pins[] = { DIF_4_N }; 351 352 static const struct meson_pmx_group meson8b_cbus_groups[] = { 353 GPIO_GROUP(GPIOX_0), 354 GPIO_GROUP(GPIOX_1), 355 GPIO_GROUP(GPIOX_2), 356 GPIO_GROUP(GPIOX_3), 357 GPIO_GROUP(GPIOX_4), 358 GPIO_GROUP(GPIOX_5), 359 GPIO_GROUP(GPIOX_6), 360 GPIO_GROUP(GPIOX_7), 361 GPIO_GROUP(GPIOX_8), 362 GPIO_GROUP(GPIOX_9), 363 GPIO_GROUP(GPIOX_10), 364 GPIO_GROUP(GPIOX_11), 365 GPIO_GROUP(GPIOX_16), 366 GPIO_GROUP(GPIOX_17), 367 GPIO_GROUP(GPIOX_18), 368 GPIO_GROUP(GPIOX_19), 369 GPIO_GROUP(GPIOX_20), 370 GPIO_GROUP(GPIOX_21), 371 372 GPIO_GROUP(GPIOY_0), 373 GPIO_GROUP(GPIOY_1), 374 GPIO_GROUP(GPIOY_3), 375 GPIO_GROUP(GPIOY_6), 376 GPIO_GROUP(GPIOY_7), 377 GPIO_GROUP(GPIOY_8), 378 GPIO_GROUP(GPIOY_9), 379 GPIO_GROUP(GPIOY_10), 380 GPIO_GROUP(GPIOY_11), 381 GPIO_GROUP(GPIOY_12), 382 GPIO_GROUP(GPIOY_13), 383 GPIO_GROUP(GPIOY_14), 384 385 GPIO_GROUP(GPIODV_9), 386 GPIO_GROUP(GPIODV_24), 387 GPIO_GROUP(GPIODV_25), 388 GPIO_GROUP(GPIODV_26), 389 GPIO_GROUP(GPIODV_27), 390 GPIO_GROUP(GPIODV_28), 391 GPIO_GROUP(GPIODV_29), 392 393 GPIO_GROUP(GPIOH_0), 394 GPIO_GROUP(GPIOH_1), 395 GPIO_GROUP(GPIOH_2), 396 GPIO_GROUP(GPIOH_3), 397 GPIO_GROUP(GPIOH_4), 398 GPIO_GROUP(GPIOH_5), 399 GPIO_GROUP(GPIOH_6), 400 GPIO_GROUP(GPIOH_7), 401 GPIO_GROUP(GPIOH_8), 402 GPIO_GROUP(GPIOH_9), 403 404 GPIO_GROUP(CARD_0), 405 GPIO_GROUP(CARD_1), 406 GPIO_GROUP(CARD_2), 407 GPIO_GROUP(CARD_3), 408 GPIO_GROUP(CARD_4), 409 GPIO_GROUP(CARD_5), 410 GPIO_GROUP(CARD_6), 411 412 GPIO_GROUP(BOOT_0), 413 GPIO_GROUP(BOOT_1), 414 GPIO_GROUP(BOOT_2), 415 GPIO_GROUP(BOOT_3), 416 GPIO_GROUP(BOOT_4), 417 GPIO_GROUP(BOOT_5), 418 GPIO_GROUP(BOOT_6), 419 GPIO_GROUP(BOOT_7), 420 GPIO_GROUP(BOOT_8), 421 GPIO_GROUP(BOOT_9), 422 GPIO_GROUP(BOOT_10), 423 GPIO_GROUP(BOOT_11), 424 GPIO_GROUP(BOOT_12), 425 GPIO_GROUP(BOOT_13), 426 GPIO_GROUP(BOOT_14), 427 GPIO_GROUP(BOOT_15), 428 GPIO_GROUP(BOOT_16), 429 GPIO_GROUP(BOOT_17), 430 GPIO_GROUP(BOOT_18), 431 432 GPIO_GROUP(DIF_0_P), 433 GPIO_GROUP(DIF_0_N), 434 GPIO_GROUP(DIF_1_P), 435 GPIO_GROUP(DIF_1_N), 436 GPIO_GROUP(DIF_2_P), 437 GPIO_GROUP(DIF_2_N), 438 GPIO_GROUP(DIF_3_P), 439 GPIO_GROUP(DIF_3_N), 440 GPIO_GROUP(DIF_4_P), 441 GPIO_GROUP(DIF_4_N), 442 443 /* bank X */ 444 GROUP(sd_d0_a, 8, 5), 445 GROUP(sd_d1_a, 8, 4), 446 GROUP(sd_d2_a, 8, 3), 447 GROUP(sd_d3_a, 8, 2), 448 GROUP(sdxc_d0_0_a, 5, 29), 449 GROUP(sdxc_d47_a, 5, 12), 450 GROUP(sdxc_d13_0_a, 5, 28), 451 GROUP(sd_clk_a, 8, 1), 452 GROUP(sd_cmd_a, 8, 0), 453 GROUP(xtal_32k_out, 3, 22), 454 GROUP(xtal_24m_out, 3, 20), 455 GROUP(uart_tx_b0, 4, 9), 456 GROUP(uart_rx_b0, 4, 8), 457 GROUP(uart_cts_b0, 4, 7), 458 GROUP(uart_rts_b0, 4, 6), 459 GROUP(sdxc_d0_1_a, 5, 14), 460 GROUP(sdxc_d13_1_a, 5, 13), 461 GROUP(pcm_out_a, 3, 30), 462 GROUP(pcm_in_a, 3, 29), 463 GROUP(pcm_fs_a, 3, 28), 464 GROUP(pcm_clk_a, 3, 27), 465 GROUP(sdxc_clk_a, 5, 11), 466 GROUP(sdxc_cmd_a, 5, 10), 467 GROUP(pwm_vs_0, 7, 31), 468 GROUP(pwm_e, 9, 19), 469 GROUP(pwm_vs_1, 7, 30), 470 GROUP(uart_tx_a, 4, 17), 471 GROUP(uart_rx_a, 4, 16), 472 GROUP(uart_cts_a, 4, 15), 473 GROUP(uart_rts_a, 4, 14), 474 GROUP(uart_tx_b1, 6, 19), 475 GROUP(uart_rx_b1, 6, 18), 476 GROUP(uart_cts_b1, 6, 17), 477 GROUP(uart_rts_b1, 6, 16), 478 GROUP(iso7816_0_clk, 5, 9), 479 GROUP(iso7816_0_data, 5, 8), 480 GROUP(spi_sclk_0, 4, 22), 481 GROUP(spi_miso_0, 4, 24), 482 GROUP(spi_mosi_0, 4, 23), 483 GROUP(iso7816_det, 4, 21), 484 GROUP(iso7816_reset, 4, 20), 485 GROUP(iso7816_1_clk, 4, 19), 486 GROUP(iso7816_1_data, 4, 18), 487 GROUP(spi_ss0_0, 4, 25), 488 GROUP(tsin_clk_b, 3, 6), 489 GROUP(tsin_sop_b, 3, 7), 490 GROUP(tsin_d0_b, 3, 8), 491 GROUP(pwm_b, 2, 3), 492 GROUP(i2c_sda_d0, 4, 5), 493 GROUP(i2c_sck_d0, 4, 4), 494 GROUP(tsin_d_valid_b, 3, 9), 495 496 /* bank Y */ 497 GROUP(tsin_d_valid_a, 3, 2), 498 GROUP(tsin_sop_a, 3, 1), 499 GROUP(tsin_d17_a, 3, 5), 500 GROUP(tsin_clk_a, 3, 0), 501 GROUP(tsin_d0_a, 3, 4), 502 GROUP(spdif_out_0, 1, 7), 503 GROUP(xtal_24m, 3, 18), 504 GROUP(iso7816_2_clk, 5, 7), 505 GROUP(iso7816_2_data, 5, 6), 506 507 /* bank DV */ 508 GROUP(pwm_d, 3, 26), 509 GROUP(pwm_c0, 3, 25), 510 GROUP(pwm_vs_2, 7, 28), 511 GROUP(pwm_vs_3, 7, 27), 512 GROUP(pwm_vs_4, 7, 26), 513 GROUP(xtal24_out, 7, 25), 514 GROUP(uart_tx_c, 6, 23), 515 GROUP(uart_rx_c, 6, 22), 516 GROUP(uart_cts_c, 6, 21), 517 GROUP(uart_rts_c, 6, 20), 518 GROUP(pwm_c1, 3, 24), 519 GROUP(i2c_sda_a, 9, 31), 520 GROUP(i2c_sck_a, 9, 30), 521 GROUP(i2c_sda_b0, 9, 29), 522 GROUP(i2c_sck_b0, 9, 28), 523 GROUP(i2c_sda_c0, 9, 27), 524 GROUP(i2c_sck_c0, 9, 26), 525 526 /* bank H */ 527 GROUP(hdmi_hpd, 1, 26), 528 GROUP(hdmi_sda, 1, 25), 529 GROUP(hdmi_scl, 1, 24), 530 GROUP(hdmi_cec_0, 1, 23), 531 GROUP(eth_txd1_0, 7, 21), 532 GROUP(eth_txd0_0, 7, 20), 533 GROUP(clk_24m_out, 4, 1), 534 GROUP(spi_ss1, 8, 11), 535 GROUP(spi_ss2, 8, 12), 536 GROUP(spi_ss0_1, 9, 13), 537 GROUP(spi_miso_1, 9, 12), 538 GROUP(spi_mosi_1, 9, 11), 539 GROUP(spi_sclk_1, 9, 10), 540 GROUP(eth_rxd3_h, 6, 15), 541 GROUP(eth_rxd2_h, 6, 14), 542 GROUP(eth_txd3, 6, 13), 543 GROUP(eth_txd2, 6, 12), 544 GROUP(eth_tx_clk, 6, 11), 545 GROUP(i2c_sda_b1, 5, 27), 546 GROUP(i2c_sck_b1, 5, 26), 547 GROUP(i2c_sda_c1, 5, 25), 548 GROUP(i2c_sck_c1, 5, 24), 549 GROUP(i2c_sda_d1, 4, 3), 550 GROUP(i2c_sck_d1, 4, 2), 551 552 /* bank BOOT */ 553 GROUP(nand_io, 2, 26), 554 GROUP(nand_io_ce0, 2, 25), 555 GROUP(nand_io_ce1, 2, 24), 556 GROUP(nand_io_rb0, 2, 17), 557 GROUP(nand_ale, 2, 21), 558 GROUP(nand_cle, 2, 20), 559 GROUP(nand_wen_clk, 2, 19), 560 GROUP(nand_ren_clk, 2, 18), 561 GROUP(nand_dqs_15, 2, 27), 562 GROUP(nand_dqs_18, 2, 28), 563 GROUP(sdxc_d0_c, 4, 30), 564 GROUP(sdxc_d13_c, 4, 29), 565 GROUP(sdxc_d47_c, 4, 28), 566 GROUP(sdxc_clk_c, 7, 19), 567 GROUP(sdxc_cmd_c, 7, 18), 568 GROUP(nor_d, 5, 1), 569 GROUP(nor_q, 5, 3), 570 GROUP(nor_c, 5, 2), 571 GROUP(nor_cs, 5, 0), 572 GROUP(sd_d0_c, 6, 29), 573 GROUP(sd_d1_c, 6, 28), 574 GROUP(sd_d2_c, 6, 27), 575 GROUP(sd_d3_c, 6, 26), 576 GROUP(sd_cmd_c, 6, 30), 577 GROUP(sd_clk_c, 6, 31), 578 579 /* bank CARD */ 580 GROUP(sd_d1_b, 2, 14), 581 GROUP(sd_d0_b, 2, 15), 582 GROUP(sd_clk_b, 2, 11), 583 GROUP(sd_cmd_b, 2, 10), 584 GROUP(sd_d3_b, 2, 12), 585 GROUP(sd_d2_b, 2, 13), 586 GROUP(sdxc_d13_b, 2, 6), 587 GROUP(sdxc_d0_b, 2, 7), 588 GROUP(sdxc_clk_b, 2, 5), 589 GROUP(sdxc_cmd_b, 2, 4), 590 591 /* bank DIF */ 592 GROUP(eth_rxd1, 6, 0), 593 GROUP(eth_rxd0, 6, 1), 594 GROUP(eth_rx_dv, 6, 2), 595 GROUP(eth_rx_clk, 6, 3), 596 GROUP(eth_txd0_1, 6, 4), 597 GROUP(eth_txd1_1, 6, 5), 598 GROUP(eth_tx_en, 6, 6), 599 GROUP(eth_ref_clk, 6, 8), 600 GROUP(eth_mdc, 6, 9), 601 GROUP(eth_mdio_en, 6, 10), 602 GROUP(eth_rxd3, 7, 22), 603 GROUP(eth_rxd2, 7, 23), 604 }; 605 606 static const struct meson_pmx_group meson8b_aobus_groups[] = { 607 GPIO_GROUP(GPIOAO_0), 608 GPIO_GROUP(GPIOAO_1), 609 GPIO_GROUP(GPIOAO_2), 610 GPIO_GROUP(GPIOAO_3), 611 GPIO_GROUP(GPIOAO_4), 612 GPIO_GROUP(GPIOAO_5), 613 GPIO_GROUP(GPIOAO_6), 614 GPIO_GROUP(GPIOAO_7), 615 GPIO_GROUP(GPIOAO_8), 616 GPIO_GROUP(GPIOAO_9), 617 GPIO_GROUP(GPIOAO_10), 618 GPIO_GROUP(GPIOAO_11), 619 GPIO_GROUP(GPIOAO_12), 620 GPIO_GROUP(GPIOAO_13), 621 GPIO_GROUP(GPIO_BSD_EN), 622 GPIO_GROUP(GPIO_TEST_N), 623 624 /* bank AO */ 625 GROUP(uart_tx_ao_a, 0, 12), 626 GROUP(uart_rx_ao_a, 0, 11), 627 GROUP(uart_cts_ao_a, 0, 10), 628 GROUP(uart_rts_ao_a, 0, 9), 629 GROUP(i2c_mst_sck_ao, 0, 6), 630 GROUP(i2c_mst_sda_ao, 0, 5), 631 GROUP(clk_32k_in_out, 0, 18), 632 GROUP(remote_input, 0, 0), 633 GROUP(hdmi_cec_1, 0, 17), 634 GROUP(ir_blaster, 0, 31), 635 GROUP(pwm_c2, 0, 22), 636 GROUP(i2c_sck_ao, 0, 2), 637 GROUP(i2c_sda_ao, 0, 1), 638 GROUP(ir_remote_out, 0, 21), 639 GROUP(i2s_am_clk_out, 0, 30), 640 GROUP(i2s_ao_clk_out, 0, 29), 641 GROUP(i2s_lr_clk_out, 0, 28), 642 GROUP(i2s_out_01, 0, 27), 643 GROUP(uart_tx_ao_b0, 0, 26), 644 GROUP(uart_rx_ao_b0, 0, 25), 645 GROUP(uart_cts_ao_b, 0, 8), 646 GROUP(uart_rts_ao_b, 0, 7), 647 GROUP(uart_tx_ao_b1, 0, 24), 648 GROUP(uart_rx_ao_b1, 0, 23), 649 GROUP(spdif_out_1, 0, 16), 650 GROUP(i2s_in_ch01, 0, 13), 651 GROUP(i2s_ao_clk_in, 0, 15), 652 GROUP(i2s_lr_clk_in, 0, 14), 653 }; 654 655 static const char * const gpio_periphs_groups[] = { 656 "GPIOX_0", "GPIOX_1", "GPIOX_2", "GPIOX_3", "GPIOX_4", 657 "GPIOX_5", "GPIOX_6", "GPIOX_7", "GPIOX_8", "GPIOX_9", 658 "GPIOX_10", "GPIOX_11", "GPIOX_16", "GPIOX_17", "GPIOX_18", 659 "GPIOX_19", "GPIOX_20", "GPIOX_21", 660 661 "GPIOY_0", "GPIOY_1", "GPIOY_3", "GPIOY_6", "GPIOY_7", 662 "GPIOY_8", "GPIOY_9", "GPIOY_10", "GPIOY_11", "GPIOY_12", 663 "GPIOY_13", "GPIOY_14", 664 665 "GPIODV_9", "GPIODV_24", "GPIODV_25", "GPIODV_26", 666 "GPIODV_27", "GPIODV_28", "GPIODV_29", 667 668 "GPIOH_0", "GPIOH_1", "GPIOH_2", "GPIOH_3", "GPIOH_4", 669 "GPIOH_5", "GPIOH_6", "GPIOH_7", "GPIOH_8", "GPIOH_9", 670 671 "CARD_0", "CARD_1", "CARD_2", "CARD_3", "CARD_4", 672 "CARD_5", "CARD_6", 673 674 "BOOT_0", "BOOT_1", "BOOT_2", "BOOT_3", "BOOT_4", 675 "BOOT_5", "BOOT_6", "BOOT_7", "BOOT_8", "BOOT_9", 676 "BOOT_10", "BOOT_11", "BOOT_12", "BOOT_13", "BOOT_14", 677 "BOOT_15", "BOOT_16", "BOOT_17", "BOOT_18", 678 679 "DIF_0_P", "DIF_0_N", "DIF_1_P", "DIF_1_N", 680 "DIF_2_P", "DIF_2_N", "DIF_3_P", "DIF_3_N", 681 "DIF_4_P", "DIF_4_N" 682 }; 683 684 static const char * const gpio_aobus_groups[] = { 685 "GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3", 686 "GPIOAO_4", "GPIOAO_5", "GPIOAO_6", "GPIOAO_7", 687 "GPIOAO_8", "GPIOAO_9", "GPIOAO_10", "GPIOAO_11", 688 "GPIOAO_12", "GPIOAO_13", "GPIO_BSD_EN", "GPIO_TEST_N" 689 }; 690 691 static const char * const sd_a_groups[] = { 692 "sd_d0_a", "sd_d1_a", "sd_d2_a", "sd_d3_a", "sd_clk_a", 693 "sd_cmd_a" 694 }; 695 696 static const char * const sdxc_a_groups[] = { 697 "sdxc_d0_0_a", "sdxc_d13_0_a", "sdxc_d47_a", "sdxc_clk_a", 698 "sdxc_cmd_a", "sdxc_d0_1_a", "sdxc_d13_1_a" 699 }; 700 701 static const char * const pcm_a_groups[] = { 702 "pcm_out_a", "pcm_in_a", "pcm_fs_a", "pcm_clk_a" 703 }; 704 705 static const char * const uart_a_groups[] = { 706 "uart_tx_a", "uart_rx_a", "uart_cts_a", "uart_rts_a" 707 }; 708 709 static const char * const uart_b_groups[] = { 710 "uart_tx_b0", "uart_rx_b0", "uart_cts_b0", "uart_rts_b0", 711 "uart_tx_b1", "uart_rx_b1", "uart_cts_b1", "uart_rts_b1" 712 }; 713 714 static const char * const iso7816_groups[] = { 715 "iso7816_det", "iso7816_reset", "iso7816_0_clk", "iso7816_0_data", 716 "iso7816_1_clk", "iso7816_1_data", "iso7816_2_clk", "iso7816_2_data" 717 }; 718 719 static const char * const i2c_d_groups[] = { 720 "i2c_sda_d0", "i2c_sck_d0", "i2c_sda_d1", "i2c_sck_d1" 721 }; 722 723 static const char * const xtal_groups[] = { 724 "xtal_32k_out", "xtal_24m_out", "xtal_24m", "xtal24_out" 725 }; 726 727 static const char * const uart_c_groups[] = { 728 "uart_tx_c", "uart_rx_c", "uart_cts_c", "uart_rts_c" 729 }; 730 731 static const char * const i2c_c_groups[] = { 732 "i2c_sda_c0", "i2c_sck_c0", "i2c_sda_c1", "i2c_sck_c1" 733 }; 734 735 static const char * const hdmi_groups[] = { 736 "hdmi_hpd", "hdmi_sda", "hdmi_scl", "hdmi_cec_0" 737 }; 738 739 static const char * const hdmi_cec_groups[] = { 740 "hdmi_cec_1" 741 }; 742 743 static const char * const spi_groups[] = { 744 "spi_ss0_0", "spi_miso_0", "spi_mosi_0", "spi_sclk_0", 745 "spi_ss0_1", "spi_ss1", "spi_sclk_1", "spi_mosi_1", 746 "spi_miso_1", "spi_ss2" 747 }; 748 749 static const char * const ethernet_groups[] = { 750 "eth_tx_clk", "eth_tx_en", "eth_txd1_0", "eth_txd1_1", 751 "eth_txd0_0", "eth_txd0_1", "eth_rx_clk", "eth_rx_dv", 752 "eth_rxd1", "eth_rxd0", "eth_mdio_en", "eth_mdc", "eth_ref_clk", 753 "eth_txd2", "eth_txd3", "eth_rxd3", "eth_rxd2", 754 "eth_rxd3_h", "eth_rxd2_h" 755 }; 756 757 static const char * const i2c_a_groups[] = { 758 "i2c_sda_a", "i2c_sck_a", 759 }; 760 761 static const char * const i2c_b_groups[] = { 762 "i2c_sda_b0", "i2c_sck_b0", "i2c_sda_b1", "i2c_sck_b1" 763 }; 764 765 static const char * const sd_c_groups[] = { 766 "sd_d0_c", "sd_d1_c", "sd_d2_c", "sd_d3_c", 767 "sd_cmd_c", "sd_clk_c" 768 }; 769 770 static const char * const sdxc_c_groups[] = { 771 "sdxc_d0_c", "sdxc_d13_c", "sdxc_d47_c", "sdxc_cmd_c", 772 "sdxc_clk_c" 773 }; 774 775 static const char * const nand_groups[] = { 776 "nand_io", "nand_io_ce0", "nand_io_ce1", 777 "nand_io_rb0", "nand_ale", "nand_cle", 778 "nand_wen_clk", "nand_ren_clk", "nand_dqs_15", 779 "nand_dqs_18" 780 }; 781 782 static const char * const nor_groups[] = { 783 "nor_d", "nor_q", "nor_c", "nor_cs" 784 }; 785 786 static const char * const sd_b_groups[] = { 787 "sd_d1_b", "sd_d0_b", "sd_clk_b", "sd_cmd_b", 788 "sd_d3_b", "sd_d2_b" 789 }; 790 791 static const char * const sdxc_b_groups[] = { 792 "sdxc_d13_b", "sdxc_d0_b", "sdxc_clk_b", "sdxc_cmd_b" 793 }; 794 795 static const char * const uart_ao_groups[] = { 796 "uart_tx_ao_a", "uart_rx_ao_a", "uart_cts_ao_a", "uart_rts_ao_a" 797 }; 798 799 static const char * const remote_groups[] = { 800 "remote_input", "ir_blaster", "ir_remote_out" 801 }; 802 803 static const char * const i2c_slave_ao_groups[] = { 804 "i2c_sck_ao", "i2c_sda_ao" 805 }; 806 807 static const char * const uart_ao_b_groups[] = { 808 "uart_tx_ao_b0", "uart_rx_ao_b0", "uart_tx_ao_b1", "uart_rx_ao_b1", 809 "uart_cts_ao_b", "uart_rts_ao_b" 810 }; 811 812 static const char * const i2c_mst_ao_groups[] = { 813 "i2c_mst_sck_ao", "i2c_mst_sda_ao" 814 }; 815 816 static const char * const clk_24m_groups[] = { 817 "clk_24m_out" 818 }; 819 820 static const char * const clk_32k_groups[] = { 821 "clk_32k_in_out" 822 }; 823 824 static const char * const spdif_0_groups[] = { 825 "spdif_out_0" 826 }; 827 828 static const char * const spdif_1_groups[] = { 829 "spdif_out_1" 830 }; 831 832 static const char * const i2s_groups[] = { 833 "i2s_am_clk_out", "i2s_ao_clk_out", "i2s_lr_clk_out", 834 "i2s_out_01", "i2s_in_ch01", "i2s_ao_clk_in", 835 "i2s_lr_clk_in" 836 }; 837 838 static const char * const pwm_b_groups[] = { 839 "pwm_b" 840 }; 841 842 static const char * const pwm_c_groups[] = { 843 "pwm_c0", "pwm_c1" 844 }; 845 846 static const char * const pwm_c_ao_groups[] = { 847 "pwm_c2" 848 }; 849 850 static const char * const pwm_d_groups[] = { 851 "pwm_d" 852 }; 853 854 static const char * const pwm_e_groups[] = { 855 "pwm_e" 856 }; 857 858 static const char * const pwm_vs_groups[] = { 859 "pwm_vs_0", "pwm_vs_1", "pwm_vs_2", 860 "pwm_vs_3", "pwm_vs_4" 861 }; 862 863 static const char * const tsin_a_groups[] = { 864 "tsin_d0_a", "tsin_d17_a", "tsin_clk_a", "tsin_sop_a", 865 "tsin_d_valid_a" 866 }; 867 868 static const char * const tsin_b_groups[] = { 869 "tsin_d0_b", "tsin_clk_b", "tsin_sop_b", "tsin_d_valid_b" 870 }; 871 872 static const struct meson_pmx_func meson8b_cbus_functions[] = { 873 FUNCTION(gpio_periphs), 874 FUNCTION(sd_a), 875 FUNCTION(sdxc_a), 876 FUNCTION(pcm_a), 877 FUNCTION(uart_a), 878 FUNCTION(uart_b), 879 FUNCTION(iso7816), 880 FUNCTION(i2c_d), 881 FUNCTION(xtal), 882 FUNCTION(uart_c), 883 FUNCTION(i2c_c), 884 FUNCTION(hdmi), 885 FUNCTION(spi), 886 FUNCTION(ethernet), 887 FUNCTION(i2c_a), 888 FUNCTION(i2c_b), 889 FUNCTION(sd_c), 890 FUNCTION(sdxc_c), 891 FUNCTION(nand), 892 FUNCTION(nor), 893 FUNCTION(sd_b), 894 FUNCTION(sdxc_b), 895 FUNCTION(spdif_0), 896 FUNCTION(pwm_b), 897 FUNCTION(pwm_c), 898 FUNCTION(pwm_d), 899 FUNCTION(pwm_e), 900 FUNCTION(pwm_vs), 901 FUNCTION(tsin_a), 902 FUNCTION(tsin_b), 903 FUNCTION(clk_24m), 904 }; 905 906 static const struct meson_pmx_func meson8b_aobus_functions[] = { 907 FUNCTION(gpio_aobus), 908 FUNCTION(uart_ao), 909 FUNCTION(uart_ao_b), 910 FUNCTION(i2c_slave_ao), 911 FUNCTION(i2c_mst_ao), 912 FUNCTION(i2s), 913 FUNCTION(remote), 914 FUNCTION(clk_32k), 915 FUNCTION(pwm_c_ao), 916 FUNCTION(spdif_1), 917 FUNCTION(hdmi_cec), 918 }; 919 920 static const struct meson_bank meson8b_cbus_banks[] = { 921 /* name first last irq pullen pull dir out in */ 922 BANK("X0..11", GPIOX_0, GPIOX_11, 97, 108, 4, 0, 4, 0, 0, 0, 1, 0, 2, 0), 923 BANK("X16..21", GPIOX_16, GPIOX_21, 113, 118, 4, 16, 4, 16, 0, 16, 1, 16, 2, 16), 924 BANK("Y0..1", GPIOY_0, GPIOY_1, 80, 81, 3, 0, 3, 0, 3, 0, 4, 0, 5, 0), 925 BANK("Y3", GPIOY_3, GPIOY_3, 83, 83, 3, 3, 3, 3, 3, 3, 4, 3, 5, 3), 926 BANK("Y6..14", GPIOY_6, GPIOY_14, 86, 94, 3, 6, 3, 6, 3, 6, 4, 6, 5, 6), 927 BANK("DV9", GPIODV_9, GPIODV_9, 59, 59, 0, 9, 0, 9, 7, 9, 8, 9, 9, 9), 928 BANK("DV24..29", GPIODV_24, GPIODV_29, 74, 79, 0, 24, 0, 24, 7, 24, 8, 24, 9, 24), 929 BANK("H", GPIOH_0, GPIOH_9, 14, 23, 1, 16, 1, 16, 9, 19, 10, 19, 11, 19), 930 BANK("CARD", CARD_0, CARD_6, 43, 49, 2, 20, 2, 20, 0, 22, 1, 22, 2, 22), 931 BANK("BOOT", BOOT_0, BOOT_18, 24, 42, 2, 0, 2, 0, 9, 0, 10, 0, 11, 0), 932 933 /* 934 * The following bank is not mentionned in the public datasheet 935 * There is no information whether it can be used with the gpio 936 * interrupt controller 937 */ 938 BANK("DIF", DIF_0_P, DIF_4_N, -1, -1, 5, 8, 5, 8, 12, 12, 13, 12, 14, 12), 939 }; 940 941 static const struct meson_bank meson8b_aobus_banks[] = { 942 /* name first lastc irq pullen pull dir out in */ 943 BANK("AO", GPIOAO_0, GPIO_TEST_N, 0, 13, 0, 16, 0, 0, 0, 0, 0, 16, 1, 0), 944 }; 945 946 static const struct meson_pinctrl_data meson8b_cbus_pinctrl_data = { 947 .name = "cbus-banks", 948 .pins = meson8b_cbus_pins, 949 .groups = meson8b_cbus_groups, 950 .funcs = meson8b_cbus_functions, 951 .banks = meson8b_cbus_banks, 952 .num_pins = ARRAY_SIZE(meson8b_cbus_pins), 953 .num_groups = ARRAY_SIZE(meson8b_cbus_groups), 954 .num_funcs = ARRAY_SIZE(meson8b_cbus_functions), 955 .num_banks = ARRAY_SIZE(meson8b_cbus_banks), 956 .pmx_ops = &meson8_pmx_ops, 957 }; 958 959 static const struct meson_pinctrl_data meson8b_aobus_pinctrl_data = { 960 .name = "aobus-banks", 961 .pins = meson8b_aobus_pins, 962 .groups = meson8b_aobus_groups, 963 .funcs = meson8b_aobus_functions, 964 .banks = meson8b_aobus_banks, 965 .num_pins = ARRAY_SIZE(meson8b_aobus_pins), 966 .num_groups = ARRAY_SIZE(meson8b_aobus_groups), 967 .num_funcs = ARRAY_SIZE(meson8b_aobus_functions), 968 .num_banks = ARRAY_SIZE(meson8b_aobus_banks), 969 .pmx_ops = &meson8_pmx_ops, 970 .parse_dt = &meson8_aobus_parse_dt_extra, 971 }; 972 973 static const struct of_device_id meson8b_pinctrl_dt_match[] = { 974 { 975 .compatible = "amlogic,meson8b-cbus-pinctrl", 976 .data = &meson8b_cbus_pinctrl_data, 977 }, 978 { 979 .compatible = "amlogic,meson8b-aobus-pinctrl", 980 .data = &meson8b_aobus_pinctrl_data, 981 }, 982 { }, 983 }; 984 985 static struct platform_driver meson8b_pinctrl_driver = { 986 .probe = meson_pinctrl_probe, 987 .driver = { 988 .name = "meson8b-pinctrl", 989 .of_match_table = meson8b_pinctrl_dt_match, 990 }, 991 }; 992 builtin_platform_driver(meson8b_pinctrl_driver); 993