1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Pin controller and GPIO driver for Amlogic Meson SoCs 4 * 5 * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com> 6 */ 7 8 #include <linux/gpio/driver.h> 9 #include <linux/pinctrl/pinctrl.h> 10 #include <linux/platform_device.h> 11 #include <linux/regmap.h> 12 #include <linux/types.h> 13 14 /** 15 * struct meson_pmx_group - a pinmux group 16 * 17 * @name: group name 18 * @pins: pins in the group 19 * @num_pins: number of pins in the group 20 * @is_gpio: whether the group is a single GPIO group 21 * @reg: register offset for the group in the domain mux registers 22 * @bit bit index enabling the group 23 * @domain: index of the domain this group belongs to 24 */ 25 struct meson_pmx_group { 26 const char *name; 27 const unsigned int *pins; 28 unsigned int num_pins; 29 const void *data; 30 }; 31 32 /** 33 * struct meson_pmx_func - a pinmux function 34 * 35 * @name: function name 36 * @groups: groups in the function 37 * @num_groups: number of groups in the function 38 */ 39 struct meson_pmx_func { 40 const char *name; 41 const char * const *groups; 42 unsigned int num_groups; 43 }; 44 45 /** 46 * struct meson_reg_desc - a register descriptor 47 * 48 * @reg: register offset in the regmap 49 * @bit: bit index in register 50 * 51 * The structure describes the information needed to control pull, 52 * pull-enable, direction, etc. for a single pin 53 */ 54 struct meson_reg_desc { 55 unsigned int reg; 56 unsigned int bit; 57 }; 58 59 /** 60 * enum meson_reg_type - type of registers encoded in @meson_reg_desc 61 */ 62 enum meson_reg_type { 63 REG_PULLEN, 64 REG_PULL, 65 REG_DIR, 66 REG_OUT, 67 REG_IN, 68 NUM_REG, 69 }; 70 71 /** 72 * struct meson bank 73 * 74 * @name: bank name 75 * @first: first pin of the bank 76 * @last: last pin of the bank 77 * @irq: hwirq base number of the bank 78 * @regs: array of register descriptors 79 * 80 * A bank represents a set of pins controlled by a contiguous set of 81 * bits in the domain registers. The structure specifies which bits in 82 * the regmap control the different functionalities. Each member of 83 * the @regs array refers to the first pin of the bank. 84 */ 85 struct meson_bank { 86 const char *name; 87 unsigned int first; 88 unsigned int last; 89 int irq_first; 90 int irq_last; 91 struct meson_reg_desc regs[NUM_REG]; 92 }; 93 94 struct meson_pinctrl_data { 95 const char *name; 96 const struct pinctrl_pin_desc *pins; 97 struct meson_pmx_group *groups; 98 struct meson_pmx_func *funcs; 99 unsigned int num_pins; 100 unsigned int num_groups; 101 unsigned int num_funcs; 102 struct meson_bank *banks; 103 unsigned int num_banks; 104 const struct pinmux_ops *pmx_ops; 105 void *pmx_data; 106 }; 107 108 struct meson_pinctrl { 109 struct device *dev; 110 struct pinctrl_dev *pcdev; 111 struct pinctrl_desc desc; 112 struct meson_pinctrl_data *data; 113 struct regmap *reg_mux; 114 struct regmap *reg_pullen; 115 struct regmap *reg_pull; 116 struct regmap *reg_gpio; 117 struct regmap *reg_ds; 118 struct gpio_chip chip; 119 struct device_node *of_node; 120 }; 121 122 #define FUNCTION(fn) \ 123 { \ 124 .name = #fn, \ 125 .groups = fn ## _groups, \ 126 .num_groups = ARRAY_SIZE(fn ## _groups), \ 127 } 128 129 #define BANK(n, f, l, fi, li, per, peb, pr, pb, dr, db, or, ob, ir, ib) \ 130 { \ 131 .name = n, \ 132 .first = f, \ 133 .last = l, \ 134 .irq_first = fi, \ 135 .irq_last = li, \ 136 .regs = { \ 137 [REG_PULLEN] = { per, peb }, \ 138 [REG_PULL] = { pr, pb }, \ 139 [REG_DIR] = { dr, db }, \ 140 [REG_OUT] = { or, ob }, \ 141 [REG_IN] = { ir, ib }, \ 142 }, \ 143 } 144 145 #define MESON_PIN(x) PINCTRL_PIN(x, #x) 146 147 /* Common pmx functions */ 148 int meson_pmx_get_funcs_count(struct pinctrl_dev *pcdev); 149 const char *meson_pmx_get_func_name(struct pinctrl_dev *pcdev, 150 unsigned selector); 151 int meson_pmx_get_groups(struct pinctrl_dev *pcdev, 152 unsigned selector, 153 const char * const **groups, 154 unsigned * const num_groups); 155 156 /* Common probe function */ 157 int meson_pinctrl_probe(struct platform_device *pdev); 158