xref: /linux/drivers/pinctrl/mediatek/pinctrl-mt6397.c (revision 24bce201d79807b668bf9d9e0aca801c5c0d5f78)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (c) 2015 MediaTek Inc.
4  * Author: Hongzhou.Yang <hongzhou.yang@mediatek.com>
5  */
6 
7 #include <linux/init.h>
8 #include <linux/platform_device.h>
9 #include <linux/of.h>
10 #include <linux/of_device.h>
11 #include <linux/pinctrl/pinctrl.h>
12 #include <linux/pinctrl/pinconf-generic.h>
13 #include <linux/mfd/mt6397/core.h>
14 
15 #include "pinctrl-mtk-common.h"
16 #include "pinctrl-mtk-mt6397.h"
17 
18 #define MT6397_PIN_REG_BASE  0xc000
19 
20 static const struct mtk_pinctrl_devdata mt6397_pinctrl_data = {
21 	.pins = mtk_pins_mt6397,
22 	.npins = ARRAY_SIZE(mtk_pins_mt6397),
23 	.dir_offset = (MT6397_PIN_REG_BASE + 0x000),
24 	.ies_offset = MTK_PINCTRL_NOT_SUPPORT,
25 	.smt_offset = MTK_PINCTRL_NOT_SUPPORT,
26 	.pullen_offset = (MT6397_PIN_REG_BASE + 0x020),
27 	.pullsel_offset = (MT6397_PIN_REG_BASE + 0x040),
28 	.dout_offset = (MT6397_PIN_REG_BASE + 0x080),
29 	.din_offset = (MT6397_PIN_REG_BASE + 0x0a0),
30 	.pinmux_offset = (MT6397_PIN_REG_BASE + 0x0c0),
31 	.type1_start = 41,
32 	.type1_end = 41,
33 	.port_shf = 3,
34 	.port_mask = 0x3,
35 	.port_align = 2,
36 	.mode_mask = 0xf,
37 	.mode_per_reg = 5,
38 	.mode_shf = 4,
39 };
40 
41 static int mt6397_pinctrl_probe(struct platform_device *pdev)
42 {
43 	struct mt6397_chip *mt6397;
44 
45 	mt6397 = dev_get_drvdata(pdev->dev.parent);
46 	return mtk_pctrl_init(pdev, &mt6397_pinctrl_data, mt6397->regmap);
47 }
48 
49 static const struct of_device_id mt6397_pctrl_match[] = {
50 	{ .compatible = "mediatek,mt6397-pinctrl", },
51 	{ }
52 };
53 
54 static struct platform_driver mtk_pinctrl_driver = {
55 	.probe = mt6397_pinctrl_probe,
56 	.driver = {
57 		.name = "mediatek-mt6397-pinctrl",
58 		.of_match_table = mt6397_pctrl_match,
59 	},
60 };
61 
62 builtin_platform_driver(mtk_pinctrl_driver);
63