1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * MediaTek Pinctrl Moore Driver, which implement the generic dt-binding 4 * pinctrl-bindings.txt for MediaTek SoC. 5 * 6 * Copyright (C) 2017-2018 MediaTek Inc. 7 * Author: Sean Wang <sean.wang@mediatek.com> 8 * 9 */ 10 11 #include <linux/gpio/driver.h> 12 #include "pinctrl-moore.h" 13 14 #define PINCTRL_PINCTRL_DEV KBUILD_MODNAME 15 16 /* Custom pinconf parameters */ 17 #define MTK_PIN_CONFIG_TDSEL (PIN_CONFIG_END + 1) 18 #define MTK_PIN_CONFIG_RDSEL (PIN_CONFIG_END + 2) 19 #define MTK_PIN_CONFIG_PU_ADV (PIN_CONFIG_END + 3) 20 #define MTK_PIN_CONFIG_PD_ADV (PIN_CONFIG_END + 4) 21 22 static const struct pinconf_generic_params mtk_custom_bindings[] = { 23 {"mediatek,tdsel", MTK_PIN_CONFIG_TDSEL, 0}, 24 {"mediatek,rdsel", MTK_PIN_CONFIG_RDSEL, 0}, 25 {"mediatek,pull-up-adv", MTK_PIN_CONFIG_PU_ADV, 1}, 26 {"mediatek,pull-down-adv", MTK_PIN_CONFIG_PD_ADV, 1}, 27 }; 28 29 #ifdef CONFIG_DEBUG_FS 30 static const struct pin_config_item mtk_conf_items[] = { 31 PCONFDUMP(MTK_PIN_CONFIG_TDSEL, "tdsel", NULL, true), 32 PCONFDUMP(MTK_PIN_CONFIG_RDSEL, "rdsel", NULL, true), 33 PCONFDUMP(MTK_PIN_CONFIG_PU_ADV, "pu-adv", NULL, true), 34 PCONFDUMP(MTK_PIN_CONFIG_PD_ADV, "pd-adv", NULL, true), 35 }; 36 #endif 37 38 static int mtk_pinmux_set_mux(struct pinctrl_dev *pctldev, 39 unsigned int selector, unsigned int group) 40 { 41 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 42 struct function_desc *func; 43 struct group_desc *grp; 44 int i; 45 46 func = pinmux_generic_get_function(pctldev, selector); 47 if (!func) 48 return -EINVAL; 49 50 grp = pinctrl_generic_get_group(pctldev, group); 51 if (!grp) 52 return -EINVAL; 53 54 dev_dbg(pctldev->dev, "enable function %s group %s\n", 55 func->name, grp->name); 56 57 for (i = 0; i < grp->num_pins; i++) { 58 const struct mtk_pin_desc *desc; 59 int *pin_modes = grp->data; 60 int pin = grp->pins[i]; 61 62 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; 63 if (!desc->name) 64 return -ENOTSUPP; 65 66 mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE, 67 pin_modes[i]); 68 } 69 70 return 0; 71 } 72 73 static int mtk_pinmux_gpio_request_enable(struct pinctrl_dev *pctldev, 74 struct pinctrl_gpio_range *range, 75 unsigned int pin) 76 { 77 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 78 const struct mtk_pin_desc *desc; 79 80 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; 81 if (!desc->name) 82 return -ENOTSUPP; 83 84 return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE, 85 hw->soc->gpio_m); 86 } 87 88 static int mtk_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev, 89 struct pinctrl_gpio_range *range, 90 unsigned int pin, bool input) 91 { 92 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 93 const struct mtk_pin_desc *desc; 94 95 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; 96 if (!desc->name) 97 return -ENOTSUPP; 98 99 /* hardware would take 0 as input direction */ 100 return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, !input); 101 } 102 103 static int mtk_pinconf_get(struct pinctrl_dev *pctldev, 104 unsigned int pin, unsigned long *config) 105 { 106 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 107 u32 param = pinconf_to_config_param(*config); 108 int val, val2, err, reg, ret = 1; 109 const struct mtk_pin_desc *desc; 110 111 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; 112 if (!desc->name) 113 return -ENOTSUPP; 114 115 switch (param) { 116 case PIN_CONFIG_BIAS_DISABLE: 117 if (hw->soc->bias_disable_get) { 118 err = hw->soc->bias_disable_get(hw, desc, &ret); 119 if (err) 120 return err; 121 } else { 122 return -ENOTSUPP; 123 } 124 break; 125 case PIN_CONFIG_BIAS_PULL_UP: 126 if (hw->soc->bias_get) { 127 err = hw->soc->bias_get(hw, desc, 1, &ret); 128 if (err) 129 return err; 130 } else { 131 return -ENOTSUPP; 132 } 133 break; 134 case PIN_CONFIG_BIAS_PULL_DOWN: 135 if (hw->soc->bias_get) { 136 err = hw->soc->bias_get(hw, desc, 0, &ret); 137 if (err) 138 return err; 139 } else { 140 return -ENOTSUPP; 141 } 142 break; 143 case PIN_CONFIG_SLEW_RATE: 144 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SR, &val); 145 if (err) 146 return err; 147 148 if (!val) 149 return -EINVAL; 150 151 break; 152 case PIN_CONFIG_INPUT_ENABLE: 153 case PIN_CONFIG_OUTPUT_ENABLE: 154 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &val); 155 if (err) 156 return err; 157 158 /* HW takes input mode as zero; output mode as non-zero */ 159 if ((val && param == PIN_CONFIG_INPUT_ENABLE) || 160 (!val && param == PIN_CONFIG_OUTPUT_ENABLE)) 161 return -EINVAL; 162 163 break; 164 case PIN_CONFIG_INPUT_SCHMITT_ENABLE: 165 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &val); 166 if (err) 167 return err; 168 169 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SMT, &val2); 170 if (err) 171 return err; 172 173 if (val || !val2) 174 return -EINVAL; 175 176 break; 177 case PIN_CONFIG_DRIVE_STRENGTH: 178 if (hw->soc->drive_get) { 179 err = hw->soc->drive_get(hw, desc, &ret); 180 if (err) 181 return err; 182 } else { 183 err = -ENOTSUPP; 184 } 185 break; 186 case MTK_PIN_CONFIG_TDSEL: 187 case MTK_PIN_CONFIG_RDSEL: 188 reg = (param == MTK_PIN_CONFIG_TDSEL) ? 189 PINCTRL_PIN_REG_TDSEL : PINCTRL_PIN_REG_RDSEL; 190 191 err = mtk_hw_get_value(hw, desc, reg, &val); 192 if (err) 193 return err; 194 195 ret = val; 196 197 break; 198 case MTK_PIN_CONFIG_PU_ADV: 199 case MTK_PIN_CONFIG_PD_ADV: 200 if (hw->soc->adv_pull_get) { 201 bool pullup; 202 203 pullup = param == MTK_PIN_CONFIG_PU_ADV; 204 err = hw->soc->adv_pull_get(hw, desc, pullup, &ret); 205 if (err) 206 return err; 207 } else { 208 return -ENOTSUPP; 209 } 210 break; 211 default: 212 return -ENOTSUPP; 213 } 214 215 *config = pinconf_to_config_packed(param, ret); 216 217 return 0; 218 } 219 220 static int mtk_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, 221 unsigned long *configs, unsigned int num_configs) 222 { 223 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); 224 const struct mtk_pin_desc *desc; 225 u32 reg, param, arg; 226 int cfg, err = 0; 227 228 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; 229 if (!desc->name) 230 return -ENOTSUPP; 231 232 for (cfg = 0; cfg < num_configs; cfg++) { 233 param = pinconf_to_config_param(configs[cfg]); 234 arg = pinconf_to_config_argument(configs[cfg]); 235 236 switch (param) { 237 case PIN_CONFIG_BIAS_DISABLE: 238 if (hw->soc->bias_disable_set) { 239 err = hw->soc->bias_disable_set(hw, desc); 240 if (err) 241 return err; 242 } else { 243 return -ENOTSUPP; 244 } 245 break; 246 case PIN_CONFIG_BIAS_PULL_UP: 247 if (hw->soc->bias_set) { 248 err = hw->soc->bias_set(hw, desc, 1); 249 if (err) 250 return err; 251 } else { 252 return -ENOTSUPP; 253 } 254 break; 255 case PIN_CONFIG_BIAS_PULL_DOWN: 256 if (hw->soc->bias_set) { 257 err = hw->soc->bias_set(hw, desc, 0); 258 if (err) 259 return err; 260 } else { 261 return -ENOTSUPP; 262 } 263 break; 264 case PIN_CONFIG_OUTPUT_ENABLE: 265 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT, 266 MTK_DISABLE); 267 if (err) 268 goto err; 269 270 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, 271 MTK_OUTPUT); 272 if (err) 273 goto err; 274 break; 275 case PIN_CONFIG_INPUT_ENABLE: 276 277 if (hw->soc->ies_present) { 278 mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_IES, 279 MTK_ENABLE); 280 } 281 282 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, 283 MTK_INPUT); 284 if (err) 285 goto err; 286 break; 287 case PIN_CONFIG_SLEW_RATE: 288 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SR, 289 arg); 290 if (err) 291 goto err; 292 293 break; 294 case PIN_CONFIG_OUTPUT: 295 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, 296 MTK_OUTPUT); 297 if (err) 298 goto err; 299 300 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO, 301 arg); 302 if (err) 303 goto err; 304 break; 305 case PIN_CONFIG_INPUT_SCHMITT_ENABLE: 306 /* arg = 1: Input mode & SMT enable ; 307 * arg = 0: Output mode & SMT disable 308 */ 309 arg = arg ? 2 : 1; 310 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, 311 arg & 1); 312 if (err) 313 goto err; 314 315 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT, 316 !!(arg & 2)); 317 if (err) 318 goto err; 319 break; 320 case PIN_CONFIG_DRIVE_STRENGTH: 321 if (hw->soc->drive_set) { 322 err = hw->soc->drive_set(hw, desc, arg); 323 if (err) 324 return err; 325 } else { 326 err = -ENOTSUPP; 327 } 328 break; 329 case MTK_PIN_CONFIG_TDSEL: 330 case MTK_PIN_CONFIG_RDSEL: 331 reg = (param == MTK_PIN_CONFIG_TDSEL) ? 332 PINCTRL_PIN_REG_TDSEL : PINCTRL_PIN_REG_RDSEL; 333 334 err = mtk_hw_set_value(hw, desc, reg, arg); 335 if (err) 336 goto err; 337 break; 338 case MTK_PIN_CONFIG_PU_ADV: 339 case MTK_PIN_CONFIG_PD_ADV: 340 if (hw->soc->adv_pull_set) { 341 bool pullup; 342 343 pullup = param == MTK_PIN_CONFIG_PU_ADV; 344 err = hw->soc->adv_pull_set(hw, desc, pullup, 345 arg); 346 if (err) 347 return err; 348 } else { 349 return -ENOTSUPP; 350 } 351 break; 352 default: 353 err = -ENOTSUPP; 354 } 355 } 356 err: 357 return err; 358 } 359 360 static int mtk_pinconf_group_get(struct pinctrl_dev *pctldev, 361 unsigned int group, unsigned long *config) 362 { 363 const unsigned int *pins; 364 unsigned int i, npins, old = 0; 365 int ret; 366 367 ret = pinctrl_generic_get_group_pins(pctldev, group, &pins, &npins); 368 if (ret) 369 return ret; 370 371 for (i = 0; i < npins; i++) { 372 if (mtk_pinconf_get(pctldev, pins[i], config)) 373 return -ENOTSUPP; 374 375 /* configs do not match between two pins */ 376 if (i && old != *config) 377 return -ENOTSUPP; 378 379 old = *config; 380 } 381 382 return 0; 383 } 384 385 static int mtk_pinconf_group_set(struct pinctrl_dev *pctldev, 386 unsigned int group, unsigned long *configs, 387 unsigned int num_configs) 388 { 389 const unsigned int *pins; 390 unsigned int i, npins; 391 int ret; 392 393 ret = pinctrl_generic_get_group_pins(pctldev, group, &pins, &npins); 394 if (ret) 395 return ret; 396 397 for (i = 0; i < npins; i++) { 398 ret = mtk_pinconf_set(pctldev, pins[i], configs, num_configs); 399 if (ret) 400 return ret; 401 } 402 403 return 0; 404 } 405 406 static const struct pinctrl_ops mtk_pctlops = { 407 .get_groups_count = pinctrl_generic_get_group_count, 408 .get_group_name = pinctrl_generic_get_group_name, 409 .get_group_pins = pinctrl_generic_get_group_pins, 410 .dt_node_to_map = pinconf_generic_dt_node_to_map_all, 411 .dt_free_map = pinconf_generic_dt_free_map, 412 }; 413 414 static const struct pinmux_ops mtk_pmxops = { 415 .get_functions_count = pinmux_generic_get_function_count, 416 .get_function_name = pinmux_generic_get_function_name, 417 .get_function_groups = pinmux_generic_get_function_groups, 418 .set_mux = mtk_pinmux_set_mux, 419 .gpio_request_enable = mtk_pinmux_gpio_request_enable, 420 .gpio_set_direction = mtk_pinmux_gpio_set_direction, 421 .strict = true, 422 }; 423 424 static const struct pinconf_ops mtk_confops = { 425 .is_generic = true, 426 .pin_config_get = mtk_pinconf_get, 427 .pin_config_set = mtk_pinconf_set, 428 .pin_config_group_get = mtk_pinconf_group_get, 429 .pin_config_group_set = mtk_pinconf_group_set, 430 .pin_config_config_dbg_show = pinconf_generic_dump_config, 431 }; 432 433 static struct pinctrl_desc mtk_desc = { 434 .name = PINCTRL_PINCTRL_DEV, 435 .pctlops = &mtk_pctlops, 436 .pmxops = &mtk_pmxops, 437 .confops = &mtk_confops, 438 .owner = THIS_MODULE, 439 }; 440 441 static int mtk_gpio_get(struct gpio_chip *chip, unsigned int gpio) 442 { 443 struct mtk_pinctrl *hw = gpiochip_get_data(chip); 444 const struct mtk_pin_desc *desc; 445 int value, err; 446 447 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; 448 if (!desc->name) 449 return -ENOTSUPP; 450 451 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DI, &value); 452 if (err) 453 return err; 454 455 return !!value; 456 } 457 458 static void mtk_gpio_set(struct gpio_chip *chip, unsigned int gpio, int value) 459 { 460 struct mtk_pinctrl *hw = gpiochip_get_data(chip); 461 const struct mtk_pin_desc *desc; 462 463 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; 464 if (!desc->name) { 465 dev_err(hw->dev, "Failed to set gpio %d\n", gpio); 466 return; 467 } 468 469 mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO, !!value); 470 } 471 472 static int mtk_gpio_direction_input(struct gpio_chip *chip, unsigned int gpio) 473 { 474 return pinctrl_gpio_direction_input(chip->base + gpio); 475 } 476 477 static int mtk_gpio_direction_output(struct gpio_chip *chip, unsigned int gpio, 478 int value) 479 { 480 mtk_gpio_set(chip, gpio, value); 481 482 return pinctrl_gpio_direction_output(chip->base + gpio); 483 } 484 485 static int mtk_gpio_to_irq(struct gpio_chip *chip, unsigned int offset) 486 { 487 struct mtk_pinctrl *hw = gpiochip_get_data(chip); 488 const struct mtk_pin_desc *desc; 489 490 if (!hw->eint) 491 return -ENOTSUPP; 492 493 desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset]; 494 495 if (desc->eint.eint_n == (u16)EINT_NA) 496 return -ENOTSUPP; 497 498 return mtk_eint_find_irq(hw->eint, desc->eint.eint_n); 499 } 500 501 static int mtk_gpio_set_config(struct gpio_chip *chip, unsigned int offset, 502 unsigned long config) 503 { 504 struct mtk_pinctrl *hw = gpiochip_get_data(chip); 505 const struct mtk_pin_desc *desc; 506 u32 debounce; 507 508 desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset]; 509 if (!desc->name) 510 return -ENOTSUPP; 511 512 if (!hw->eint || 513 pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE || 514 desc->eint.eint_n == (u16)EINT_NA) 515 return -ENOTSUPP; 516 517 debounce = pinconf_to_config_argument(config); 518 519 return mtk_eint_set_debounce(hw->eint, desc->eint.eint_n, debounce); 520 } 521 522 static int mtk_build_gpiochip(struct mtk_pinctrl *hw) 523 { 524 struct gpio_chip *chip = &hw->chip; 525 int ret; 526 527 chip->label = PINCTRL_PINCTRL_DEV; 528 chip->parent = hw->dev; 529 chip->request = gpiochip_generic_request; 530 chip->free = gpiochip_generic_free; 531 chip->direction_input = mtk_gpio_direction_input; 532 chip->direction_output = mtk_gpio_direction_output; 533 chip->get = mtk_gpio_get; 534 chip->set = mtk_gpio_set; 535 chip->to_irq = mtk_gpio_to_irq; 536 chip->set_config = mtk_gpio_set_config; 537 chip->base = -1; 538 chip->ngpio = hw->soc->npins; 539 chip->of_gpio_n_cells = 2; 540 541 ret = gpiochip_add_data(chip, hw); 542 if (ret < 0) 543 return ret; 544 545 /* Just for backward compatible for these old pinctrl nodes without 546 * "gpio-ranges" property. Otherwise, called directly from a 547 * DeviceTree-supported pinctrl driver is DEPRECATED. 548 * Please see Section 2.1 of 549 * Documentation/devicetree/bindings/gpio/gpio.txt on how to 550 * bind pinctrl and gpio drivers via the "gpio-ranges" property. 551 */ 552 if (!of_find_property(hw->dev->of_node, "gpio-ranges", NULL)) { 553 ret = gpiochip_add_pin_range(chip, dev_name(hw->dev), 0, 0, 554 chip->ngpio); 555 if (ret < 0) { 556 gpiochip_remove(chip); 557 return ret; 558 } 559 } 560 561 return 0; 562 } 563 564 static int mtk_build_groups(struct mtk_pinctrl *hw) 565 { 566 int err, i; 567 568 for (i = 0; i < hw->soc->ngrps; i++) { 569 const struct group_desc *group = hw->soc->grps + i; 570 571 err = pinctrl_generic_add_group(hw->pctrl, group->name, 572 group->pins, group->num_pins, 573 group->data); 574 if (err < 0) { 575 dev_err(hw->dev, "Failed to register group %s\n", 576 group->name); 577 return err; 578 } 579 } 580 581 return 0; 582 } 583 584 static int mtk_build_functions(struct mtk_pinctrl *hw) 585 { 586 int i, err; 587 588 for (i = 0; i < hw->soc->nfuncs ; i++) { 589 const struct function_desc *func = hw->soc->funcs + i; 590 591 err = pinmux_generic_add_function(hw->pctrl, func->name, 592 func->group_names, 593 func->num_group_names, 594 func->data); 595 if (err < 0) { 596 dev_err(hw->dev, "Failed to register function %s\n", 597 func->name); 598 return err; 599 } 600 } 601 602 return 0; 603 } 604 605 int mtk_moore_pinctrl_probe(struct platform_device *pdev, 606 const struct mtk_pin_soc *soc) 607 { 608 struct device *dev = &pdev->dev; 609 struct pinctrl_pin_desc *pins; 610 struct mtk_pinctrl *hw; 611 int err, i; 612 613 hw = devm_kzalloc(&pdev->dev, sizeof(*hw), GFP_KERNEL); 614 if (!hw) 615 return -ENOMEM; 616 617 hw->soc = soc; 618 hw->dev = &pdev->dev; 619 620 if (!hw->soc->nbase_names) 621 return dev_err_probe(dev, -EINVAL, 622 "SoC should be assigned at least one register base\n"); 623 624 hw->base = devm_kmalloc_array(&pdev->dev, hw->soc->nbase_names, 625 sizeof(*hw->base), GFP_KERNEL); 626 if (!hw->base) 627 return -ENOMEM; 628 629 for (i = 0; i < hw->soc->nbase_names; i++) { 630 hw->base[i] = devm_platform_ioremap_resource_byname(pdev, 631 hw->soc->base_names[i]); 632 if (IS_ERR(hw->base[i])) 633 return PTR_ERR(hw->base[i]); 634 } 635 636 hw->nbase = hw->soc->nbase_names; 637 638 spin_lock_init(&hw->lock); 639 640 /* Copy from internal struct mtk_pin_desc to register to the core */ 641 pins = devm_kmalloc_array(&pdev->dev, hw->soc->npins, sizeof(*pins), 642 GFP_KERNEL); 643 if (!pins) 644 return -ENOMEM; 645 646 for (i = 0; i < hw->soc->npins; i++) { 647 pins[i].number = hw->soc->pins[i].number; 648 pins[i].name = hw->soc->pins[i].name; 649 } 650 651 /* Setup pins descriptions per SoC types */ 652 mtk_desc.pins = (const struct pinctrl_pin_desc *)pins; 653 mtk_desc.npins = hw->soc->npins; 654 mtk_desc.num_custom_params = ARRAY_SIZE(mtk_custom_bindings); 655 mtk_desc.custom_params = mtk_custom_bindings; 656 #ifdef CONFIG_DEBUG_FS 657 mtk_desc.custom_conf_items = mtk_conf_items; 658 #endif 659 660 err = devm_pinctrl_register_and_init(&pdev->dev, &mtk_desc, hw, 661 &hw->pctrl); 662 if (err) 663 return err; 664 665 /* Setup groups descriptions per SoC types */ 666 err = mtk_build_groups(hw); 667 if (err) 668 return dev_err_probe(dev, err, "Failed to build groups\n"); 669 670 /* Setup functions descriptions per SoC types */ 671 err = mtk_build_functions(hw); 672 if (err) 673 return dev_err_probe(dev, err, "Failed to build functions\n"); 674 675 /* For able to make pinctrl_claim_hogs, we must not enable pinctrl 676 * until all groups and functions are being added one. 677 */ 678 err = pinctrl_enable(hw->pctrl); 679 if (err) 680 return err; 681 682 err = mtk_build_eint(hw, pdev); 683 if (err) 684 dev_warn(&pdev->dev, 685 "Failed to add EINT, but pinctrl still can work\n"); 686 687 /* Build gpiochip should be after pinctrl_enable is done */ 688 err = mtk_build_gpiochip(hw); 689 if (err) 690 return dev_err_probe(dev, err, "Failed to add gpio_chip\n"); 691 692 platform_set_drvdata(pdev, hw); 693 694 return 0; 695 } 696