1*85e4e688SBai Ping // SPDX-License-Identifier: GPL-2.0 2*85e4e688SBai Ping /* 3*85e4e688SBai Ping * Copyright 2017-2018 NXP 4*85e4e688SBai Ping */ 5*85e4e688SBai Ping 6*85e4e688SBai Ping #include <linux/err.h> 7*85e4e688SBai Ping #include <linux/init.h> 8*85e4e688SBai Ping #include <linux/of_device.h> 9*85e4e688SBai Ping #include <linux/pinctrl/pinctrl.h> 10*85e4e688SBai Ping #include <linux/platform_device.h> 11*85e4e688SBai Ping 12*85e4e688SBai Ping #include "pinctrl-imx.h" 13*85e4e688SBai Ping 14*85e4e688SBai Ping enum imx8mm_pads { 15*85e4e688SBai Ping MX8MM_PAD_RESERVE0 = 0, 16*85e4e688SBai Ping MX8MM_PAD_RESERVE1 = 1, 17*85e4e688SBai Ping MX8MM_PAD_RESERVE2 = 2, 18*85e4e688SBai Ping MX8MM_PAD_RESERVE3 = 3, 19*85e4e688SBai Ping MX8MM_PAD_RESERVE4 = 4, 20*85e4e688SBai Ping MX8MM_PAD_RESERVE5 = 5, 21*85e4e688SBai Ping MX8MM_PAD_RESERVE6 = 6, 22*85e4e688SBai Ping MX8MM_PAD_RESERVE7 = 7, 23*85e4e688SBai Ping MX8MM_PAD_RESERVE8 = 8, 24*85e4e688SBai Ping MX8MM_PAD_RESERVE9 = 9, 25*85e4e688SBai Ping MX8MM_IOMUXC_GPIO1_IO00 = 10, 26*85e4e688SBai Ping MX8MM_IOMUXC_GPIO1_IO01 = 11, 27*85e4e688SBai Ping MX8MM_IOMUXC_GPIO1_IO02 = 12, 28*85e4e688SBai Ping MX8MM_IOMUXC_GPIO1_IO03 = 13, 29*85e4e688SBai Ping MX8MM_IOMUXC_GPIO1_IO04 = 14, 30*85e4e688SBai Ping MX8MM_IOMUXC_GPIO1_IO05 = 15, 31*85e4e688SBai Ping MX8MM_IOMUXC_GPIO1_IO06 = 16, 32*85e4e688SBai Ping MX8MM_IOMUXC_GPIO1_IO07 = 17, 33*85e4e688SBai Ping MX8MM_IOMUXC_GPIO1_IO08 = 18, 34*85e4e688SBai Ping MX8MM_IOMUXC_GPIO1_IO09 = 19, 35*85e4e688SBai Ping MX8MM_IOMUXC_GPIO1_IO10 = 20, 36*85e4e688SBai Ping MX8MM_IOMUXC_GPIO1_IO11 = 21, 37*85e4e688SBai Ping MX8MM_IOMUXC_GPIO1_IO12 = 22, 38*85e4e688SBai Ping MX8MM_IOMUXC_GPIO1_IO13 = 23, 39*85e4e688SBai Ping MX8MM_IOMUXC_GPIO1_IO14 = 24, 40*85e4e688SBai Ping MX8MM_IOMUXC_GPIO1_IO15 = 25, 41*85e4e688SBai Ping MX8MM_IOMUXC_ENET_MDC = 26, 42*85e4e688SBai Ping MX8MM_IOMUXC_ENET_MDIO = 27, 43*85e4e688SBai Ping MX8MM_IOMUXC_ENET_TD3 = 28, 44*85e4e688SBai Ping MX8MM_IOMUXC_ENET_TD2 = 29, 45*85e4e688SBai Ping MX8MM_IOMUXC_ENET_TD1 = 30, 46*85e4e688SBai Ping MX8MM_IOMUXC_ENET_TD0 = 31, 47*85e4e688SBai Ping MX8MM_IOMUXC_ENET_TX_CTL = 32, 48*85e4e688SBai Ping MX8MM_IOMUXC_ENET_TXC = 33, 49*85e4e688SBai Ping MX8MM_IOMUXC_ENET_RX_CTL = 34, 50*85e4e688SBai Ping MX8MM_IOMUXC_ENET_RXC = 35, 51*85e4e688SBai Ping MX8MM_IOMUXC_ENET_RD0 = 36, 52*85e4e688SBai Ping MX8MM_IOMUXC_ENET_RD1 = 37, 53*85e4e688SBai Ping MX8MM_IOMUXC_ENET_RD2 = 38, 54*85e4e688SBai Ping MX8MM_IOMUXC_ENET_RD3 = 39, 55*85e4e688SBai Ping MX8MM_IOMUXC_SD1_CLK = 40, 56*85e4e688SBai Ping MX8MM_IOMUXC_SD1_CMD = 41, 57*85e4e688SBai Ping MX8MM_IOMUXC_SD1_DATA0 = 42, 58*85e4e688SBai Ping MX8MM_IOMUXC_SD1_DATA1 = 43, 59*85e4e688SBai Ping MX8MM_IOMUXC_SD1_DATA2 = 44, 60*85e4e688SBai Ping MX8MM_IOMUXC_SD1_DATA3 = 45, 61*85e4e688SBai Ping MX8MM_IOMUXC_SD1_DATA4 = 46, 62*85e4e688SBai Ping MX8MM_IOMUXC_SD1_DATA5 = 47, 63*85e4e688SBai Ping MX8MM_IOMUXC_SD1_DATA6 = 48, 64*85e4e688SBai Ping MX8MM_IOMUXC_SD1_DATA7 = 49, 65*85e4e688SBai Ping MX8MM_IOMUXC_SD1_RESET_B = 50, 66*85e4e688SBai Ping MX8MM_IOMUXC_SD1_STROBE = 51, 67*85e4e688SBai Ping MX8MM_IOMUXC_SD2_CD_B = 52, 68*85e4e688SBai Ping MX8MM_IOMUXC_SD2_CLK = 53, 69*85e4e688SBai Ping MX8MM_IOMUXC_SD2_CMD = 54, 70*85e4e688SBai Ping MX8MM_IOMUXC_SD2_DATA0 = 55, 71*85e4e688SBai Ping MX8MM_IOMUXC_SD2_DATA1 = 56, 72*85e4e688SBai Ping MX8MM_IOMUXC_SD2_DATA2 = 57, 73*85e4e688SBai Ping MX8MM_IOMUXC_SD2_DATA3 = 58, 74*85e4e688SBai Ping MX8MM_IOMUXC_SD2_RESET_B = 59, 75*85e4e688SBai Ping MX8MM_IOMUXC_SD2_WP = 60, 76*85e4e688SBai Ping MX8MM_IOMUXC_NAND_ALE = 61, 77*85e4e688SBai Ping MX8MM_IOMUXC_NAND_CE0 = 62, 78*85e4e688SBai Ping MX8MM_IOMUXC_NAND_CE1 = 63, 79*85e4e688SBai Ping MX8MM_IOMUXC_NAND_CE2 = 64, 80*85e4e688SBai Ping MX8MM_IOMUXC_NAND_CE3 = 65, 81*85e4e688SBai Ping MX8MM_IOMUXC_NAND_CLE = 66, 82*85e4e688SBai Ping MX8MM_IOMUXC_NAND_DATA00 = 67, 83*85e4e688SBai Ping MX8MM_IOMUXC_NAND_DATA01 = 68, 84*85e4e688SBai Ping MX8MM_IOMUXC_NAND_DATA02 = 69, 85*85e4e688SBai Ping MX8MM_IOMUXC_NAND_DATA03 = 70, 86*85e4e688SBai Ping MX8MM_IOMUXC_NAND_DATA04 = 71, 87*85e4e688SBai Ping MX8MM_IOMUXC_NAND_DATA05 = 72, 88*85e4e688SBai Ping MX8MM_IOMUXC_NAND_DATA06 = 73, 89*85e4e688SBai Ping MX8MM_IOMUXC_NAND_DATA07 = 74, 90*85e4e688SBai Ping MX8MM_IOMUXC_NAND_DQS = 75, 91*85e4e688SBai Ping MX8MM_IOMUXC_NAND_RE_B = 76, 92*85e4e688SBai Ping MX8MM_IOMUXC_NAND_READY_B = 77, 93*85e4e688SBai Ping MX8MM_IOMUXC_NAND_WE_B = 78, 94*85e4e688SBai Ping MX8MM_IOMUXC_NAND_WP_B = 79, 95*85e4e688SBai Ping MX8MM_IOMUXC_SAI5_RXFS = 80, 96*85e4e688SBai Ping MX8MM_IOMUXC_SAI5_RXC = 81, 97*85e4e688SBai Ping MX8MM_IOMUXC_SAI5_RXD0 = 82, 98*85e4e688SBai Ping MX8MM_IOMUXC_SAI5_RXD1 = 83, 99*85e4e688SBai Ping MX8MM_IOMUXC_SAI5_RXD2 = 84, 100*85e4e688SBai Ping MX8MM_IOMUXC_SAI5_RXD3 = 85, 101*85e4e688SBai Ping MX8MM_IOMUXC_SAI5_MCLK = 86, 102*85e4e688SBai Ping MX8MM_IOMUXC_SAI1_RXFS = 87, 103*85e4e688SBai Ping MX8MM_IOMUXC_SAI1_RXC = 88, 104*85e4e688SBai Ping MX8MM_IOMUXC_SAI1_RXD0 = 89, 105*85e4e688SBai Ping MX8MM_IOMUXC_SAI1_RXD1 = 90, 106*85e4e688SBai Ping MX8MM_IOMUXC_SAI1_RXD2 = 91, 107*85e4e688SBai Ping MX8MM_IOMUXC_SAI1_RXD3 = 92, 108*85e4e688SBai Ping MX8MM_IOMUXC_SAI1_RXD4 = 93, 109*85e4e688SBai Ping MX8MM_IOMUXC_SAI1_RXD5 = 94, 110*85e4e688SBai Ping MX8MM_IOMUXC_SAI1_RXD6 = 95, 111*85e4e688SBai Ping MX8MM_IOMUXC_SAI1_RXD7 = 96, 112*85e4e688SBai Ping MX8MM_IOMUXC_SAI1_TXFS = 97, 113*85e4e688SBai Ping MX8MM_IOMUXC_SAI1_TXC = 98, 114*85e4e688SBai Ping MX8MM_IOMUXC_SAI1_TXD0 = 99, 115*85e4e688SBai Ping MX8MM_IOMUXC_SAI1_TXD1 = 100, 116*85e4e688SBai Ping MX8MM_IOMUXC_SAI1_TXD2 = 101, 117*85e4e688SBai Ping MX8MM_IOMUXC_SAI1_TXD3 = 102, 118*85e4e688SBai Ping MX8MM_IOMUXC_SAI1_TXD4 = 103, 119*85e4e688SBai Ping MX8MM_IOMUXC_SAI1_TXD5 = 104, 120*85e4e688SBai Ping MX8MM_IOMUXC_SAI1_TXD6 = 105, 121*85e4e688SBai Ping MX8MM_IOMUXC_SAI1_TXD7 = 106, 122*85e4e688SBai Ping MX8MM_IOMUXC_SAI1_MCLK = 107, 123*85e4e688SBai Ping MX8MM_IOMUXC_SAI2_RXFS = 108, 124*85e4e688SBai Ping MX8MM_IOMUXC_SAI2_RXC = 109, 125*85e4e688SBai Ping MX8MM_IOMUXC_SAI2_RXD0 = 110, 126*85e4e688SBai Ping MX8MM_IOMUXC_SAI2_TXFS = 111, 127*85e4e688SBai Ping MX8MM_IOMUXC_SAI2_TXC = 112, 128*85e4e688SBai Ping MX8MM_IOMUXC_SAI2_TXD0 = 113, 129*85e4e688SBai Ping MX8MM_IOMUXC_SAI2_MCLK = 114, 130*85e4e688SBai Ping MX8MM_IOMUXC_SAI3_RXFS = 115, 131*85e4e688SBai Ping MX8MM_IOMUXC_SAI3_RXC = 116, 132*85e4e688SBai Ping MX8MM_IOMUXC_SAI3_RXD = 117, 133*85e4e688SBai Ping MX8MM_IOMUXC_SAI3_TXFS = 118, 134*85e4e688SBai Ping MX8MM_IOMUXC_SAI3_TXC = 119, 135*85e4e688SBai Ping MX8MM_IOMUXC_SAI3_TXD = 120, 136*85e4e688SBai Ping MX8MM_IOMUXC_SAI3_MCLK = 121, 137*85e4e688SBai Ping MX8MM_IOMUXC_SPDIF_TX = 122, 138*85e4e688SBai Ping MX8MM_IOMUXC_SPDIF_RX = 123, 139*85e4e688SBai Ping MX8MM_IOMUXC_SPDIF_EXT_CLK = 124, 140*85e4e688SBai Ping MX8MM_IOMUXC_ECSPI1_SCLK = 125, 141*85e4e688SBai Ping MX8MM_IOMUXC_ECSPI1_MOSI = 126, 142*85e4e688SBai Ping MX8MM_IOMUXC_ECSPI1_MISO = 127, 143*85e4e688SBai Ping MX8MM_IOMUXC_ECSPI1_SS0 = 128, 144*85e4e688SBai Ping MX8MM_IOMUXC_ECSPI2_SCLK = 129, 145*85e4e688SBai Ping MX8MM_IOMUXC_ECSPI2_MOSI = 130, 146*85e4e688SBai Ping MX8MM_IOMUXC_ECSPI2_MISO = 131, 147*85e4e688SBai Ping MX8MM_IOMUXC_ECSPI2_SS0 = 132, 148*85e4e688SBai Ping MX8MM_IOMUXC_I2C1_SCL = 133, 149*85e4e688SBai Ping MX8MM_IOMUXC_I2C1_SDA = 134, 150*85e4e688SBai Ping MX8MM_IOMUXC_I2C2_SCL = 135, 151*85e4e688SBai Ping MX8MM_IOMUXC_I2C2_SDA = 136, 152*85e4e688SBai Ping MX8MM_IOMUXC_I2C3_SCL = 137, 153*85e4e688SBai Ping MX8MM_IOMUXC_I2C3_SDA = 138, 154*85e4e688SBai Ping MX8MM_IOMUXC_I2C4_SCL = 139, 155*85e4e688SBai Ping MX8MM_IOMUXC_I2C4_SDA = 140, 156*85e4e688SBai Ping MX8MM_IOMUXC_UART1_RXD = 141, 157*85e4e688SBai Ping MX8MM_IOMUXC_UART1_TXD = 142, 158*85e4e688SBai Ping MX8MM_IOMUXC_UART2_RXD = 143, 159*85e4e688SBai Ping MX8MM_IOMUXC_UART2_TXD = 144, 160*85e4e688SBai Ping MX8MM_IOMUXC_UART3_RXD = 145, 161*85e4e688SBai Ping MX8MM_IOMUXC_UART3_TXD = 146, 162*85e4e688SBai Ping MX8MM_IOMUXC_UART4_RXD = 147, 163*85e4e688SBai Ping MX8MM_IOMUXC_UART4_TXD = 148, 164*85e4e688SBai Ping }; 165*85e4e688SBai Ping 166*85e4e688SBai Ping /* Pad names for the pinmux subsystem */ 167*85e4e688SBai Ping static const struct pinctrl_pin_desc imx8mm_pinctrl_pads[] = { 168*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_PAD_RESERVE0), 169*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_PAD_RESERVE1), 170*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_PAD_RESERVE2), 171*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_PAD_RESERVE3), 172*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_PAD_RESERVE4), 173*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_PAD_RESERVE5), 174*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_PAD_RESERVE6), 175*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_PAD_RESERVE7), 176*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_PAD_RESERVE8), 177*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_PAD_RESERVE9), 178*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_GPIO1_IO00), 179*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_GPIO1_IO01), 180*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_GPIO1_IO02), 181*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_GPIO1_IO03), 182*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_GPIO1_IO04), 183*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_GPIO1_IO05), 184*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_GPIO1_IO06), 185*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_GPIO1_IO07), 186*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_GPIO1_IO08), 187*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_GPIO1_IO09), 188*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_GPIO1_IO10), 189*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_GPIO1_IO11), 190*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_GPIO1_IO12), 191*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_GPIO1_IO13), 192*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_GPIO1_IO14), 193*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_GPIO1_IO15), 194*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_ENET_MDC), 195*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_ENET_MDIO), 196*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_ENET_TD3), 197*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_ENET_TD2), 198*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_ENET_TD1), 199*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_ENET_TD0), 200*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_ENET_TX_CTL), 201*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_ENET_TXC), 202*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_ENET_RX_CTL), 203*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_ENET_RXC), 204*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_ENET_RD0), 205*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_ENET_RD1), 206*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_ENET_RD2), 207*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_ENET_RD3), 208*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SD1_CLK), 209*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SD1_CMD), 210*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SD1_DATA0), 211*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SD1_DATA1), 212*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SD1_DATA2), 213*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SD1_DATA3), 214*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SD1_DATA4), 215*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SD1_DATA5), 216*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SD1_DATA6), 217*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SD1_DATA7), 218*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SD1_RESET_B), 219*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SD1_STROBE), 220*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SD2_CD_B), 221*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SD2_CLK), 222*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SD2_CMD), 223*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SD2_DATA0), 224*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SD2_DATA1), 225*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SD2_DATA2), 226*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SD2_DATA3), 227*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SD2_RESET_B), 228*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SD2_WP), 229*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_NAND_ALE), 230*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_NAND_CE0), 231*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_NAND_CE1), 232*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_NAND_CE2), 233*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_NAND_CE3), 234*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_NAND_CLE), 235*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_NAND_DATA00), 236*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_NAND_DATA01), 237*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_NAND_DATA02), 238*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_NAND_DATA03), 239*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_NAND_DATA04), 240*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_NAND_DATA05), 241*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_NAND_DATA06), 242*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_NAND_DATA07), 243*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_NAND_DQS), 244*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_NAND_RE_B), 245*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_NAND_READY_B), 246*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_NAND_WE_B), 247*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_NAND_WP_B), 248*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI5_RXFS), 249*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI5_RXC), 250*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI5_RXD0), 251*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI5_RXD1), 252*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI5_RXD2), 253*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI5_RXD3), 254*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI5_MCLK), 255*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI1_RXFS), 256*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI1_RXC), 257*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI1_RXD0), 258*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI1_RXD1), 259*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI1_RXD2), 260*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI1_RXD3), 261*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI1_RXD4), 262*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI1_RXD5), 263*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI1_RXD6), 264*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI1_RXD7), 265*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI1_TXFS), 266*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI1_TXC), 267*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI1_TXD0), 268*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI1_TXD1), 269*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI1_TXD2), 270*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI1_TXD3), 271*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI1_TXD4), 272*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI1_TXD5), 273*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI1_TXD6), 274*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI1_TXD7), 275*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI1_MCLK), 276*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI2_RXFS), 277*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI2_RXC), 278*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI2_RXD0), 279*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI2_TXFS), 280*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI2_TXC), 281*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI2_TXD0), 282*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI2_MCLK), 283*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI3_RXFS), 284*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI3_RXC), 285*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI3_RXD), 286*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI3_TXFS), 287*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI3_TXC), 288*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI3_TXD), 289*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SAI3_MCLK), 290*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SPDIF_TX), 291*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SPDIF_RX), 292*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_SPDIF_EXT_CLK), 293*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_ECSPI1_SCLK), 294*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_ECSPI1_MOSI), 295*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_ECSPI1_MISO), 296*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_ECSPI1_SS0), 297*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_ECSPI2_SCLK), 298*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_ECSPI2_MOSI), 299*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_ECSPI2_MISO), 300*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_ECSPI2_SS0), 301*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_I2C1_SCL), 302*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_I2C1_SDA), 303*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_I2C2_SCL), 304*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_I2C2_SDA), 305*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_I2C3_SCL), 306*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_I2C3_SDA), 307*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_I2C4_SCL), 308*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_I2C4_SDA), 309*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_UART1_RXD), 310*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_UART1_TXD), 311*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_UART2_RXD), 312*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_UART2_TXD), 313*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_UART3_RXD), 314*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_UART3_TXD), 315*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_UART4_RXD), 316*85e4e688SBai Ping IMX_PINCTRL_PIN(MX8MM_IOMUXC_UART4_TXD), 317*85e4e688SBai Ping }; 318*85e4e688SBai Ping 319*85e4e688SBai Ping static const struct imx_pinctrl_soc_info imx8mm_pinctrl_info = { 320*85e4e688SBai Ping .pins = imx8mm_pinctrl_pads, 321*85e4e688SBai Ping .npins = ARRAY_SIZE(imx8mm_pinctrl_pads), 322*85e4e688SBai Ping .gpr_compatible = "fsl,imx8mm-iomuxc-gpr", 323*85e4e688SBai Ping }; 324*85e4e688SBai Ping 325*85e4e688SBai Ping static const struct of_device_id imx8mm_pinctrl_of_match[] = { 326*85e4e688SBai Ping { .compatible = "fsl,imx8mm-iomuxc", .data = &imx8mm_pinctrl_info, }, 327*85e4e688SBai Ping { /* sentinel */ } 328*85e4e688SBai Ping }; 329*85e4e688SBai Ping 330*85e4e688SBai Ping static int imx8mm_pinctrl_probe(struct platform_device *pdev) 331*85e4e688SBai Ping { 332*85e4e688SBai Ping return imx_pinctrl_probe(pdev, &imx8mm_pinctrl_info); 333*85e4e688SBai Ping } 334*85e4e688SBai Ping 335*85e4e688SBai Ping static struct platform_driver imx8mm_pinctrl_driver = { 336*85e4e688SBai Ping .driver = { 337*85e4e688SBai Ping .name = "imx8mm-pinctrl", 338*85e4e688SBai Ping .of_match_table = of_match_ptr(imx8mm_pinctrl_of_match), 339*85e4e688SBai Ping .suppress_bind_attrs = true, 340*85e4e688SBai Ping }, 341*85e4e688SBai Ping .probe = imx8mm_pinctrl_probe, 342*85e4e688SBai Ping }; 343*85e4e688SBai Ping 344*85e4e688SBai Ping static int __init imx8mm_pinctrl_init(void) 345*85e4e688SBai Ping { 346*85e4e688SBai Ping return platform_driver_register(&imx8mm_pinctrl_driver); 347*85e4e688SBai Ping } 348*85e4e688SBai Ping arch_initcall(imx8mm_pinctrl_init); 349