1 /* 2 * Copyright (C) 2014-2015 Freescale Semiconductor, Inc. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 */ 8 9 #include <linux/err.h> 10 #include <linux/init.h> 11 #include <linux/io.h> 12 #include <linux/module.h> 13 #include <linux/of.h> 14 #include <linux/of_device.h> 15 #include <linux/pinctrl/pinctrl.h> 16 17 #include "pinctrl-imx.h" 18 19 enum imx7d_pads { 20 MX7D_PAD_RESERVE0 = 0, 21 MX7D_PAD_RESERVE1 = 1, 22 MX7D_PAD_RESERVE2 = 2, 23 MX7D_PAD_RESERVE3 = 3, 24 MX7D_PAD_RESERVE4 = 4, 25 MX7D_PAD_GPIO1_IO08 = 5, 26 MX7D_PAD_GPIO1_IO09 = 6, 27 MX7D_PAD_GPIO1_IO10 = 7, 28 MX7D_PAD_GPIO1_IO11 = 8, 29 MX7D_PAD_GPIO1_IO12 = 9, 30 MX7D_PAD_GPIO1_IO13 = 10, 31 MX7D_PAD_GPIO1_IO14 = 11, 32 MX7D_PAD_GPIO1_IO15 = 12, 33 MX7D_PAD_EPDC_DATA00 = 13, 34 MX7D_PAD_EPDC_DATA01 = 14, 35 MX7D_PAD_EPDC_DATA02 = 15, 36 MX7D_PAD_EPDC_DATA03 = 16, 37 MX7D_PAD_EPDC_DATA04 = 17, 38 MX7D_PAD_EPDC_DATA05 = 18, 39 MX7D_PAD_EPDC_DATA06 = 19, 40 MX7D_PAD_EPDC_DATA07 = 20, 41 MX7D_PAD_EPDC_DATA08 = 21, 42 MX7D_PAD_EPDC_DATA09 = 22, 43 MX7D_PAD_EPDC_DATA10 = 23, 44 MX7D_PAD_EPDC_DATA11 = 24, 45 MX7D_PAD_EPDC_DATA12 = 25, 46 MX7D_PAD_EPDC_DATA13 = 26, 47 MX7D_PAD_EPDC_DATA14 = 27, 48 MX7D_PAD_EPDC_DATA15 = 28, 49 MX7D_PAD_EPDC_SDCLK = 29, 50 MX7D_PAD_EPDC_SDLE = 30, 51 MX7D_PAD_EPDC_SDOE = 31, 52 MX7D_PAD_EPDC_SDSHR = 32, 53 MX7D_PAD_EPDC_SDCE0 = 33, 54 MX7D_PAD_EPDC_SDCE1 = 34, 55 MX7D_PAD_EPDC_SDCE2 = 35, 56 MX7D_PAD_EPDC_SDCE3 = 36, 57 MX7D_PAD_EPDC_GDCLK = 37, 58 MX7D_PAD_EPDC_GDOE = 38, 59 MX7D_PAD_EPDC_GDRL = 39, 60 MX7D_PAD_EPDC_GDSP = 40, 61 MX7D_PAD_EPDC_BDR0 = 41, 62 MX7D_PAD_EPDC_BDR1 = 42, 63 MX7D_PAD_EPDC_PWR_COM = 43, 64 MX7D_PAD_EPDC_PWR_STAT = 44, 65 MX7D_PAD_LCD_CLK = 45, 66 MX7D_PAD_LCD_ENABLE = 46, 67 MX7D_PAD_LCD_HSYNC = 47, 68 MX7D_PAD_LCD_VSYNC = 48, 69 MX7D_PAD_LCD_RESET = 49, 70 MX7D_PAD_LCD_DATA00 = 50, 71 MX7D_PAD_LCD_DATA01 = 51, 72 MX7D_PAD_LCD_DATA02 = 52, 73 MX7D_PAD_LCD_DATA03 = 53, 74 MX7D_PAD_LCD_DATA04 = 54, 75 MX7D_PAD_LCD_DATA05 = 55, 76 MX7D_PAD_LCD_DATA06 = 56, 77 MX7D_PAD_LCD_DATA07 = 57, 78 MX7D_PAD_LCD_DATA08 = 58, 79 MX7D_PAD_LCD_DATA09 = 59, 80 MX7D_PAD_LCD_DATA10 = 60, 81 MX7D_PAD_LCD_DATA11 = 61, 82 MX7D_PAD_LCD_DATA12 = 62, 83 MX7D_PAD_LCD_DATA13 = 63, 84 MX7D_PAD_LCD_DATA14 = 64, 85 MX7D_PAD_LCD_DATA15 = 65, 86 MX7D_PAD_LCD_DATA16 = 66, 87 MX7D_PAD_LCD_DATA17 = 67, 88 MX7D_PAD_LCD_DATA18 = 68, 89 MX7D_PAD_LCD_DATA19 = 69, 90 MX7D_PAD_LCD_DATA20 = 70, 91 MX7D_PAD_LCD_DATA21 = 71, 92 MX7D_PAD_LCD_DATA22 = 72, 93 MX7D_PAD_LCD_DATA23 = 73, 94 MX7D_PAD_UART1_RX_DATA = 74, 95 MX7D_PAD_UART1_TX_DATA = 75, 96 MX7D_PAD_UART2_RX_DATA = 76, 97 MX7D_PAD_UART2_TX_DATA = 77, 98 MX7D_PAD_UART3_RX_DATA = 78, 99 MX7D_PAD_UART3_TX_DATA = 79, 100 MX7D_PAD_UART3_RTS_B = 80, 101 MX7D_PAD_UART3_CTS_B = 81, 102 MX7D_PAD_I2C1_SCL = 82, 103 MX7D_PAD_I2C1_SDA = 83, 104 MX7D_PAD_I2C2_SCL = 84, 105 MX7D_PAD_I2C2_SDA = 85, 106 MX7D_PAD_I2C3_SCL = 86, 107 MX7D_PAD_I2C3_SDA = 87, 108 MX7D_PAD_I2C4_SCL = 88, 109 MX7D_PAD_I2C4_SDA = 89, 110 MX7D_PAD_ECSPI1_SCLK = 90, 111 MX7D_PAD_ECSPI1_MOSI = 91, 112 MX7D_PAD_ECSPI1_MISO = 92, 113 MX7D_PAD_ECSPI1_SS0 = 93, 114 MX7D_PAD_ECSPI2_SCLK = 94, 115 MX7D_PAD_ECSPI2_MOSI = 95, 116 MX7D_PAD_ECSPI2_MISO = 96, 117 MX7D_PAD_ECSPI2_SS0 = 97, 118 MX7D_PAD_SD1_CD_B = 98, 119 MX7D_PAD_SD1_WP = 99, 120 MX7D_PAD_SD1_RESET_B = 100, 121 MX7D_PAD_SD1_CLK = 101, 122 MX7D_PAD_SD1_CMD = 102, 123 MX7D_PAD_SD1_DATA0 = 103, 124 MX7D_PAD_SD1_DATA1 = 104, 125 MX7D_PAD_SD1_DATA2 = 105, 126 MX7D_PAD_SD1_DATA3 = 106, 127 MX7D_PAD_SD2_CD_B = 107, 128 MX7D_PAD_SD2_WP = 108, 129 MX7D_PAD_SD2_RESET_B = 109, 130 MX7D_PAD_SD2_CLK = 110, 131 MX7D_PAD_SD2_CMD = 111, 132 MX7D_PAD_SD2_DATA0 = 112, 133 MX7D_PAD_SD2_DATA1 = 113, 134 MX7D_PAD_SD2_DATA2 = 114, 135 MX7D_PAD_SD2_DATA3 = 115, 136 MX7D_PAD_SD3_CLK = 116, 137 MX7D_PAD_SD3_CMD = 117, 138 MX7D_PAD_SD3_DATA0 = 118, 139 MX7D_PAD_SD3_DATA1 = 119, 140 MX7D_PAD_SD3_DATA2 = 120, 141 MX7D_PAD_SD3_DATA3 = 121, 142 MX7D_PAD_SD3_DATA4 = 122, 143 MX7D_PAD_SD3_DATA5 = 123, 144 MX7D_PAD_SD3_DATA6 = 124, 145 MX7D_PAD_SD3_DATA7 = 125, 146 MX7D_PAD_SD3_STROBE = 126, 147 MX7D_PAD_SD3_RESET_B = 127, 148 MX7D_PAD_SAI1_RX_DATA = 128, 149 MX7D_PAD_SAI1_TX_BCLK = 129, 150 MX7D_PAD_SAI1_TX_SYNC = 130, 151 MX7D_PAD_SAI1_TX_DATA = 131, 152 MX7D_PAD_SAI1_RX_SYNC = 132, 153 MX7D_PAD_SAI1_RX_BCLK = 133, 154 MX7D_PAD_SAI1_MCLK = 134, 155 MX7D_PAD_SAI2_TX_SYNC = 135, 156 MX7D_PAD_SAI2_TX_BCLK = 136, 157 MX7D_PAD_SAI2_RX_DATA = 137, 158 MX7D_PAD_SAI2_TX_DATA = 138, 159 MX7D_PAD_ENET1_RGMII_RD0 = 139, 160 MX7D_PAD_ENET1_RGMII_RD1 = 140, 161 MX7D_PAD_ENET1_RGMII_RD2 = 141, 162 MX7D_PAD_ENET1_RGMII_RD3 = 142, 163 MX7D_PAD_ENET1_RGMII_RX_CTL = 143, 164 MX7D_PAD_ENET1_RGMII_RXC = 144, 165 MX7D_PAD_ENET1_RGMII_TD0 = 145, 166 MX7D_PAD_ENET1_RGMII_TD1 = 146, 167 MX7D_PAD_ENET1_RGMII_TD2 = 147, 168 MX7D_PAD_ENET1_RGMII_TD3 = 148, 169 MX7D_PAD_ENET1_RGMII_TX_CTL = 149, 170 MX7D_PAD_ENET1_RGMII_TXC = 150, 171 MX7D_PAD_ENET1_TX_CLK = 151, 172 MX7D_PAD_ENET1_RX_CLK = 152, 173 MX7D_PAD_ENET1_CRS = 153, 174 MX7D_PAD_ENET1_COL = 154, 175 }; 176 177 enum imx7d_lpsr_pads { 178 MX7D_PAD_GPIO1_IO00 = 0, 179 MX7D_PAD_GPIO1_IO01 = 1, 180 MX7D_PAD_GPIO1_IO02 = 2, 181 MX7D_PAD_GPIO1_IO03 = 3, 182 MX7D_PAD_GPIO1_IO04 = 4, 183 MX7D_PAD_GPIO1_IO05 = 5, 184 MX7D_PAD_GPIO1_IO06 = 6, 185 MX7D_PAD_GPIO1_IO07 = 7, 186 }; 187 188 /* Pad names for the pinmux subsystem */ 189 static const struct pinctrl_pin_desc imx7d_pinctrl_pads[] = { 190 IMX_PINCTRL_PIN(MX7D_PAD_RESERVE0), 191 IMX_PINCTRL_PIN(MX7D_PAD_RESERVE1), 192 IMX_PINCTRL_PIN(MX7D_PAD_RESERVE2), 193 IMX_PINCTRL_PIN(MX7D_PAD_RESERVE3), 194 IMX_PINCTRL_PIN(MX7D_PAD_RESERVE4), 195 IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO08), 196 IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO09), 197 IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO10), 198 IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO11), 199 IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO12), 200 IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO13), 201 IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO14), 202 IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO15), 203 IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA00), 204 IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA01), 205 IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA02), 206 IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA03), 207 IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA04), 208 IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA05), 209 IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA06), 210 IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA07), 211 IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA08), 212 IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA09), 213 IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA10), 214 IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA11), 215 IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA12), 216 IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA13), 217 IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA14), 218 IMX_PINCTRL_PIN(MX7D_PAD_EPDC_DATA15), 219 IMX_PINCTRL_PIN(MX7D_PAD_EPDC_SDCLK), 220 IMX_PINCTRL_PIN(MX7D_PAD_EPDC_SDLE), 221 IMX_PINCTRL_PIN(MX7D_PAD_EPDC_SDOE), 222 IMX_PINCTRL_PIN(MX7D_PAD_EPDC_SDSHR), 223 IMX_PINCTRL_PIN(MX7D_PAD_EPDC_SDCE0), 224 IMX_PINCTRL_PIN(MX7D_PAD_EPDC_SDCE1), 225 IMX_PINCTRL_PIN(MX7D_PAD_EPDC_SDCE2), 226 IMX_PINCTRL_PIN(MX7D_PAD_EPDC_SDCE3), 227 IMX_PINCTRL_PIN(MX7D_PAD_EPDC_GDCLK), 228 IMX_PINCTRL_PIN(MX7D_PAD_EPDC_GDOE), 229 IMX_PINCTRL_PIN(MX7D_PAD_EPDC_GDRL), 230 IMX_PINCTRL_PIN(MX7D_PAD_EPDC_GDSP), 231 IMX_PINCTRL_PIN(MX7D_PAD_EPDC_BDR0), 232 IMX_PINCTRL_PIN(MX7D_PAD_EPDC_BDR1), 233 IMX_PINCTRL_PIN(MX7D_PAD_EPDC_PWR_COM), 234 IMX_PINCTRL_PIN(MX7D_PAD_EPDC_PWR_STAT), 235 IMX_PINCTRL_PIN(MX7D_PAD_LCD_CLK), 236 IMX_PINCTRL_PIN(MX7D_PAD_LCD_ENABLE), 237 IMX_PINCTRL_PIN(MX7D_PAD_LCD_HSYNC), 238 IMX_PINCTRL_PIN(MX7D_PAD_LCD_VSYNC), 239 IMX_PINCTRL_PIN(MX7D_PAD_LCD_RESET), 240 IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA00), 241 IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA01), 242 IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA02), 243 IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA03), 244 IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA04), 245 IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA05), 246 IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA06), 247 IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA07), 248 IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA08), 249 IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA09), 250 IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA10), 251 IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA11), 252 IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA12), 253 IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA13), 254 IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA14), 255 IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA15), 256 IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA16), 257 IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA17), 258 IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA18), 259 IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA19), 260 IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA20), 261 IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA21), 262 IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA22), 263 IMX_PINCTRL_PIN(MX7D_PAD_LCD_DATA23), 264 IMX_PINCTRL_PIN(MX7D_PAD_UART1_RX_DATA), 265 IMX_PINCTRL_PIN(MX7D_PAD_UART1_TX_DATA), 266 IMX_PINCTRL_PIN(MX7D_PAD_UART2_RX_DATA), 267 IMX_PINCTRL_PIN(MX7D_PAD_UART2_TX_DATA), 268 IMX_PINCTRL_PIN(MX7D_PAD_UART3_RX_DATA), 269 IMX_PINCTRL_PIN(MX7D_PAD_UART3_TX_DATA), 270 IMX_PINCTRL_PIN(MX7D_PAD_UART3_RTS_B), 271 IMX_PINCTRL_PIN(MX7D_PAD_UART3_CTS_B), 272 IMX_PINCTRL_PIN(MX7D_PAD_I2C1_SCL), 273 IMX_PINCTRL_PIN(MX7D_PAD_I2C1_SDA), 274 IMX_PINCTRL_PIN(MX7D_PAD_I2C2_SCL), 275 IMX_PINCTRL_PIN(MX7D_PAD_I2C2_SDA), 276 IMX_PINCTRL_PIN(MX7D_PAD_I2C3_SCL), 277 IMX_PINCTRL_PIN(MX7D_PAD_I2C3_SDA), 278 IMX_PINCTRL_PIN(MX7D_PAD_I2C4_SCL), 279 IMX_PINCTRL_PIN(MX7D_PAD_I2C4_SDA), 280 IMX_PINCTRL_PIN(MX7D_PAD_ECSPI1_SCLK), 281 IMX_PINCTRL_PIN(MX7D_PAD_ECSPI1_MOSI), 282 IMX_PINCTRL_PIN(MX7D_PAD_ECSPI1_MISO), 283 IMX_PINCTRL_PIN(MX7D_PAD_ECSPI1_SS0), 284 IMX_PINCTRL_PIN(MX7D_PAD_ECSPI2_SCLK), 285 IMX_PINCTRL_PIN(MX7D_PAD_ECSPI2_MOSI), 286 IMX_PINCTRL_PIN(MX7D_PAD_ECSPI2_MISO), 287 IMX_PINCTRL_PIN(MX7D_PAD_ECSPI2_SS0), 288 IMX_PINCTRL_PIN(MX7D_PAD_SD1_CD_B), 289 IMX_PINCTRL_PIN(MX7D_PAD_SD1_WP), 290 IMX_PINCTRL_PIN(MX7D_PAD_SD1_RESET_B), 291 IMX_PINCTRL_PIN(MX7D_PAD_SD1_CLK), 292 IMX_PINCTRL_PIN(MX7D_PAD_SD1_CMD), 293 IMX_PINCTRL_PIN(MX7D_PAD_SD1_DATA0), 294 IMX_PINCTRL_PIN(MX7D_PAD_SD1_DATA1), 295 IMX_PINCTRL_PIN(MX7D_PAD_SD1_DATA2), 296 IMX_PINCTRL_PIN(MX7D_PAD_SD1_DATA3), 297 IMX_PINCTRL_PIN(MX7D_PAD_SD2_CD_B), 298 IMX_PINCTRL_PIN(MX7D_PAD_SD2_WP), 299 IMX_PINCTRL_PIN(MX7D_PAD_SD2_RESET_B), 300 IMX_PINCTRL_PIN(MX7D_PAD_SD2_CLK), 301 IMX_PINCTRL_PIN(MX7D_PAD_SD2_CMD), 302 IMX_PINCTRL_PIN(MX7D_PAD_SD2_DATA0), 303 IMX_PINCTRL_PIN(MX7D_PAD_SD2_DATA1), 304 IMX_PINCTRL_PIN(MX7D_PAD_SD2_DATA2), 305 IMX_PINCTRL_PIN(MX7D_PAD_SD2_DATA3), 306 IMX_PINCTRL_PIN(MX7D_PAD_SD3_CLK), 307 IMX_PINCTRL_PIN(MX7D_PAD_SD3_CMD), 308 IMX_PINCTRL_PIN(MX7D_PAD_SD3_DATA0), 309 IMX_PINCTRL_PIN(MX7D_PAD_SD3_DATA1), 310 IMX_PINCTRL_PIN(MX7D_PAD_SD3_DATA2), 311 IMX_PINCTRL_PIN(MX7D_PAD_SD3_DATA3), 312 IMX_PINCTRL_PIN(MX7D_PAD_SD3_DATA4), 313 IMX_PINCTRL_PIN(MX7D_PAD_SD3_DATA5), 314 IMX_PINCTRL_PIN(MX7D_PAD_SD3_DATA6), 315 IMX_PINCTRL_PIN(MX7D_PAD_SD3_DATA7), 316 IMX_PINCTRL_PIN(MX7D_PAD_SD3_STROBE), 317 IMX_PINCTRL_PIN(MX7D_PAD_SD3_RESET_B), 318 IMX_PINCTRL_PIN(MX7D_PAD_SAI1_RX_DATA), 319 IMX_PINCTRL_PIN(MX7D_PAD_SAI1_TX_BCLK), 320 IMX_PINCTRL_PIN(MX7D_PAD_SAI1_TX_SYNC), 321 IMX_PINCTRL_PIN(MX7D_PAD_SAI1_TX_DATA), 322 IMX_PINCTRL_PIN(MX7D_PAD_SAI1_RX_SYNC), 323 IMX_PINCTRL_PIN(MX7D_PAD_SAI1_RX_BCLK), 324 IMX_PINCTRL_PIN(MX7D_PAD_SAI1_MCLK), 325 IMX_PINCTRL_PIN(MX7D_PAD_SAI2_TX_SYNC), 326 IMX_PINCTRL_PIN(MX7D_PAD_SAI2_TX_BCLK), 327 IMX_PINCTRL_PIN(MX7D_PAD_SAI2_RX_DATA), 328 IMX_PINCTRL_PIN(MX7D_PAD_SAI2_TX_DATA), 329 IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_RD0), 330 IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_RD1), 331 IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_RD2), 332 IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_RD3), 333 IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_RX_CTL), 334 IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_RXC), 335 IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_TD0), 336 IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_TD1), 337 IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_TD2), 338 IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_TD3), 339 IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_TX_CTL), 340 IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RGMII_TXC), 341 IMX_PINCTRL_PIN(MX7D_PAD_ENET1_TX_CLK), 342 IMX_PINCTRL_PIN(MX7D_PAD_ENET1_RX_CLK), 343 IMX_PINCTRL_PIN(MX7D_PAD_ENET1_CRS), 344 IMX_PINCTRL_PIN(MX7D_PAD_ENET1_COL), 345 }; 346 347 /* Pad names for the pinmux subsystem */ 348 static const struct pinctrl_pin_desc imx7d_lpsr_pinctrl_pads[] = { 349 IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO00), 350 IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO01), 351 IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO02), 352 IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO03), 353 IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO04), 354 IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO05), 355 IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO06), 356 IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO07), 357 }; 358 359 static struct imx_pinctrl_soc_info imx7d_pinctrl_info = { 360 .pins = imx7d_pinctrl_pads, 361 .npins = ARRAY_SIZE(imx7d_pinctrl_pads), 362 }; 363 364 static struct imx_pinctrl_soc_info imx7d_lpsr_pinctrl_info = { 365 .pins = imx7d_lpsr_pinctrl_pads, 366 .npins = ARRAY_SIZE(imx7d_lpsr_pinctrl_pads), 367 .flags = ZERO_OFFSET_VALID, 368 }; 369 370 static struct of_device_id imx7d_pinctrl_of_match[] = { 371 { .compatible = "fsl,imx7d-iomuxc", .data = &imx7d_pinctrl_info, }, 372 { .compatible = "fsl,imx7d-iomuxc-lpsr", .data = &imx7d_lpsr_pinctrl_info }, 373 { /* sentinel */ } 374 }; 375 376 static int imx7d_pinctrl_probe(struct platform_device *pdev) 377 { 378 const struct of_device_id *match; 379 struct imx_pinctrl_soc_info *pinctrl_info; 380 381 match = of_match_device(imx7d_pinctrl_of_match, &pdev->dev); 382 383 if (!match) 384 return -ENODEV; 385 386 pinctrl_info = (struct imx_pinctrl_soc_info *) match->data; 387 388 return imx_pinctrl_probe(pdev, pinctrl_info); 389 } 390 391 static struct platform_driver imx7d_pinctrl_driver = { 392 .driver = { 393 .name = "imx7d-pinctrl", 394 .of_match_table = of_match_ptr(imx7d_pinctrl_of_match), 395 }, 396 .probe = imx7d_pinctrl_probe, 397 .remove = imx_pinctrl_remove, 398 }; 399 400 static int __init imx7d_pinctrl_init(void) 401 { 402 return platform_driver_register(&imx7d_pinctrl_driver); 403 } 404 arch_initcall(imx7d_pinctrl_init); 405 406 static void __exit imx7d_pinctrl_exit(void) 407 { 408 platform_driver_unregister(&imx7d_pinctrl_driver); 409 } 410 module_exit(imx7d_pinctrl_exit); 411 412 MODULE_AUTHOR("Anson Huang <Anson.Huang@freescale.com>"); 413 MODULE_DESCRIPTION("Freescale imx7d pinctrl driver"); 414 MODULE_LICENSE("GPL v2"); 415