xref: /linux/drivers/pinctrl/freescale/pinctrl-imx6sx.c (revision 060f03e95454a0f4a1deff3e5f912e461ae0f0c5)
1c2b39decSFabio Estevam // SPDX-License-Identifier: GPL-2.0
2c2b39decSFabio Estevam //
3c2b39decSFabio Estevam // Freescale imx6sx pinctrl driver
4c2b39decSFabio Estevam //
5c2b39decSFabio Estevam // Author: Anson Huang <Anson.Huang@freescale.com>
6c2b39decSFabio Estevam // Copyright (C) 2014 Freescale Semiconductor, Inc.
7edad3b2aSLinus Walleij 
8edad3b2aSLinus Walleij #include <linux/err.h>
9edad3b2aSLinus Walleij #include <linux/init.h>
10edad3b2aSLinus Walleij #include <linux/io.h>
11*060f03e9SRob Herring #include <linux/mod_devicetable.h>
12*060f03e9SRob Herring #include <linux/platform_device.h>
13edad3b2aSLinus Walleij #include <linux/pinctrl/pinctrl.h>
14edad3b2aSLinus Walleij 
15edad3b2aSLinus Walleij #include "pinctrl-imx.h"
16edad3b2aSLinus Walleij 
17edad3b2aSLinus Walleij enum imx6sx_pads {
18edad3b2aSLinus Walleij 	MX6Sx_PAD_RESERVE0 = 0,
19edad3b2aSLinus Walleij 	MX6Sx_PAD_RESERVE1 = 1,
20edad3b2aSLinus Walleij 	MX6Sx_PAD_RESERVE2 = 2,
21edad3b2aSLinus Walleij 	MX6Sx_PAD_RESERVE3 = 3,
22edad3b2aSLinus Walleij 	MX6Sx_PAD_RESERVE4 = 4,
23edad3b2aSLinus Walleij 	MX6SX_PAD_GPIO1_IO00 = 5,
24edad3b2aSLinus Walleij 	MX6SX_PAD_GPIO1_IO01 = 6,
25edad3b2aSLinus Walleij 	MX6SX_PAD_GPIO1_IO02 = 7,
26edad3b2aSLinus Walleij 	MX6SX_PAD_GPIO1_IO03 = 8,
27edad3b2aSLinus Walleij 	MX6SX_PAD_GPIO1_IO04 = 9,
28edad3b2aSLinus Walleij 	MX6SX_PAD_GPIO1_IO05 = 10,
29edad3b2aSLinus Walleij 	MX6SX_PAD_GPIO1_IO06 = 11,
30edad3b2aSLinus Walleij 	MX6SX_PAD_GPIO1_IO07 = 12,
31edad3b2aSLinus Walleij 	MX6SX_PAD_GPIO1_IO08 = 13,
32edad3b2aSLinus Walleij 	MX6SX_PAD_GPIO1_IO09 = 14,
33edad3b2aSLinus Walleij 	MX6SX_PAD_GPIO1_IO10 = 15,
34edad3b2aSLinus Walleij 	MX6SX_PAD_GPIO1_IO11 = 16,
35edad3b2aSLinus Walleij 	MX6SX_PAD_GPIO1_IO12 = 17,
36edad3b2aSLinus Walleij 	MX6SX_PAD_GPIO1_IO13 = 18,
37edad3b2aSLinus Walleij 	MX6SX_PAD_CSI_DATA00 = 19,
38edad3b2aSLinus Walleij 	MX6SX_PAD_CSI_DATA01 = 20,
39edad3b2aSLinus Walleij 	MX6SX_PAD_CSI_DATA02 = 21,
40edad3b2aSLinus Walleij 	MX6SX_PAD_CSI_DATA03 = 22,
41edad3b2aSLinus Walleij 	MX6SX_PAD_CSI_DATA04 = 23,
42edad3b2aSLinus Walleij 	MX6SX_PAD_CSI_DATA05 = 24,
43edad3b2aSLinus Walleij 	MX6SX_PAD_CSI_DATA06 = 25,
44edad3b2aSLinus Walleij 	MX6SX_PAD_CSI_DATA07 = 26,
45edad3b2aSLinus Walleij 	MX6SX_PAD_CSI_HSYNC = 27,
46edad3b2aSLinus Walleij 	MX6SX_PAD_CSI_MCLK = 28,
47edad3b2aSLinus Walleij 	MX6SX_PAD_CSI_PIXCLK = 29,
48edad3b2aSLinus Walleij 	MX6SX_PAD_CSI_VSYNC = 30,
49edad3b2aSLinus Walleij 	MX6SX_PAD_ENET1_COL = 31,
50edad3b2aSLinus Walleij 	MX6SX_PAD_ENET1_CRS = 32,
51edad3b2aSLinus Walleij 	MX6SX_PAD_ENET1_MDC = 33,
52edad3b2aSLinus Walleij 	MX6SX_PAD_ENET1_MDIO = 34,
53edad3b2aSLinus Walleij 	MX6SX_PAD_ENET1_RX_CLK = 35,
54edad3b2aSLinus Walleij 	MX6SX_PAD_ENET1_TX_CLK = 36,
55edad3b2aSLinus Walleij 	MX6SX_PAD_ENET2_COL = 37,
56edad3b2aSLinus Walleij 	MX6SX_PAD_ENET2_CRS = 38,
57edad3b2aSLinus Walleij 	MX6SX_PAD_ENET2_RX_CLK = 39,
58edad3b2aSLinus Walleij 	MX6SX_PAD_ENET2_TX_CLK = 40,
59edad3b2aSLinus Walleij 	MX6SX_PAD_KEY_COL0 = 41,
60edad3b2aSLinus Walleij 	MX6SX_PAD_KEY_COL1 = 42,
61edad3b2aSLinus Walleij 	MX6SX_PAD_KEY_COL2 = 43,
62edad3b2aSLinus Walleij 	MX6SX_PAD_KEY_COL3 = 44,
63edad3b2aSLinus Walleij 	MX6SX_PAD_KEY_COL4 = 45,
64edad3b2aSLinus Walleij 	MX6SX_PAD_KEY_ROW0 = 46,
65edad3b2aSLinus Walleij 	MX6SX_PAD_KEY_ROW1 = 47,
66edad3b2aSLinus Walleij 	MX6SX_PAD_KEY_ROW2 = 48,
67edad3b2aSLinus Walleij 	MX6SX_PAD_KEY_ROW3 = 49,
68edad3b2aSLinus Walleij 	MX6SX_PAD_KEY_ROW4 = 50,
69edad3b2aSLinus Walleij 	MX6SX_PAD_LCD1_CLK = 51,
70edad3b2aSLinus Walleij 	MX6SX_PAD_LCD1_DATA00 = 52,
71edad3b2aSLinus Walleij 	MX6SX_PAD_LCD1_DATA01 = 53,
72edad3b2aSLinus Walleij 	MX6SX_PAD_LCD1_DATA02 = 54,
73edad3b2aSLinus Walleij 	MX6SX_PAD_LCD1_DATA03 = 55,
74edad3b2aSLinus Walleij 	MX6SX_PAD_LCD1_DATA04 = 56,
75edad3b2aSLinus Walleij 	MX6SX_PAD_LCD1_DATA05 = 57,
76edad3b2aSLinus Walleij 	MX6SX_PAD_LCD1_DATA06 = 58,
77edad3b2aSLinus Walleij 	MX6SX_PAD_LCD1_DATA07 = 59,
78edad3b2aSLinus Walleij 	MX6SX_PAD_LCD1_DATA08 = 60,
79edad3b2aSLinus Walleij 	MX6SX_PAD_LCD1_DATA09 = 61,
80edad3b2aSLinus Walleij 	MX6SX_PAD_LCD1_DATA10 = 62,
81edad3b2aSLinus Walleij 	MX6SX_PAD_LCD1_DATA11 = 63,
82edad3b2aSLinus Walleij 	MX6SX_PAD_LCD1_DATA12 = 64,
83edad3b2aSLinus Walleij 	MX6SX_PAD_LCD1_DATA13 = 65,
84edad3b2aSLinus Walleij 	MX6SX_PAD_LCD1_DATA14 = 66,
85edad3b2aSLinus Walleij 	MX6SX_PAD_LCD1_DATA15 = 67,
86edad3b2aSLinus Walleij 	MX6SX_PAD_LCD1_DATA16 = 68,
87edad3b2aSLinus Walleij 	MX6SX_PAD_LCD1_DATA17 = 69,
88edad3b2aSLinus Walleij 	MX6SX_PAD_LCD1_DATA18 = 70,
89edad3b2aSLinus Walleij 	MX6SX_PAD_LCD1_DATA19 = 71,
90edad3b2aSLinus Walleij 	MX6SX_PAD_LCD1_DATA20 = 72,
91edad3b2aSLinus Walleij 	MX6SX_PAD_LCD1_DATA21 = 73,
92edad3b2aSLinus Walleij 	MX6SX_PAD_LCD1_DATA22 = 74,
93edad3b2aSLinus Walleij 	MX6SX_PAD_LCD1_DATA23 = 75,
94edad3b2aSLinus Walleij 	MX6SX_PAD_LCD1_ENABLE = 76,
95edad3b2aSLinus Walleij 	MX6SX_PAD_LCD1_HSYNC = 77,
96edad3b2aSLinus Walleij 	MX6SX_PAD_LCD1_RESET = 78,
97edad3b2aSLinus Walleij 	MX6SX_PAD_LCD1_VSYNC = 79,
98edad3b2aSLinus Walleij 	MX6SX_PAD_NAND_ALE = 80,
99edad3b2aSLinus Walleij 	MX6SX_PAD_NAND_CE0_B = 81,
100edad3b2aSLinus Walleij 	MX6SX_PAD_NAND_CE1_B = 82,
101edad3b2aSLinus Walleij 	MX6SX_PAD_NAND_CLE = 83,
102edad3b2aSLinus Walleij 	MX6SX_PAD_NAND_DATA00 = 84 ,
103edad3b2aSLinus Walleij 	MX6SX_PAD_NAND_DATA01 = 85,
104edad3b2aSLinus Walleij 	MX6SX_PAD_NAND_DATA02 = 86,
105edad3b2aSLinus Walleij 	MX6SX_PAD_NAND_DATA03 = 87,
106edad3b2aSLinus Walleij 	MX6SX_PAD_NAND_DATA04 = 88,
107edad3b2aSLinus Walleij 	MX6SX_PAD_NAND_DATA05 = 89,
108edad3b2aSLinus Walleij 	MX6SX_PAD_NAND_DATA06 = 90,
109edad3b2aSLinus Walleij 	MX6SX_PAD_NAND_DATA07 = 91,
110edad3b2aSLinus Walleij 	MX6SX_PAD_NAND_RE_B = 92,
111edad3b2aSLinus Walleij 	MX6SX_PAD_NAND_READY_B = 93,
112edad3b2aSLinus Walleij 	MX6SX_PAD_NAND_WE_B = 94,
113edad3b2aSLinus Walleij 	MX6SX_PAD_NAND_WP_B = 95,
114edad3b2aSLinus Walleij 	MX6SX_PAD_QSPI1A_DATA0 = 96,
115edad3b2aSLinus Walleij 	MX6SX_PAD_QSPI1A_DATA1 = 97,
116edad3b2aSLinus Walleij 	MX6SX_PAD_QSPI1A_DATA2 = 98,
117edad3b2aSLinus Walleij 	MX6SX_PAD_QSPI1A_DATA3 = 99,
118edad3b2aSLinus Walleij 	MX6SX_PAD_QSPI1A_DQS = 100,
119edad3b2aSLinus Walleij 	MX6SX_PAD_QSPI1A_SCLK = 101,
120edad3b2aSLinus Walleij 	MX6SX_PAD_QSPI1A_SS0_B = 102,
121edad3b2aSLinus Walleij 	MX6SX_PAD_QSPI1A_SS1_B = 103,
122edad3b2aSLinus Walleij 	MX6SX_PAD_QSPI1B_DATA0 = 104,
123edad3b2aSLinus Walleij 	MX6SX_PAD_QSPI1B_DATA1 = 105,
124edad3b2aSLinus Walleij 	MX6SX_PAD_QSPI1B_DATA2 = 106,
125edad3b2aSLinus Walleij 	MX6SX_PAD_QSPI1B_DATA3 = 107,
126edad3b2aSLinus Walleij 	MX6SX_PAD_QSPI1B_DQS = 108,
127edad3b2aSLinus Walleij 	MX6SX_PAD_QSPI1B_SCLK = 109,
128edad3b2aSLinus Walleij 	MX6SX_PAD_QSPI1B_SS0_B = 110,
129edad3b2aSLinus Walleij 	MX6SX_PAD_QSPI1B_SS1_B = 111,
130edad3b2aSLinus Walleij 	MX6SX_PAD_RGMII1_RD0 = 112,
131edad3b2aSLinus Walleij 	MX6SX_PAD_RGMII1_RD1 = 113,
132edad3b2aSLinus Walleij 	MX6SX_PAD_RGMII1_RD2 = 114,
133edad3b2aSLinus Walleij 	MX6SX_PAD_RGMII1_RD3 = 115,
134edad3b2aSLinus Walleij 	MX6SX_PAD_RGMII1_RX_CTL = 116,
135edad3b2aSLinus Walleij 	MX6SX_PAD_RGMII1_RXC = 117,
136edad3b2aSLinus Walleij 	MX6SX_PAD_RGMII1_TD0 = 118,
137edad3b2aSLinus Walleij 	MX6SX_PAD_RGMII1_TD1 = 119,
138edad3b2aSLinus Walleij 	MX6SX_PAD_RGMII1_TD2 = 120,
139edad3b2aSLinus Walleij 	MX6SX_PAD_RGMII1_TD3 = 121,
140edad3b2aSLinus Walleij 	MX6SX_PAD_RGMII1_TX_CTL = 122,
141edad3b2aSLinus Walleij 	MX6SX_PAD_RGMII1_TXC = 123,
142edad3b2aSLinus Walleij 	MX6SX_PAD_RGMII2_RD0 = 124,
143edad3b2aSLinus Walleij 	MX6SX_PAD_RGMII2_RD1 = 125,
144edad3b2aSLinus Walleij 	MX6SX_PAD_RGMII2_RD2 = 126,
145edad3b2aSLinus Walleij 	MX6SX_PAD_RGMII2_RD3 = 127,
146edad3b2aSLinus Walleij 	MX6SX_PAD_RGMII2_RX_CTL = 128,
147edad3b2aSLinus Walleij 	MX6SX_PAD_RGMII2_RXC = 129,
148edad3b2aSLinus Walleij 	MX6SX_PAD_RGMII2_TD0 = 130,
149edad3b2aSLinus Walleij 	MX6SX_PAD_RGMII2_TD1 = 131,
150edad3b2aSLinus Walleij 	MX6SX_PAD_RGMII2_TD2 = 132,
151edad3b2aSLinus Walleij 	MX6SX_PAD_RGMII2_TD3 = 133,
152edad3b2aSLinus Walleij 	MX6SX_PAD_RGMII2_TX_CTL = 134,
153edad3b2aSLinus Walleij 	MX6SX_PAD_RGMII2_TXC = 135,
154edad3b2aSLinus Walleij 	MX6SX_PAD_SD1_CLK = 136,
155edad3b2aSLinus Walleij 	MX6SX_PAD_SD1_CMD = 137,
156edad3b2aSLinus Walleij 	MX6SX_PAD_SD1_DATA0 = 138,
157edad3b2aSLinus Walleij 	MX6SX_PAD_SD1_DATA1 = 139,
158edad3b2aSLinus Walleij 	MX6SX_PAD_SD1_DATA2 = 140,
159edad3b2aSLinus Walleij 	MX6SX_PAD_SD1_DATA3 = 141,
160edad3b2aSLinus Walleij 	MX6SX_PAD_SD2_CLK = 142,
161edad3b2aSLinus Walleij 	MX6SX_PAD_SD2_CMD = 143,
162edad3b2aSLinus Walleij 	MX6SX_PAD_SD2_DATA0 = 144,
163edad3b2aSLinus Walleij 	MX6SX_PAD_SD2_DATA1 = 145,
164edad3b2aSLinus Walleij 	MX6SX_PAD_SD2_DATA2 = 146,
165edad3b2aSLinus Walleij 	MX6SX_PAD_SD2_DATA3 = 147,
166edad3b2aSLinus Walleij 	MX6SX_PAD_SD3_CLK = 148,
167edad3b2aSLinus Walleij 	MX6SX_PAD_SD3_CMD = 149,
168edad3b2aSLinus Walleij 	MX6SX_PAD_SD3_DATA0 = 150,
169edad3b2aSLinus Walleij 	MX6SX_PAD_SD3_DATA1 = 151,
170edad3b2aSLinus Walleij 	MX6SX_PAD_SD3_DATA2 = 152,
171edad3b2aSLinus Walleij 	MX6SX_PAD_SD3_DATA3 = 153,
172edad3b2aSLinus Walleij 	MX6SX_PAD_SD3_DATA4 = 154,
173edad3b2aSLinus Walleij 	MX6SX_PAD_SD3_DATA5 = 155,
174edad3b2aSLinus Walleij 	MX6SX_PAD_SD3_DATA6 = 156,
175edad3b2aSLinus Walleij 	MX6SX_PAD_SD3_DATA7 = 157,
176edad3b2aSLinus Walleij 	MX6SX_PAD_SD4_CLK = 158,
177edad3b2aSLinus Walleij 	MX6SX_PAD_SD4_CMD = 159,
178edad3b2aSLinus Walleij 	MX6SX_PAD_SD4_DATA0 = 160,
179edad3b2aSLinus Walleij 	MX6SX_PAD_SD4_DATA1 = 161,
180edad3b2aSLinus Walleij 	MX6SX_PAD_SD4_DATA2 = 162,
181edad3b2aSLinus Walleij 	MX6SX_PAD_SD4_DATA3 = 163,
182edad3b2aSLinus Walleij 	MX6SX_PAD_SD4_DATA4 = 164,
183edad3b2aSLinus Walleij 	MX6SX_PAD_SD4_DATA5 = 165,
184edad3b2aSLinus Walleij 	MX6SX_PAD_SD4_DATA6 = 166,
185edad3b2aSLinus Walleij 	MX6SX_PAD_SD4_DATA7 = 167,
186edad3b2aSLinus Walleij 	MX6SX_PAD_SD4_RESET_B = 168,
187edad3b2aSLinus Walleij 	MX6SX_PAD_USB_H_DATA = 169,
188edad3b2aSLinus Walleij 	MX6SX_PAD_USB_H_STROBE = 170,
189edad3b2aSLinus Walleij };
190edad3b2aSLinus Walleij 
191edad3b2aSLinus Walleij /* Pad names for the pinmux subsystem */
192edad3b2aSLinus Walleij static const struct pinctrl_pin_desc imx6sx_pinctrl_pads[] = {
193edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6Sx_PAD_RESERVE0),
194edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6Sx_PAD_RESERVE1),
195edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6Sx_PAD_RESERVE2),
196edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6Sx_PAD_RESERVE3),
197edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6Sx_PAD_RESERVE4),
198edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO00),
199edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO01),
200edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO02),
201edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO03),
202edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO04),
203edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO05),
204edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO06),
205edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO07),
206edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO08),
207edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO09),
208edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO10),
209edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO11),
210edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO12),
211edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO13),
212edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_CSI_DATA00),
213edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_CSI_DATA01),
214edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_CSI_DATA02),
215edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_CSI_DATA03),
216edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_CSI_DATA04),
217edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_CSI_DATA05),
218edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_CSI_DATA06),
219edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_CSI_DATA07),
220edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_CSI_HSYNC),
221edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_CSI_MCLK),
222edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_CSI_PIXCLK),
223edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_CSI_VSYNC),
224edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_ENET1_COL),
225edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_ENET1_CRS),
226edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_ENET1_MDC),
227edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_ENET1_MDIO),
228edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_ENET1_RX_CLK),
229edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_ENET1_TX_CLK),
230edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_ENET2_COL),
231edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_ENET2_CRS),
232edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_ENET2_RX_CLK),
233edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_ENET2_TX_CLK),
234edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_KEY_COL0),
235edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_KEY_COL1),
236edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_KEY_COL2),
237edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_KEY_COL3),
238edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_KEY_COL4),
239edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_KEY_ROW0),
240edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_KEY_ROW1),
241edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_KEY_ROW2),
242edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_KEY_ROW3),
243edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_KEY_ROW4),
244edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_CLK),
245edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA00),
246edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA01),
247edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA02),
248edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA03),
249edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA04),
250edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA05),
251edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA06),
252edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA07),
253edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA08),
254edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA09),
255edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA10),
256edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA11),
257edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA12),
258edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA13),
259edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA14),
260edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA15),
261edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA16),
262edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA17),
263edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA18),
264edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA19),
265edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA20),
266edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA21),
267edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA22),
268edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA23),
269edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_ENABLE),
270edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_HSYNC),
271edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_RESET),
272edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_VSYNC),
273edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_NAND_ALE),
274edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_NAND_CE0_B),
275edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_NAND_CE1_B),
276edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_NAND_CLE),
277edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_NAND_DATA00),
278edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_NAND_DATA01),
279edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_NAND_DATA02),
280edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_NAND_DATA03),
281edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_NAND_DATA04),
282edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_NAND_DATA05),
283edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_NAND_DATA06),
284edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_NAND_DATA07),
285edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_NAND_RE_B),
286edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_NAND_READY_B),
287edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_NAND_WE_B),
288edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_NAND_WP_B),
289edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1A_DATA0),
290edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1A_DATA1),
291edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1A_DATA2),
292edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1A_DATA3),
293edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1A_DQS),
294edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1A_SCLK),
295edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1A_SS0_B),
296edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1A_SS1_B),
297edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1B_DATA0),
298edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1B_DATA1),
299edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1B_DATA2),
300edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1B_DATA3),
301edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1B_DQS),
302edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1B_SCLK),
303edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1B_SS0_B),
304edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1B_SS1_B),
305edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_RD0),
306edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_RD1),
307edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_RD2),
308edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_RD3),
309edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_RX_CTL),
310edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_RXC),
311edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_TD0),
312edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_TD1),
313edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_TD2),
314edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_TD3),
315edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_TX_CTL),
316edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_TXC),
317edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_RD0),
318edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_RD1),
319edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_RD2),
320edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_RD3),
321edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_RX_CTL),
322edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_RXC),
323edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_TD0),
324edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_TD1),
325edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_TD2),
326edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_TD3),
327edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_TX_CTL),
328edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_TXC),
329edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_SD1_CLK),
330edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_SD1_CMD),
331edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_SD1_DATA0),
332edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_SD1_DATA1),
333edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_SD1_DATA2),
334edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_SD1_DATA3),
335edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_SD2_CLK),
336edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_SD2_CMD),
337edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_SD2_DATA0),
338edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_SD2_DATA1),
339edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_SD2_DATA2),
340edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_SD2_DATA3),
341edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_SD3_CLK),
342edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_SD3_CMD),
343edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_SD3_DATA0),
344edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_SD3_DATA1),
345edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_SD3_DATA2),
346edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_SD3_DATA3),
347edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_SD3_DATA4),
348edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_SD3_DATA5),
349edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_SD3_DATA6),
350edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_SD3_DATA7),
351edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_SD4_CLK),
352edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_SD4_CMD),
353edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_SD4_DATA0),
354edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_SD4_DATA1),
355edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_SD4_DATA2),
356edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_SD4_DATA3),
357edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_SD4_DATA4),
358edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_SD4_DATA5),
359edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_SD4_DATA6),
360edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_SD4_DATA7),
361edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_SD4_RESET_B),
362edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_USB_H_DATA),
363edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX6SX_PAD_USB_H_STROBE),
364edad3b2aSLinus Walleij };
365edad3b2aSLinus Walleij 
3667c017687SStefan Agner static const struct imx_pinctrl_soc_info imx6sx_pinctrl_info = {
367edad3b2aSLinus Walleij 	.pins = imx6sx_pinctrl_pads,
368edad3b2aSLinus Walleij 	.npins = ARRAY_SIZE(imx6sx_pinctrl_pads),
3698626ada8SPhilipp Zabel 	.gpr_compatible = "fsl,imx6sx-iomuxc-gpr",
370edad3b2aSLinus Walleij };
371edad3b2aSLinus Walleij 
372edad3b2aSLinus Walleij static const struct of_device_id imx6sx_pinctrl_of_match[] = {
373edad3b2aSLinus Walleij 	{ .compatible = "fsl,imx6sx-iomuxc", },
374edad3b2aSLinus Walleij 	{ /* sentinel */ }
375edad3b2aSLinus Walleij };
376edad3b2aSLinus Walleij 
377edad3b2aSLinus Walleij static int imx6sx_pinctrl_probe(struct platform_device *pdev)
378edad3b2aSLinus Walleij {
379edad3b2aSLinus Walleij 	return imx_pinctrl_probe(pdev, &imx6sx_pinctrl_info);
380edad3b2aSLinus Walleij }
381edad3b2aSLinus Walleij 
382edad3b2aSLinus Walleij static struct platform_driver imx6sx_pinctrl_driver = {
383edad3b2aSLinus Walleij 	.driver = {
384edad3b2aSLinus Walleij 		.name = "imx6sx-pinctrl",
385f6b6db2dSFabio Estevam 		.of_match_table = imx6sx_pinctrl_of_match,
3868a83ecd8SFabio Estevam 		.suppress_bind_attrs = true,
387edad3b2aSLinus Walleij 	},
388edad3b2aSLinus Walleij 	.probe = imx6sx_pinctrl_probe,
389edad3b2aSLinus Walleij };
390edad3b2aSLinus Walleij 
391edad3b2aSLinus Walleij static int __init imx6sx_pinctrl_init(void)
392edad3b2aSLinus Walleij {
393edad3b2aSLinus Walleij 	return platform_driver_register(&imx6sx_pinctrl_driver);
394edad3b2aSLinus Walleij }
395edad3b2aSLinus Walleij arch_initcall(imx6sx_pinctrl_init);
396