1*edad3b2aSLinus Walleij /* 2*edad3b2aSLinus Walleij * imx25 pinctrl driver. 3*edad3b2aSLinus Walleij * 4*edad3b2aSLinus Walleij * Copyright 2013 Eukréa Electromatique <denis@eukrea.com> 5*edad3b2aSLinus Walleij * 6*edad3b2aSLinus Walleij * This driver was mostly copied from the imx51 pinctrl driver which has: 7*edad3b2aSLinus Walleij * 8*edad3b2aSLinus Walleij * Copyright (C) 2012 Freescale Semiconductor, Inc. 9*edad3b2aSLinus Walleij * Copyright (C) 2012 Linaro, Inc. 10*edad3b2aSLinus Walleij * 11*edad3b2aSLinus Walleij * Author: Denis Carikli <denis@eukrea.com> 12*edad3b2aSLinus Walleij * 13*edad3b2aSLinus Walleij * This program is free software; you can redistribute it and/or modify 14*edad3b2aSLinus Walleij * it under the terms of the GNU General Public License version 2 as published 15*edad3b2aSLinus Walleij * by the Free Software Foundation. 16*edad3b2aSLinus Walleij */ 17*edad3b2aSLinus Walleij 18*edad3b2aSLinus Walleij #include <linux/err.h> 19*edad3b2aSLinus Walleij #include <linux/init.h> 20*edad3b2aSLinus Walleij #include <linux/io.h> 21*edad3b2aSLinus Walleij #include <linux/module.h> 22*edad3b2aSLinus Walleij #include <linux/of.h> 23*edad3b2aSLinus Walleij #include <linux/of_device.h> 24*edad3b2aSLinus Walleij #include <linux/pinctrl/pinctrl.h> 25*edad3b2aSLinus Walleij 26*edad3b2aSLinus Walleij #include "pinctrl-imx.h" 27*edad3b2aSLinus Walleij 28*edad3b2aSLinus Walleij enum imx25_pads { 29*edad3b2aSLinus Walleij MX25_PAD_RESERVE0 = 1, 30*edad3b2aSLinus Walleij MX25_PAD_RESERVE1 = 2, 31*edad3b2aSLinus Walleij MX25_PAD_A10 = 3, 32*edad3b2aSLinus Walleij MX25_PAD_A13 = 4, 33*edad3b2aSLinus Walleij MX25_PAD_A14 = 5, 34*edad3b2aSLinus Walleij MX25_PAD_A15 = 6, 35*edad3b2aSLinus Walleij MX25_PAD_A16 = 7, 36*edad3b2aSLinus Walleij MX25_PAD_A17 = 8, 37*edad3b2aSLinus Walleij MX25_PAD_A18 = 9, 38*edad3b2aSLinus Walleij MX25_PAD_A19 = 10, 39*edad3b2aSLinus Walleij MX25_PAD_A20 = 11, 40*edad3b2aSLinus Walleij MX25_PAD_A21 = 12, 41*edad3b2aSLinus Walleij MX25_PAD_A22 = 13, 42*edad3b2aSLinus Walleij MX25_PAD_A23 = 14, 43*edad3b2aSLinus Walleij MX25_PAD_A24 = 15, 44*edad3b2aSLinus Walleij MX25_PAD_A25 = 16, 45*edad3b2aSLinus Walleij MX25_PAD_EB0 = 17, 46*edad3b2aSLinus Walleij MX25_PAD_EB1 = 18, 47*edad3b2aSLinus Walleij MX25_PAD_OE = 19, 48*edad3b2aSLinus Walleij MX25_PAD_CS0 = 20, 49*edad3b2aSLinus Walleij MX25_PAD_CS1 = 21, 50*edad3b2aSLinus Walleij MX25_PAD_CS4 = 22, 51*edad3b2aSLinus Walleij MX25_PAD_CS5 = 23, 52*edad3b2aSLinus Walleij MX25_PAD_NF_CE0 = 24, 53*edad3b2aSLinus Walleij MX25_PAD_ECB = 25, 54*edad3b2aSLinus Walleij MX25_PAD_LBA = 26, 55*edad3b2aSLinus Walleij MX25_PAD_BCLK = 27, 56*edad3b2aSLinus Walleij MX25_PAD_RW = 28, 57*edad3b2aSLinus Walleij MX25_PAD_NFWE_B = 29, 58*edad3b2aSLinus Walleij MX25_PAD_NFRE_B = 30, 59*edad3b2aSLinus Walleij MX25_PAD_NFALE = 31, 60*edad3b2aSLinus Walleij MX25_PAD_NFCLE = 32, 61*edad3b2aSLinus Walleij MX25_PAD_NFWP_B = 33, 62*edad3b2aSLinus Walleij MX25_PAD_NFRB = 34, 63*edad3b2aSLinus Walleij MX25_PAD_D15 = 35, 64*edad3b2aSLinus Walleij MX25_PAD_D14 = 36, 65*edad3b2aSLinus Walleij MX25_PAD_D13 = 37, 66*edad3b2aSLinus Walleij MX25_PAD_D12 = 38, 67*edad3b2aSLinus Walleij MX25_PAD_D11 = 39, 68*edad3b2aSLinus Walleij MX25_PAD_D10 = 40, 69*edad3b2aSLinus Walleij MX25_PAD_D9 = 41, 70*edad3b2aSLinus Walleij MX25_PAD_D8 = 42, 71*edad3b2aSLinus Walleij MX25_PAD_D7 = 43, 72*edad3b2aSLinus Walleij MX25_PAD_D6 = 44, 73*edad3b2aSLinus Walleij MX25_PAD_D5 = 45, 74*edad3b2aSLinus Walleij MX25_PAD_D4 = 46, 75*edad3b2aSLinus Walleij MX25_PAD_D3 = 47, 76*edad3b2aSLinus Walleij MX25_PAD_D2 = 48, 77*edad3b2aSLinus Walleij MX25_PAD_D1 = 49, 78*edad3b2aSLinus Walleij MX25_PAD_D0 = 50, 79*edad3b2aSLinus Walleij MX25_PAD_LD0 = 51, 80*edad3b2aSLinus Walleij MX25_PAD_LD1 = 52, 81*edad3b2aSLinus Walleij MX25_PAD_LD2 = 53, 82*edad3b2aSLinus Walleij MX25_PAD_LD3 = 54, 83*edad3b2aSLinus Walleij MX25_PAD_LD4 = 55, 84*edad3b2aSLinus Walleij MX25_PAD_LD5 = 56, 85*edad3b2aSLinus Walleij MX25_PAD_LD6 = 57, 86*edad3b2aSLinus Walleij MX25_PAD_LD7 = 58, 87*edad3b2aSLinus Walleij MX25_PAD_LD8 = 59, 88*edad3b2aSLinus Walleij MX25_PAD_LD9 = 60, 89*edad3b2aSLinus Walleij MX25_PAD_LD10 = 61, 90*edad3b2aSLinus Walleij MX25_PAD_LD11 = 62, 91*edad3b2aSLinus Walleij MX25_PAD_LD12 = 63, 92*edad3b2aSLinus Walleij MX25_PAD_LD13 = 64, 93*edad3b2aSLinus Walleij MX25_PAD_LD14 = 65, 94*edad3b2aSLinus Walleij MX25_PAD_LD15 = 66, 95*edad3b2aSLinus Walleij MX25_PAD_HSYNC = 67, 96*edad3b2aSLinus Walleij MX25_PAD_VSYNC = 68, 97*edad3b2aSLinus Walleij MX25_PAD_LSCLK = 69, 98*edad3b2aSLinus Walleij MX25_PAD_OE_ACD = 70, 99*edad3b2aSLinus Walleij MX25_PAD_CONTRAST = 71, 100*edad3b2aSLinus Walleij MX25_PAD_PWM = 72, 101*edad3b2aSLinus Walleij MX25_PAD_CSI_D2 = 73, 102*edad3b2aSLinus Walleij MX25_PAD_CSI_D3 = 74, 103*edad3b2aSLinus Walleij MX25_PAD_CSI_D4 = 75, 104*edad3b2aSLinus Walleij MX25_PAD_CSI_D5 = 76, 105*edad3b2aSLinus Walleij MX25_PAD_CSI_D6 = 77, 106*edad3b2aSLinus Walleij MX25_PAD_CSI_D7 = 78, 107*edad3b2aSLinus Walleij MX25_PAD_CSI_D8 = 79, 108*edad3b2aSLinus Walleij MX25_PAD_CSI_D9 = 80, 109*edad3b2aSLinus Walleij MX25_PAD_CSI_MCLK = 81, 110*edad3b2aSLinus Walleij MX25_PAD_CSI_VSYNC = 82, 111*edad3b2aSLinus Walleij MX25_PAD_CSI_HSYNC = 83, 112*edad3b2aSLinus Walleij MX25_PAD_CSI_PIXCLK = 84, 113*edad3b2aSLinus Walleij MX25_PAD_I2C1_CLK = 85, 114*edad3b2aSLinus Walleij MX25_PAD_I2C1_DAT = 86, 115*edad3b2aSLinus Walleij MX25_PAD_CSPI1_MOSI = 87, 116*edad3b2aSLinus Walleij MX25_PAD_CSPI1_MISO = 88, 117*edad3b2aSLinus Walleij MX25_PAD_CSPI1_SS0 = 89, 118*edad3b2aSLinus Walleij MX25_PAD_CSPI1_SS1 = 90, 119*edad3b2aSLinus Walleij MX25_PAD_CSPI1_SCLK = 91, 120*edad3b2aSLinus Walleij MX25_PAD_CSPI1_RDY = 92, 121*edad3b2aSLinus Walleij MX25_PAD_UART1_RXD = 93, 122*edad3b2aSLinus Walleij MX25_PAD_UART1_TXD = 94, 123*edad3b2aSLinus Walleij MX25_PAD_UART1_RTS = 95, 124*edad3b2aSLinus Walleij MX25_PAD_UART1_CTS = 96, 125*edad3b2aSLinus Walleij MX25_PAD_UART2_RXD = 97, 126*edad3b2aSLinus Walleij MX25_PAD_UART2_TXD = 98, 127*edad3b2aSLinus Walleij MX25_PAD_UART2_RTS = 99, 128*edad3b2aSLinus Walleij MX25_PAD_UART2_CTS = 100, 129*edad3b2aSLinus Walleij MX25_PAD_SD1_CMD = 101, 130*edad3b2aSLinus Walleij MX25_PAD_SD1_CLK = 102, 131*edad3b2aSLinus Walleij MX25_PAD_SD1_DATA0 = 103, 132*edad3b2aSLinus Walleij MX25_PAD_SD1_DATA1 = 104, 133*edad3b2aSLinus Walleij MX25_PAD_SD1_DATA2 = 105, 134*edad3b2aSLinus Walleij MX25_PAD_SD1_DATA3 = 106, 135*edad3b2aSLinus Walleij MX25_PAD_KPP_ROW0 = 107, 136*edad3b2aSLinus Walleij MX25_PAD_KPP_ROW1 = 108, 137*edad3b2aSLinus Walleij MX25_PAD_KPP_ROW2 = 109, 138*edad3b2aSLinus Walleij MX25_PAD_KPP_ROW3 = 110, 139*edad3b2aSLinus Walleij MX25_PAD_KPP_COL0 = 111, 140*edad3b2aSLinus Walleij MX25_PAD_KPP_COL1 = 112, 141*edad3b2aSLinus Walleij MX25_PAD_KPP_COL2 = 113, 142*edad3b2aSLinus Walleij MX25_PAD_KPP_COL3 = 114, 143*edad3b2aSLinus Walleij MX25_PAD_FEC_MDC = 115, 144*edad3b2aSLinus Walleij MX25_PAD_FEC_MDIO = 116, 145*edad3b2aSLinus Walleij MX25_PAD_FEC_TDATA0 = 117, 146*edad3b2aSLinus Walleij MX25_PAD_FEC_TDATA1 = 118, 147*edad3b2aSLinus Walleij MX25_PAD_FEC_TX_EN = 119, 148*edad3b2aSLinus Walleij MX25_PAD_FEC_RDATA0 = 120, 149*edad3b2aSLinus Walleij MX25_PAD_FEC_RDATA1 = 121, 150*edad3b2aSLinus Walleij MX25_PAD_FEC_RX_DV = 122, 151*edad3b2aSLinus Walleij MX25_PAD_FEC_TX_CLK = 123, 152*edad3b2aSLinus Walleij MX25_PAD_RTCK = 124, 153*edad3b2aSLinus Walleij MX25_PAD_DE_B = 125, 154*edad3b2aSLinus Walleij MX25_PAD_GPIO_A = 126, 155*edad3b2aSLinus Walleij MX25_PAD_GPIO_B = 127, 156*edad3b2aSLinus Walleij MX25_PAD_GPIO_C = 128, 157*edad3b2aSLinus Walleij MX25_PAD_GPIO_D = 129, 158*edad3b2aSLinus Walleij MX25_PAD_GPIO_E = 130, 159*edad3b2aSLinus Walleij MX25_PAD_GPIO_F = 131, 160*edad3b2aSLinus Walleij MX25_PAD_EXT_ARMCLK = 132, 161*edad3b2aSLinus Walleij MX25_PAD_UPLL_BYPCLK = 133, 162*edad3b2aSLinus Walleij MX25_PAD_VSTBY_REQ = 134, 163*edad3b2aSLinus Walleij MX25_PAD_VSTBY_ACK = 135, 164*edad3b2aSLinus Walleij MX25_PAD_POWER_FAIL = 136, 165*edad3b2aSLinus Walleij MX25_PAD_CLKO = 137, 166*edad3b2aSLinus Walleij MX25_PAD_BOOT_MODE0 = 138, 167*edad3b2aSLinus Walleij MX25_PAD_BOOT_MODE1 = 139, 168*edad3b2aSLinus Walleij }; 169*edad3b2aSLinus Walleij 170*edad3b2aSLinus Walleij /* Pad names for the pinmux subsystem */ 171*edad3b2aSLinus Walleij static const struct pinctrl_pin_desc imx25_pinctrl_pads[] = { 172*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_RESERVE0), 173*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_RESERVE1), 174*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_A10), 175*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_A13), 176*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_A14), 177*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_A15), 178*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_A16), 179*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_A17), 180*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_A18), 181*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_A19), 182*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_A20), 183*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_A21), 184*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_A22), 185*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_A23), 186*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_A24), 187*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_A25), 188*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_EB0), 189*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_EB1), 190*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_OE), 191*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_CS0), 192*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_CS1), 193*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_CS4), 194*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_CS5), 195*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_NF_CE0), 196*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_ECB), 197*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_LBA), 198*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_BCLK), 199*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_RW), 200*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_NFWE_B), 201*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_NFRE_B), 202*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_NFALE), 203*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_NFCLE), 204*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_NFWP_B), 205*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_NFRB), 206*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_D15), 207*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_D14), 208*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_D13), 209*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_D12), 210*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_D11), 211*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_D10), 212*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_D9), 213*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_D8), 214*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_D7), 215*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_D6), 216*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_D5), 217*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_D4), 218*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_D3), 219*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_D2), 220*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_D1), 221*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_D0), 222*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_LD0), 223*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_LD1), 224*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_LD2), 225*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_LD3), 226*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_LD4), 227*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_LD5), 228*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_LD6), 229*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_LD7), 230*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_LD8), 231*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_LD9), 232*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_LD10), 233*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_LD11), 234*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_LD12), 235*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_LD13), 236*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_LD14), 237*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_LD15), 238*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_HSYNC), 239*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_VSYNC), 240*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_LSCLK), 241*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_OE_ACD), 242*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_CONTRAST), 243*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_PWM), 244*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_CSI_D2), 245*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_CSI_D3), 246*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_CSI_D4), 247*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_CSI_D5), 248*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_CSI_D6), 249*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_CSI_D7), 250*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_CSI_D8), 251*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_CSI_D9), 252*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_CSI_MCLK), 253*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_CSI_VSYNC), 254*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_CSI_HSYNC), 255*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_CSI_PIXCLK), 256*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_I2C1_CLK), 257*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_I2C1_DAT), 258*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_CSPI1_MOSI), 259*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_CSPI1_MISO), 260*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_CSPI1_SS0), 261*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_CSPI1_SS1), 262*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_CSPI1_SCLK), 263*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_CSPI1_RDY), 264*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_UART1_RXD), 265*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_UART1_TXD), 266*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_UART1_RTS), 267*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_UART1_CTS), 268*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_UART2_RXD), 269*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_UART2_TXD), 270*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_UART2_RTS), 271*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_UART2_CTS), 272*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_SD1_CMD), 273*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_SD1_CLK), 274*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_SD1_DATA0), 275*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_SD1_DATA1), 276*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_SD1_DATA2), 277*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_SD1_DATA3), 278*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_KPP_ROW0), 279*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_KPP_ROW1), 280*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_KPP_ROW2), 281*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_KPP_ROW3), 282*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_KPP_COL0), 283*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_KPP_COL1), 284*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_KPP_COL2), 285*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_KPP_COL3), 286*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_FEC_MDC), 287*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_FEC_MDIO), 288*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_FEC_TDATA0), 289*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_FEC_TDATA1), 290*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_FEC_TX_EN), 291*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_FEC_RDATA0), 292*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_FEC_RDATA1), 293*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_FEC_RX_DV), 294*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_FEC_TX_CLK), 295*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_RTCK), 296*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_DE_B), 297*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_GPIO_A), 298*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_GPIO_B), 299*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_GPIO_C), 300*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_GPIO_D), 301*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_GPIO_E), 302*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_GPIO_F), 303*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_EXT_ARMCLK), 304*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_UPLL_BYPCLK), 305*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_VSTBY_REQ), 306*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_VSTBY_ACK), 307*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_POWER_FAIL), 308*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_CLKO), 309*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_BOOT_MODE0), 310*edad3b2aSLinus Walleij IMX_PINCTRL_PIN(MX25_PAD_BOOT_MODE1), 311*edad3b2aSLinus Walleij }; 312*edad3b2aSLinus Walleij 313*edad3b2aSLinus Walleij static struct imx_pinctrl_soc_info imx25_pinctrl_info = { 314*edad3b2aSLinus Walleij .pins = imx25_pinctrl_pads, 315*edad3b2aSLinus Walleij .npins = ARRAY_SIZE(imx25_pinctrl_pads), 316*edad3b2aSLinus Walleij }; 317*edad3b2aSLinus Walleij 318*edad3b2aSLinus Walleij static const struct of_device_id imx25_pinctrl_of_match[] = { 319*edad3b2aSLinus Walleij { .compatible = "fsl,imx25-iomuxc", }, 320*edad3b2aSLinus Walleij { /* sentinel */ } 321*edad3b2aSLinus Walleij }; 322*edad3b2aSLinus Walleij 323*edad3b2aSLinus Walleij static int imx25_pinctrl_probe(struct platform_device *pdev) 324*edad3b2aSLinus Walleij { 325*edad3b2aSLinus Walleij return imx_pinctrl_probe(pdev, &imx25_pinctrl_info); 326*edad3b2aSLinus Walleij } 327*edad3b2aSLinus Walleij 328*edad3b2aSLinus Walleij static struct platform_driver imx25_pinctrl_driver = { 329*edad3b2aSLinus Walleij .driver = { 330*edad3b2aSLinus Walleij .name = "imx25-pinctrl", 331*edad3b2aSLinus Walleij .owner = THIS_MODULE, 332*edad3b2aSLinus Walleij .of_match_table = of_match_ptr(imx25_pinctrl_of_match), 333*edad3b2aSLinus Walleij }, 334*edad3b2aSLinus Walleij .probe = imx25_pinctrl_probe, 335*edad3b2aSLinus Walleij .remove = imx_pinctrl_remove, 336*edad3b2aSLinus Walleij }; 337*edad3b2aSLinus Walleij 338*edad3b2aSLinus Walleij static int __init imx25_pinctrl_init(void) 339*edad3b2aSLinus Walleij { 340*edad3b2aSLinus Walleij return platform_driver_register(&imx25_pinctrl_driver); 341*edad3b2aSLinus Walleij } 342*edad3b2aSLinus Walleij arch_initcall(imx25_pinctrl_init); 343*edad3b2aSLinus Walleij 344*edad3b2aSLinus Walleij static void __exit imx25_pinctrl_exit(void) 345*edad3b2aSLinus Walleij { 346*edad3b2aSLinus Walleij platform_driver_unregister(&imx25_pinctrl_driver); 347*edad3b2aSLinus Walleij } 348*edad3b2aSLinus Walleij module_exit(imx25_pinctrl_exit); 349*edad3b2aSLinus Walleij MODULE_AUTHOR("Denis Carikli <denis@eukrea.com>"); 350*edad3b2aSLinus Walleij MODULE_DESCRIPTION("Freescale IMX25 pinctrl driver"); 351*edad3b2aSLinus Walleij MODULE_LICENSE("GPL v2"); 352