xref: /linux/drivers/pinctrl/freescale/pinctrl-imx25.c (revision c2b39deced784380e81f0e12c5ca7a6543cd8542)
1*c2b39decSFabio Estevam // SPDX-License-Identifier: GPL-2.0
2*c2b39decSFabio Estevam //
3*c2b39decSFabio Estevam // imx25 pinctrl driver.
4*c2b39decSFabio Estevam //
5*c2b39decSFabio Estevam // Copyright 2013 Eukréa Electromatique <denis@eukrea.com>
6*c2b39decSFabio Estevam //
7*c2b39decSFabio Estevam // This driver was mostly copied from the imx51 pinctrl driver which has:
8*c2b39decSFabio Estevam //
9*c2b39decSFabio Estevam // Copyright (C) 2012 Freescale Semiconductor, Inc.
10*c2b39decSFabio Estevam // Copyright (C) 2012 Linaro, Inc.
11*c2b39decSFabio Estevam //
12*c2b39decSFabio Estevam // Author: Denis Carikli <denis@eukrea.com>
13edad3b2aSLinus Walleij 
14edad3b2aSLinus Walleij #include <linux/err.h>
15edad3b2aSLinus Walleij #include <linux/init.h>
16edad3b2aSLinus Walleij #include <linux/io.h>
17edad3b2aSLinus Walleij #include <linux/of.h>
18edad3b2aSLinus Walleij #include <linux/of_device.h>
19edad3b2aSLinus Walleij #include <linux/pinctrl/pinctrl.h>
20edad3b2aSLinus Walleij 
21edad3b2aSLinus Walleij #include "pinctrl-imx.h"
22edad3b2aSLinus Walleij 
23edad3b2aSLinus Walleij enum imx25_pads {
249911a2d5SUwe Kleine-König 	MX25_PAD_RESERVE0 = 0,
259911a2d5SUwe Kleine-König 	MX25_PAD_RESERVE1 = 1,
2634027ca2SUwe Kleine-König 	MX25_PAD_A10 = 2,
2734027ca2SUwe Kleine-König 	MX25_PAD_A13 = 3,
2834027ca2SUwe Kleine-König 	MX25_PAD_A14 = 4,
2934027ca2SUwe Kleine-König 	MX25_PAD_A15 = 5,
3034027ca2SUwe Kleine-König 	MX25_PAD_A16 = 6,
3134027ca2SUwe Kleine-König 	MX25_PAD_A17 = 7,
3234027ca2SUwe Kleine-König 	MX25_PAD_A18 = 8,
3334027ca2SUwe Kleine-König 	MX25_PAD_A19 = 9,
3434027ca2SUwe Kleine-König 	MX25_PAD_A20 = 10,
3534027ca2SUwe Kleine-König 	MX25_PAD_A21 = 11,
3634027ca2SUwe Kleine-König 	MX25_PAD_A22 = 12,
3734027ca2SUwe Kleine-König 	MX25_PAD_A23 = 13,
3834027ca2SUwe Kleine-König 	MX25_PAD_A24 = 14,
3934027ca2SUwe Kleine-König 	MX25_PAD_A25 = 15,
4034027ca2SUwe Kleine-König 	MX25_PAD_EB0 = 16,
4134027ca2SUwe Kleine-König 	MX25_PAD_EB1 = 17,
4234027ca2SUwe Kleine-König 	MX25_PAD_OE = 18,
4334027ca2SUwe Kleine-König 	MX25_PAD_CS0 = 19,
4434027ca2SUwe Kleine-König 	MX25_PAD_CS1 = 20,
4534027ca2SUwe Kleine-König 	MX25_PAD_CS4 = 21,
4634027ca2SUwe Kleine-König 	MX25_PAD_CS5 = 22,
4734027ca2SUwe Kleine-König 	MX25_PAD_NF_CE0 = 23,
4834027ca2SUwe Kleine-König 	MX25_PAD_ECB = 24,
4934027ca2SUwe Kleine-König 	MX25_PAD_LBA = 25,
5034027ca2SUwe Kleine-König 	MX25_PAD_BCLK = 26,
5134027ca2SUwe Kleine-König 	MX25_PAD_RW = 27,
5234027ca2SUwe Kleine-König 	MX25_PAD_NFWE_B = 28,
5334027ca2SUwe Kleine-König 	MX25_PAD_NFRE_B = 29,
5434027ca2SUwe Kleine-König 	MX25_PAD_NFALE = 30,
5534027ca2SUwe Kleine-König 	MX25_PAD_NFCLE = 31,
5634027ca2SUwe Kleine-König 	MX25_PAD_NFWP_B = 32,
5734027ca2SUwe Kleine-König 	MX25_PAD_NFRB = 33,
5834027ca2SUwe Kleine-König 	MX25_PAD_D15 = 34,
5934027ca2SUwe Kleine-König 	MX25_PAD_D14 = 35,
6034027ca2SUwe Kleine-König 	MX25_PAD_D13 = 36,
6134027ca2SUwe Kleine-König 	MX25_PAD_D12 = 37,
6234027ca2SUwe Kleine-König 	MX25_PAD_D11 = 38,
6334027ca2SUwe Kleine-König 	MX25_PAD_D10 = 39,
6434027ca2SUwe Kleine-König 	MX25_PAD_D9 = 40,
6534027ca2SUwe Kleine-König 	MX25_PAD_D8 = 41,
6634027ca2SUwe Kleine-König 	MX25_PAD_D7 = 42,
6734027ca2SUwe Kleine-König 	MX25_PAD_D6 = 43,
6834027ca2SUwe Kleine-König 	MX25_PAD_D5 = 44,
6934027ca2SUwe Kleine-König 	MX25_PAD_D4 = 45,
7034027ca2SUwe Kleine-König 	MX25_PAD_D3 = 46,
7134027ca2SUwe Kleine-König 	MX25_PAD_D2 = 47,
7234027ca2SUwe Kleine-König 	MX25_PAD_D1 = 48,
7334027ca2SUwe Kleine-König 	MX25_PAD_D0 = 49,
7434027ca2SUwe Kleine-König 	MX25_PAD_LD0 = 50,
7534027ca2SUwe Kleine-König 	MX25_PAD_LD1 = 51,
7634027ca2SUwe Kleine-König 	MX25_PAD_LD2 = 52,
7734027ca2SUwe Kleine-König 	MX25_PAD_LD3 = 53,
7834027ca2SUwe Kleine-König 	MX25_PAD_LD4 = 54,
7934027ca2SUwe Kleine-König 	MX25_PAD_LD5 = 55,
8034027ca2SUwe Kleine-König 	MX25_PAD_LD6 = 56,
8134027ca2SUwe Kleine-König 	MX25_PAD_LD7 = 57,
8234027ca2SUwe Kleine-König 	MX25_PAD_LD8 = 58,
8334027ca2SUwe Kleine-König 	MX25_PAD_LD9 = 59,
8434027ca2SUwe Kleine-König 	MX25_PAD_LD10 = 60,
8534027ca2SUwe Kleine-König 	MX25_PAD_LD11 = 61,
8634027ca2SUwe Kleine-König 	MX25_PAD_LD12 = 62,
8734027ca2SUwe Kleine-König 	MX25_PAD_LD13 = 63,
8834027ca2SUwe Kleine-König 	MX25_PAD_LD14 = 64,
8934027ca2SUwe Kleine-König 	MX25_PAD_LD15 = 65,
9034027ca2SUwe Kleine-König 	MX25_PAD_HSYNC = 66,
9134027ca2SUwe Kleine-König 	MX25_PAD_VSYNC = 67,
9234027ca2SUwe Kleine-König 	MX25_PAD_LSCLK = 68,
9334027ca2SUwe Kleine-König 	MX25_PAD_OE_ACD = 69,
9434027ca2SUwe Kleine-König 	MX25_PAD_CONTRAST = 70,
9534027ca2SUwe Kleine-König 	MX25_PAD_PWM = 71,
9634027ca2SUwe Kleine-König 	MX25_PAD_CSI_D2 = 72,
9734027ca2SUwe Kleine-König 	MX25_PAD_CSI_D3 = 73,
9834027ca2SUwe Kleine-König 	MX25_PAD_CSI_D4 = 74,
9934027ca2SUwe Kleine-König 	MX25_PAD_CSI_D5 = 75,
10034027ca2SUwe Kleine-König 	MX25_PAD_CSI_D6 = 76,
10134027ca2SUwe Kleine-König 	MX25_PAD_CSI_D7 = 77,
10234027ca2SUwe Kleine-König 	MX25_PAD_CSI_D8 = 78,
10334027ca2SUwe Kleine-König 	MX25_PAD_CSI_D9 = 79,
10434027ca2SUwe Kleine-König 	MX25_PAD_CSI_MCLK = 80,
10534027ca2SUwe Kleine-König 	MX25_PAD_CSI_VSYNC = 81,
10634027ca2SUwe Kleine-König 	MX25_PAD_CSI_HSYNC = 82,
10734027ca2SUwe Kleine-König 	MX25_PAD_CSI_PIXCLK = 83,
10834027ca2SUwe Kleine-König 	MX25_PAD_I2C1_CLK = 84,
10934027ca2SUwe Kleine-König 	MX25_PAD_I2C1_DAT = 85,
11034027ca2SUwe Kleine-König 	MX25_PAD_CSPI1_MOSI = 86,
11134027ca2SUwe Kleine-König 	MX25_PAD_CSPI1_MISO = 87,
11234027ca2SUwe Kleine-König 	MX25_PAD_CSPI1_SS0 = 88,
11334027ca2SUwe Kleine-König 	MX25_PAD_CSPI1_SS1 = 89,
11434027ca2SUwe Kleine-König 	MX25_PAD_CSPI1_SCLK = 90,
11534027ca2SUwe Kleine-König 	MX25_PAD_CSPI1_RDY = 91,
11634027ca2SUwe Kleine-König 	MX25_PAD_UART1_RXD = 92,
11734027ca2SUwe Kleine-König 	MX25_PAD_UART1_TXD = 93,
11834027ca2SUwe Kleine-König 	MX25_PAD_UART1_RTS = 94,
11934027ca2SUwe Kleine-König 	MX25_PAD_UART1_CTS = 95,
12034027ca2SUwe Kleine-König 	MX25_PAD_UART2_RXD = 96,
12134027ca2SUwe Kleine-König 	MX25_PAD_UART2_TXD = 97,
12234027ca2SUwe Kleine-König 	MX25_PAD_UART2_RTS = 98,
12334027ca2SUwe Kleine-König 	MX25_PAD_UART2_CTS = 99,
12434027ca2SUwe Kleine-König 	MX25_PAD_SD1_CMD = 100,
12534027ca2SUwe Kleine-König 	MX25_PAD_SD1_CLK = 101,
12634027ca2SUwe Kleine-König 	MX25_PAD_SD1_DATA0 = 102,
12734027ca2SUwe Kleine-König 	MX25_PAD_SD1_DATA1 = 103,
12834027ca2SUwe Kleine-König 	MX25_PAD_SD1_DATA2 = 104,
12934027ca2SUwe Kleine-König 	MX25_PAD_SD1_DATA3 = 105,
13034027ca2SUwe Kleine-König 	MX25_PAD_KPP_ROW0 = 106,
13134027ca2SUwe Kleine-König 	MX25_PAD_KPP_ROW1 = 107,
13234027ca2SUwe Kleine-König 	MX25_PAD_KPP_ROW2 = 108,
13334027ca2SUwe Kleine-König 	MX25_PAD_KPP_ROW3 = 109,
13434027ca2SUwe Kleine-König 	MX25_PAD_KPP_COL0 = 110,
13534027ca2SUwe Kleine-König 	MX25_PAD_KPP_COL1 = 111,
13634027ca2SUwe Kleine-König 	MX25_PAD_KPP_COL2 = 112,
13734027ca2SUwe Kleine-König 	MX25_PAD_KPP_COL3 = 113,
13834027ca2SUwe Kleine-König 	MX25_PAD_FEC_MDC = 114,
13934027ca2SUwe Kleine-König 	MX25_PAD_FEC_MDIO = 115,
14034027ca2SUwe Kleine-König 	MX25_PAD_FEC_TDATA0 = 116,
14134027ca2SUwe Kleine-König 	MX25_PAD_FEC_TDATA1 = 117,
14234027ca2SUwe Kleine-König 	MX25_PAD_FEC_TX_EN = 118,
14334027ca2SUwe Kleine-König 	MX25_PAD_FEC_RDATA0 = 119,
14434027ca2SUwe Kleine-König 	MX25_PAD_FEC_RDATA1 = 120,
14534027ca2SUwe Kleine-König 	MX25_PAD_FEC_RX_DV = 121,
14634027ca2SUwe Kleine-König 	MX25_PAD_FEC_TX_CLK = 122,
14734027ca2SUwe Kleine-König 	MX25_PAD_RTCK = 123,
14834027ca2SUwe Kleine-König 	MX25_PAD_DE_B = 124,
14934027ca2SUwe Kleine-König 	MX25_PAD_GPIO_A = 125,
15034027ca2SUwe Kleine-König 	MX25_PAD_GPIO_B = 126,
15134027ca2SUwe Kleine-König 	MX25_PAD_GPIO_C = 127,
15234027ca2SUwe Kleine-König 	MX25_PAD_GPIO_D = 128,
15334027ca2SUwe Kleine-König 	MX25_PAD_GPIO_E = 129,
15434027ca2SUwe Kleine-König 	MX25_PAD_GPIO_F = 130,
15534027ca2SUwe Kleine-König 	MX25_PAD_EXT_ARMCLK = 131,
15634027ca2SUwe Kleine-König 	MX25_PAD_UPLL_BYPCLK = 132,
15734027ca2SUwe Kleine-König 	MX25_PAD_VSTBY_REQ = 133,
15834027ca2SUwe Kleine-König 	MX25_PAD_VSTBY_ACK = 134,
15934027ca2SUwe Kleine-König 	MX25_PAD_POWER_FAIL  = 135,
16034027ca2SUwe Kleine-König 	MX25_PAD_CLKO = 136,
16134027ca2SUwe Kleine-König 	MX25_PAD_BOOT_MODE0 = 137,
16234027ca2SUwe Kleine-König 	MX25_PAD_BOOT_MODE1 = 138,
163edad3b2aSLinus Walleij };
164edad3b2aSLinus Walleij 
165edad3b2aSLinus Walleij /* Pad names for the pinmux subsystem */
166edad3b2aSLinus Walleij static const struct pinctrl_pin_desc imx25_pinctrl_pads[] = {
167edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_RESERVE0),
1689911a2d5SUwe Kleine-König 	IMX_PINCTRL_PIN(MX25_PAD_RESERVE1),
169edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_A10),
170edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_A13),
171edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_A14),
172edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_A15),
173edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_A16),
174edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_A17),
175edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_A18),
176edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_A19),
177edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_A20),
178edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_A21),
179edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_A22),
180edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_A23),
181edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_A24),
182edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_A25),
183edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_EB0),
184edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_EB1),
185edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_OE),
186edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_CS0),
187edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_CS1),
188edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_CS4),
189edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_CS5),
190edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_NF_CE0),
191edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_ECB),
192edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_LBA),
193edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_BCLK),
194edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_RW),
195edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_NFWE_B),
196edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_NFRE_B),
197edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_NFALE),
198edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_NFCLE),
199edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_NFWP_B),
200edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_NFRB),
201edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_D15),
202edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_D14),
203edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_D13),
204edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_D12),
205edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_D11),
206edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_D10),
207edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_D9),
208edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_D8),
209edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_D7),
210edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_D6),
211edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_D5),
212edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_D4),
213edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_D3),
214edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_D2),
215edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_D1),
216edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_D0),
217edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_LD0),
218edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_LD1),
219edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_LD2),
220edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_LD3),
221edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_LD4),
222edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_LD5),
223edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_LD6),
224edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_LD7),
225edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_LD8),
226edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_LD9),
227edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_LD10),
228edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_LD11),
229edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_LD12),
230edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_LD13),
231edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_LD14),
232edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_LD15),
233edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_HSYNC),
234edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_VSYNC),
235edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_LSCLK),
236edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_OE_ACD),
237edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_CONTRAST),
238edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_PWM),
239edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_CSI_D2),
240edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_CSI_D3),
241edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_CSI_D4),
242edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_CSI_D5),
243edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_CSI_D6),
244edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_CSI_D7),
245edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_CSI_D8),
246edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_CSI_D9),
247edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_CSI_MCLK),
248edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_CSI_VSYNC),
249edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_CSI_HSYNC),
250edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_CSI_PIXCLK),
251edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_I2C1_CLK),
252edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_I2C1_DAT),
253edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_CSPI1_MOSI),
254edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_CSPI1_MISO),
255edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_CSPI1_SS0),
256edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_CSPI1_SS1),
257edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_CSPI1_SCLK),
258edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_CSPI1_RDY),
259edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_UART1_RXD),
260edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_UART1_TXD),
261edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_UART1_RTS),
262edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_UART1_CTS),
263edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_UART2_RXD),
264edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_UART2_TXD),
265edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_UART2_RTS),
266edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_UART2_CTS),
267edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_SD1_CMD),
268edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_SD1_CLK),
269edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_SD1_DATA0),
270edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_SD1_DATA1),
271edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_SD1_DATA2),
272edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_SD1_DATA3),
273edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_KPP_ROW0),
274edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_KPP_ROW1),
275edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_KPP_ROW2),
276edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_KPP_ROW3),
277edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_KPP_COL0),
278edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_KPP_COL1),
279edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_KPP_COL2),
280edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_KPP_COL3),
281edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_FEC_MDC),
282edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_FEC_MDIO),
283edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_FEC_TDATA0),
284edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_FEC_TDATA1),
285edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_FEC_TX_EN),
286edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_FEC_RDATA0),
287edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_FEC_RDATA1),
288edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_FEC_RX_DV),
289edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_FEC_TX_CLK),
290edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_RTCK),
291edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_DE_B),
292edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_GPIO_A),
293edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_GPIO_B),
294edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_GPIO_C),
295edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_GPIO_D),
296edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_GPIO_E),
297edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_GPIO_F),
298edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_EXT_ARMCLK),
299edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_UPLL_BYPCLK),
300edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_VSTBY_REQ),
301edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_VSTBY_ACK),
302edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_POWER_FAIL),
303edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_CLKO),
304edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_BOOT_MODE0),
305edad3b2aSLinus Walleij 	IMX_PINCTRL_PIN(MX25_PAD_BOOT_MODE1),
306edad3b2aSLinus Walleij };
307edad3b2aSLinus Walleij 
3087c017687SStefan Agner static const struct imx_pinctrl_soc_info imx25_pinctrl_info = {
309edad3b2aSLinus Walleij 	.pins = imx25_pinctrl_pads,
310edad3b2aSLinus Walleij 	.npins = ARRAY_SIZE(imx25_pinctrl_pads),
311edad3b2aSLinus Walleij };
312edad3b2aSLinus Walleij 
313edad3b2aSLinus Walleij static const struct of_device_id imx25_pinctrl_of_match[] = {
314edad3b2aSLinus Walleij 	{ .compatible = "fsl,imx25-iomuxc", },
315edad3b2aSLinus Walleij 	{ /* sentinel */ }
316edad3b2aSLinus Walleij };
317edad3b2aSLinus Walleij 
318edad3b2aSLinus Walleij static int imx25_pinctrl_probe(struct platform_device *pdev)
319edad3b2aSLinus Walleij {
320edad3b2aSLinus Walleij 	return imx_pinctrl_probe(pdev, &imx25_pinctrl_info);
321edad3b2aSLinus Walleij }
322edad3b2aSLinus Walleij 
323edad3b2aSLinus Walleij static struct platform_driver imx25_pinctrl_driver = {
324edad3b2aSLinus Walleij 	.driver = {
325edad3b2aSLinus Walleij 		.name = "imx25-pinctrl",
326edad3b2aSLinus Walleij 		.of_match_table = of_match_ptr(imx25_pinctrl_of_match),
327edad3b2aSLinus Walleij 	},
328edad3b2aSLinus Walleij 	.probe = imx25_pinctrl_probe,
329edad3b2aSLinus Walleij };
330edad3b2aSLinus Walleij 
331edad3b2aSLinus Walleij static int __init imx25_pinctrl_init(void)
332edad3b2aSLinus Walleij {
333edad3b2aSLinus Walleij 	return platform_driver_register(&imx25_pinctrl_driver);
334edad3b2aSLinus Walleij }
335edad3b2aSLinus Walleij arch_initcall(imx25_pinctrl_init);
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