xref: /linux/drivers/pinctrl/freescale/pinctrl-imx1.h (revision 3eb66e91a25497065c5322b1268cbc3953642227)
1*c2b39decSFabio Estevam /* SPDX-License-Identifier: GPL-2.0+ */
2edad3b2aSLinus Walleij /*
3edad3b2aSLinus Walleij  * IMX pinmux core definitions
4edad3b2aSLinus Walleij  *
5edad3b2aSLinus Walleij  * Copyright (C) 2012 Freescale Semiconductor, Inc.
6edad3b2aSLinus Walleij  * Copyright (C) 2012 Linaro Ltd.
7edad3b2aSLinus Walleij  *
8edad3b2aSLinus Walleij  * Author: Dong Aisheng <dong.aisheng@linaro.org>
9edad3b2aSLinus Walleij  */
10edad3b2aSLinus Walleij 
11edad3b2aSLinus Walleij #ifndef __DRIVERS_PINCTRL_IMX1_H
12edad3b2aSLinus Walleij #define __DRIVERS_PINCTRL_IMX1_H
13edad3b2aSLinus Walleij 
14edad3b2aSLinus Walleij struct platform_device;
15edad3b2aSLinus Walleij 
16edad3b2aSLinus Walleij /**
17edad3b2aSLinus Walleij  * struct imx1_pin - describes an IMX1/21/27 pin.
18edad3b2aSLinus Walleij  * @pin_id: ID of the described pin.
19edad3b2aSLinus Walleij  * @mux_id: ID of the mux setup.
20edad3b2aSLinus Walleij  * @config: Configuration of the pin (currently only pullup-enable).
21edad3b2aSLinus Walleij  */
22edad3b2aSLinus Walleij struct imx1_pin {
23edad3b2aSLinus Walleij 	unsigned int pin_id;
24edad3b2aSLinus Walleij 	unsigned int mux_id;
25edad3b2aSLinus Walleij 	unsigned long config;
26edad3b2aSLinus Walleij };
27edad3b2aSLinus Walleij 
28edad3b2aSLinus Walleij /**
29edad3b2aSLinus Walleij  * struct imx1_pin_group - describes an IMX pin group
30edad3b2aSLinus Walleij  * @name: the name of this specific pin group
31edad3b2aSLinus Walleij  * @pins: an array of imx1_pin structs used in this group
32edad3b2aSLinus Walleij  * @npins: the number of pins in this group array, i.e. the number of
33edad3b2aSLinus Walleij  *	elements in .pins so we can iterate over that array
34edad3b2aSLinus Walleij  */
35edad3b2aSLinus Walleij struct imx1_pin_group {
36edad3b2aSLinus Walleij 	const char *name;
37edad3b2aSLinus Walleij 	unsigned int *pin_ids;
38edad3b2aSLinus Walleij 	struct imx1_pin *pins;
39edad3b2aSLinus Walleij 	unsigned npins;
40edad3b2aSLinus Walleij };
41edad3b2aSLinus Walleij 
42edad3b2aSLinus Walleij /**
43edad3b2aSLinus Walleij  * struct imx1_pmx_func - describes IMX pinmux functions
44edad3b2aSLinus Walleij  * @name: the name of this specific function
45edad3b2aSLinus Walleij  * @groups: corresponding pin groups
46edad3b2aSLinus Walleij  * @num_groups: the number of groups
47edad3b2aSLinus Walleij  */
48edad3b2aSLinus Walleij struct imx1_pmx_func {
49edad3b2aSLinus Walleij 	const char *name;
50edad3b2aSLinus Walleij 	const char **groups;
51edad3b2aSLinus Walleij 	unsigned num_groups;
52edad3b2aSLinus Walleij };
53edad3b2aSLinus Walleij 
54edad3b2aSLinus Walleij struct imx1_pinctrl_soc_info {
55edad3b2aSLinus Walleij 	struct device *dev;
56edad3b2aSLinus Walleij 	const struct pinctrl_pin_desc *pins;
57edad3b2aSLinus Walleij 	unsigned int npins;
58edad3b2aSLinus Walleij 	struct imx1_pin_group *groups;
59edad3b2aSLinus Walleij 	unsigned int ngroups;
60edad3b2aSLinus Walleij 	struct imx1_pmx_func *functions;
61edad3b2aSLinus Walleij 	unsigned int nfunctions;
62edad3b2aSLinus Walleij };
63edad3b2aSLinus Walleij 
64edad3b2aSLinus Walleij #define IMX_PINCTRL_PIN(pin) PINCTRL_PIN(pin, #pin)
65edad3b2aSLinus Walleij 
66edad3b2aSLinus Walleij int imx1_pinctrl_core_probe(struct platform_device *pdev,
67edad3b2aSLinus Walleij 			struct imx1_pinctrl_soc_info *info);
68edad3b2aSLinus Walleij #endif /* __DRIVERS_PINCTRL_IMX1_H */
69