xref: /linux/drivers/pinctrl/cix/pinctrl-sky1.c (revision b61104e7a6349bd2c2b3e2fb3260d87f15eda8f4)
1 // SPDX-License-Identifier: GPL-2.0
2 //
3 // Author: Jerry Zhu <Jerry.Zhu@cixtech.com>
4 // Author: Gary Yang <gary.yang@cixtech.com>
5 
6 #include <linux/err.h>
7 #include <linux/init.h>
8 #include <linux/module.h>
9 #include <linux/of.h>
10 #include <linux/of_device.h>
11 #include <linux/pinctrl/pinctrl.h>
12 #include <linux/platform_device.h>
13 #include "linux/stddef.h"
14 
15 #include "../core.h"
16 #include "pinctrl-sky1.h"
17 
18 /* Pad names for the s5 domain pinmux subsystem */
19 static const char * const gpio1_group[] = {"GPIO1"};
20 static const char * const gpio2_group[] = {"GPIO2"};
21 static const char * const gpio3_group[] = {"GPIO3"};
22 static const char * const gpio4_group[] = {"GPIO4"};
23 static const char * const gpio5_group[] = {"GPIO5"};
24 static const char * const gpio6_group[] = {"GPIO6"};
25 static const char * const gpio7_group[] = {"GPIO7"};
26 static const char * const gpio8_group[] = {"GPIO8"};
27 static const char * const gpio9_group[] = {"GPIO9"};
28 static const char * const gpio10_group[] = {"GPIO10"};
29 static const char * const gpio11_group[] = {"GPIO11"};
30 static const char * const gpio12_group[] = {"GPIO12"};
31 static const char * const gpio13_group[] = {"GPIO13"};
32 static const char * const gpio14_group[] = {"GPIO14"};
33 static const char * const rsmrst_group[] = { };
34 static const char * const srst_group[] = { };
35 static const char * const slp_s3_group[] = { };
36 static const char * const slp_s5_group[] = { };
37 static const char * const pwrgd_group[] = { };
38 static const char * const pwrok_group[] = { };
39 static const char * const pwrbtn_group[] = { };
40 static const char * const ddrio_gate_group[] = { };
41 static const char * const jtag_gpio_group[] = { };
42 static const char * const jtag_tck_group[] = { };
43 static const char * const jtag_tdi_group[] = { };
44 static const char * const jtag_tdo_group[] = { };
45 static const char * const tms_group[] = { };
46 static const char * const trsl_group[] = { };
47 static const char * const sfi_i2c0_scl_group[] = {"SFI_I2C0_SCL",
48 					"SFI_I3C0_SCL"};
49 static const char * const sfi_i2c0_sda_group[] = {"SFI_I2C0_SDA",
50 					"SFI_I3C0_SDA"};
51 static const char * const sfi_i2c1_scl_group[] = {"SFI_I2C1_SCL",
52 					"SFI_I3C1_SCL", "SFI_SPI_CS0"};
53 static const char * const sfi_i2c1_sda_group[] = {"SFI_I2C1_SDA",
54 					"SFI_I3C1_SDA", "SFI_SPI_CS1"};
55 static const char * const sfi_gpio0_group[] = {"GPIO15", "SFI_SPI_SCK",
56 					"SFI_GPIO0"};
57 static const char * const sfi_gpio1_group[] = {"GPIO16", "SFI_SPI_MOSI",
58 					"SFI_GPIO1"};
59 static const char * const sfi_gpio2_group[] = {"GPIO17", "SFI_SPI_MISO",
60 					"SFI_GPIO2"};
61 static const char * const gpio18_group[] = {"SFI_GPIO3", "GPIO18"};
62 static const char * const gpio19_group[] = {"SFI_GPIO4", "GPIO19"};
63 static const char * const gpio20_group[] = {"SFI_GPIO5", "GPIO20"};
64 static const char * const gpio21_group[] = {"SFI_GPIO6", "GPIO21"};
65 static const char * const gpio22_group[] = {"SFI_GPIO7", "GPIO22"};
66 static const char * const gpio23_group[] = {"SFI_GPIO8", "GPIO23",
67 				"SFI_I3C0_PUR_EN_L"};
68 static const char * const gpio24_group[] = {"SFI_GPIO9", "GPIO24",
69 				"SFI_I3C1_PUR_EN_L"};
70 static const char * const spi1_miso_group[] = {"SPI1_MISO", "GPIO25"};
71 static const char * const spi1_cs0_group[] = {"SPI1_CS0", "GPIO26"};
72 static const char * const spi1_cs1_group[] = {"SPI1_CS1", "GPIO27"};
73 static const char * const spi1_mosi_group[] = {"SPI1_MOSI", "GPIO28"};
74 static const char * const spi1_clk_group[] = {"SPI1_CLK", "GPIO29"};
75 static const char * const gpio30_group[] = {"GPIO30", "USB_0C0_L"};
76 static const char * const gpio31_group[] = {"GPIO31", "USB_0C1_L"};
77 static const char * const gpio32_group[] = {"GPIO32", "USB_0C2_L"};
78 static const char * const gpio33_group[] = {"GPIO33", "USB_0C3_L"};
79 static const char * const gpio34_group[] = {"GPIO34", "USB_0C4_L"};
80 static const char * const gpio35_group[] = {"GPIO35", "USB_0C5_L"};
81 static const char * const gpio36_group[] = {"GPIO36", "USB_0C6_L"};
82 static const char * const gpio37_group[] = {"GPIO37", "USB_0C7_L"};
83 static const char * const gpio38_group[] = {"GPIO38", "USB_0C8_L"};
84 static const char * const gpio39_group[] = {"GPIO39", "USB_0C9_L"};
85 static const char * const gpio40_group[] = {"GPIO40", "USB_DRIVE_VBUS0"};
86 static const char * const gpio41_group[] = {"GPIO41", "USB_DRIVE_VBUS4"};
87 static const char * const gpio42_group[] = {"GPIO42", "USB_DRIVE_VBUS5"};
88 static const char * const se_qspi_clk_group[] = {"SE_QSPI_CLK", "QSPI_CLK"};
89 static const char * const se_qspi_cs_group[] = {"SE_QSPI_CS_L", "QSPI_CS_L"};
90 static const char * const se_qspi_data0_group[] = {"SE_QSPI_DATA0",
91 					"QSPI_DATA0"};
92 static const char * const se_qspi_data1_group[] = {"SE_QSPI_DATA1",
93 					"QSPI_DATA1"};
94 static const char * const se_qspi_data2_group[] = {"SE_QSPI_DATA2",
95 					"QSPI_DATA2"};
96 static const char * const se_qspi_data3_group[] = {"SE_QSPI_DATA3",
97 					"QSPI_DATA3"};
98 static const struct sky1_pin_desc sky1_pinctrl_s5_pads[] = {
99 	SKY_PINFUNCTION(PINCTRL_PIN(0, "GPIO1"), gpio1),
100 	SKY_PINFUNCTION(PINCTRL_PIN(1, "GPIO2"), gpio2),
101 	SKY_PINFUNCTION(PINCTRL_PIN(2, "GPIO3"), gpio3),
102 	SKY_PINFUNCTION(PINCTRL_PIN(3, "GPIO4"), gpio4),
103 	SKY_PINFUNCTION(PINCTRL_PIN(4, "GPIO5"), gpio5),
104 	SKY_PINFUNCTION(PINCTRL_PIN(5, "GPIO6"), gpio6),
105 	SKY_PINFUNCTION(PINCTRL_PIN(6, "GPIO7"), gpio7),
106 	SKY_PINFUNCTION(PINCTRL_PIN(7, "GPIO8"), gpio8),
107 	SKY_PINFUNCTION(PINCTRL_PIN(8, "GPIO9"), gpio9),
108 	SKY_PINFUNCTION(PINCTRL_PIN(9, "GPIO10"), gpio10),
109 	SKY_PINFUNCTION(PINCTRL_PIN(10, "GPIO11"), gpio11),
110 	SKY_PINFUNCTION(PINCTRL_PIN(11, "GPIO12"), gpio12),
111 	SKY_PINFUNCTION(PINCTRL_PIN(12, "GPIO13"), gpio13),
112 	SKY_PINFUNCTION(PINCTRL_PIN(13, "GPIO14"), gpio14),
113 	SKY_PINFUNCTION(PINCTRL_PIN(14, "RSMRST_L"), rsmrst),
114 	SKY_PINFUNCTION(PINCTRL_PIN(15, "SRST_L"), srst),
115 	SKY_PINFUNCTION(PINCTRL_PIN(16, "SLP_S3_L"), slp_s3),
116 	SKY_PINFUNCTION(PINCTRL_PIN(17, "SLP_S5_L"), slp_s5),
117 	SKY_PINFUNCTION(PINCTRL_PIN(18, "PWRGD"), pwrgd),
118 	SKY_PINFUNCTION(PINCTRL_PIN(19, "PWROK"), pwrok),
119 	SKY_PINFUNCTION(PINCTRL_PIN(20, "PWRBTN_L"), pwrbtn),
120 	SKY_PINFUNCTION(PINCTRL_PIN(21, "VDD_DDRIO_GATE"), ddrio_gate),
121 	SKY_PINFUNCTION(PINCTRL_PIN(22, "JTAG_GPIO_L"), jtag_gpio),
122 	SKY_PINFUNCTION(PINCTRL_PIN(23, "JTAG_TCK"), jtag_tck),
123 	SKY_PINFUNCTION(PINCTRL_PIN(24, "JTAG_TDI"), jtag_tdi),
124 	SKY_PINFUNCTION(PINCTRL_PIN(25, "JTAG_TDO"), jtag_tdo),
125 	SKY_PINFUNCTION(PINCTRL_PIN(26, "TMS"), tms),
126 	SKY_PINFUNCTION(PINCTRL_PIN(27, "TRSL_L"), trsl),
127 	SKY_PINFUNCTION(PINCTRL_PIN(28, "SFI_I2C0_SCL"), sfi_i2c0_scl),
128 	SKY_PINFUNCTION(PINCTRL_PIN(29, "SFI_I2C0_SDA"), sfi_i2c0_sda),
129 	SKY_PINFUNCTION(PINCTRL_PIN(30, "SFI_I2C1_SCL"), sfi_i2c1_scl),
130 	SKY_PINFUNCTION(PINCTRL_PIN(31, "SFI_I2C1_SDA"), sfi_i2c1_sda),
131 	SKY_PINFUNCTION(PINCTRL_PIN(32, "SFI_GPIO0"), sfi_gpio0),
132 	SKY_PINFUNCTION(PINCTRL_PIN(33, "SFI_GPIO1"), sfi_gpio1),
133 	SKY_PINFUNCTION(PINCTRL_PIN(34, "SFI_GPIO2"), sfi_gpio2),
134 	SKY_PINFUNCTION(PINCTRL_PIN(35, "GPIO18"), gpio18),
135 	SKY_PINFUNCTION(PINCTRL_PIN(36, "GPIO19"), gpio19),
136 	SKY_PINFUNCTION(PINCTRL_PIN(37, "GPIO20"), gpio20),
137 	SKY_PINFUNCTION(PINCTRL_PIN(38, "GPIO21"), gpio21),
138 	SKY_PINFUNCTION(PINCTRL_PIN(39, "GPIO22"), gpio22),
139 	SKY_PINFUNCTION(PINCTRL_PIN(40, "GPIO23"), gpio23),
140 	SKY_PINFUNCTION(PINCTRL_PIN(41, "GPIO24"), gpio24),
141 	SKY_PINFUNCTION(PINCTRL_PIN(42, "SPI1_MISO"), spi1_miso),
142 	SKY_PINFUNCTION(PINCTRL_PIN(43, "SPI1_CS0"), spi1_cs0),
143 	SKY_PINFUNCTION(PINCTRL_PIN(44, "SPI1_CS1"), spi1_cs1),
144 	SKY_PINFUNCTION(PINCTRL_PIN(45, "SPI1_MOSI"), spi1_mosi),
145 	SKY_PINFUNCTION(PINCTRL_PIN(46, "SPI1_CLK"), spi1_clk),
146 	SKY_PINFUNCTION(PINCTRL_PIN(47, "GPIO30"), gpio30),
147 	SKY_PINFUNCTION(PINCTRL_PIN(48, "GPIO31"), gpio31),
148 	SKY_PINFUNCTION(PINCTRL_PIN(49, "GPIO32"), gpio32),
149 	SKY_PINFUNCTION(PINCTRL_PIN(50, "GPIO33"), gpio33),
150 	SKY_PINFUNCTION(PINCTRL_PIN(51, "GPIO34"), gpio34),
151 	SKY_PINFUNCTION(PINCTRL_PIN(52, "GPIO35"), gpio35),
152 	SKY_PINFUNCTION(PINCTRL_PIN(53, "GPIO36"), gpio36),
153 	SKY_PINFUNCTION(PINCTRL_PIN(54, "GPIO37"), gpio37),
154 	SKY_PINFUNCTION(PINCTRL_PIN(55, "GPIO38"), gpio38),
155 	SKY_PINFUNCTION(PINCTRL_PIN(56, "GPIO39"), gpio39),
156 	SKY_PINFUNCTION(PINCTRL_PIN(57, "GPIO40"), gpio40),
157 	SKY_PINFUNCTION(PINCTRL_PIN(58, "GPIO41"), gpio41),
158 	SKY_PINFUNCTION(PINCTRL_PIN(59, "GPIO42"), gpio42),
159 	SKY_PINFUNCTION(PINCTRL_PIN(60, "SE_QSPI_CLK"), se_qspi_clk),
160 	SKY_PINFUNCTION(PINCTRL_PIN(61, "SE_QSPI_CS_L"), se_qspi_cs),
161 	SKY_PINFUNCTION(PINCTRL_PIN(62, "SE_QSPI_DATA0"), se_qspi_data0),
162 	SKY_PINFUNCTION(PINCTRL_PIN(63, "SE_QSPI_DATA1"), se_qspi_data1),
163 	SKY_PINFUNCTION(PINCTRL_PIN(64, "SE_QSPI_DATA2"), se_qspi_data2),
164 	SKY_PINFUNCTION(PINCTRL_PIN(65, "SE_QSPI_DATA3"), se_qspi_data3),
165 };
166 
167 /* Pad names for the s0 domain pinmux subsystem */
168 static const char * const gpio43_group[] = {"GPIO43"};
169 static const char * const gpio44_group[] = {"GPIO44"};
170 static const char * const gpio45_group[] = {"GPIO45"};
171 static const char * const gpio46_group[] = {"GPIO46"};
172 static const char * const reset_in_group[] = { };
173 static const char * const plt_reset_group[] = { };
174 static const char * const thermtrip_group[] = { };
175 static const char * const prochot_group[] = { };
176 static const char * const pm_i2c0_clk_group[] = { };
177 static const char * const pm_i2c0_data_group[] = { };
178 static const char * const pm_i2c1_clk_group[] = { };
179 static const char * const pm_i2c1_data_group[] = { };
180 static const char * const pm_i2c2_clk_group[] = { };
181 static const char * const pm_i2c2_data_group[] = { };
182 static const char * const pm_i2c3_clk_group[] = { };
183 static const char * const pm_i2c3_data_group[] = { };
184 static const char * const strap0_group[] = { };
185 static const char * const strap1_group[] = { };
186 static const char * const dp2_digon_group[] = {"DP2_DIGON"};
187 static const char * const dp2_blon_group[] = {"DP2_BLON"};
188 static const char * const dp2_vary_bl_group[] = {"DP2_VARY_BL"};
189 static const char * const i2c7_scl_group[] = {"I2C7_SCL"};
190 static const char * const i2c7_sda_group[] = {"I2C7_SDA"};
191 static const char * const uart6_csu_se_txd_group[] = { };
192 static const char * const clk_req1_group[] = { };
193 static const char * const clk_req3_group[] = { };
194 static const char * const i2c5_scl_group[] = {"I2C5_SCL", "GPIO47"};
195 static const char * const i2c5_sda_group[] = {"I2C5_SDA", "GPIO48"};
196 static const char * const i2c6_scl_group[] = {"I2C6_SCL", "GPIO49"};
197 static const char * const i2c6_sda_group[] = {"I2C6_SDA", "GPIO50"};
198 static const char * const i2c0_scl_group[] = {"I2C0_SCL", "GPIO51"};
199 static const char * const i2c0_sda_group[] = {"I2C0_SDA", "GPIO52"};
200 static const char * const i2c1_scl_group[] = {"I2C1_SCL", "GPIO53"};
201 static const char * const i2c1_sda_group[] = {"I2C1_SDA", "GPIO54"};
202 static const char * const i2c2_scl_group[] = {"I2C2_SCL", "I3C0_SCL",
203 					"GPIO55"};
204 static const char * const i2c2_sda_group[] = {"I2C2_SDA", "I3C0_SDA",
205 					"GPIO56"};
206 static const char * const gpio57_group[] = {"GPIO57", "I3C0_PUR_EN_L"};
207 static const char * const i2c3_scl_group[] = {"I2C3_SCL", "I3C1_SCL",
208 					"GPIO58"};
209 static const char * const i2c3_sda_group[] = {"I2C3_SDA", "I3C1_SDA",
210 					"GPIO59"};
211 static const char * const gpio60_group[] = {"GPIO60", "I3C1_PUR_EN_L"};
212 static const char * const i2c4_scl_group[] = {"I2C4_SCL", "GPIO61"};
213 static const char * const i2c4_sda_group[] = {"I2C4_SDA", "GPIO62"};
214 static const char * const hda_bitclk_group[] = {"HDA_BITCLK", "I2S0_SCK",
215 				"I2S9_RSCK_DBG"};
216 static const char * const hda_rst_group[] = {"HDA_RST_L", "I2S0_DATA_IN",
217 				"I2S9_DATA_IN_DBG"};
218 static const char * const hda_sdin0_group[] = {"HDA_SDIN0", "I2S0_MCLK",
219 				"I2S9_TSCK_DBG"};
220 static const char * const hda_sdout0_group[] = {"HDA_SDOUT0", "I2S0_DATA_OUT",
221 				"I2S9_TWS_DBG"};
222 static const char * const hda_sync_group[] = {"HDA_SYNC", "I2S0_WS",
223 				"I2S9_RWS_DBG"};
224 static const char * const hda_sdin1_group[] = {"HDA_SDIN1", "GPIO63",
225 				"I2S9_DATA_IN1_DBG"};
226 static const char * const hda_sdout1_group[] = {"HDA_SDOUT1", "GPIO64",
227 				"I2S9_DATA_OUT0_DBG"};
228 static const char * const i2s1_mclk_group[] = {"I2S1_MCLK", "GPIO65"};
229 static const char * const i2s1_sck_group[] = {"I2S1_SCK", "GPIO66"};
230 static const char * const i2s1_ws_group[] = {"I2S1_WS", "GPIO67"};
231 static const char * const i2s1_data_in_group[] = {"I2S1_DATA_IN", "GPIO68"};
232 static const char * const i2s1_data_out_group[] = {"I2S1_DATA_OUT", "GPIO69"};
233 static const char * const i2s2_mck_group[] = {"I2S2_MCLK", "GPIO70"};
234 static const char * const i2s2_rsck_group[] = {"I2S2_RSCK", "GPIO71",
235 				"I2S5_RSCK_DBG", "I2S6_RSCK_DBG"};
236 static const char * const i2s2_rws_group[] = {"I2S2_RWS", "GPIO72",
237 				"I2S5_RWS_DBG", "I2S6_RWS_DBG"};
238 static const char * const i2s2_tsck_group[] = {"I2S2_TSCK", "GPIO73",
239 				"I2S5_TSCK_DBG", "I2S6_TSCK_DBG"};
240 static const char * const i2s2_tws_group[] = {"I2S2_TWS", "GPIO74",
241 				"I2S5_TWS_DBG", "I2S6_TWS_DBG"};
242 static const char * const i2s2_data_in0_group[] = {"I2S2_DATA_IN0", "GPIO75",
243 				"I2S5_DATA_IN0_DBG", "I2S6_DATA_IN0_DBG"};
244 static const char * const i2s2_data_in1_group[] = {"I2S2_DATA_IN1", "GPIO76",
245 				"I2S5_DATA_IN1_DBG", "I2S6_DATA_IN1_DBG"};
246 static const char * const i2s2_data_out0_group[] = {"I2S2_DATA_OUT0", "GPIO77",
247 				"I2S5_DATA_OUT0_DBG", "I2S6_DATA_OUT0_DBG"};
248 static const char * const i2s2_data_out1_group[] = {"I2S2_DATA_OUT1", "GPIO78",
249 				"I2S5_DATA_OUT1_DBG", "I2S6_DATA_OUT1_DBG"};
250 static const char * const i2s2_data_out2_group[] = {"I2S2_DATA_OUT2",
251 				"GPIO79"};
252 static const char * const i2s2_data_out3_group[] = {"I2S2_DATA_OUT3", "GPIO80",
253 				"I2S9_DATA_OUT1_DBG"};
254 static const char * const i2s3_mclk_group[] = {"I2S3_MCLK", "GPIO81"};
255 static const char * const i2s3_rsck_group[] = {"I2S3_RSCK", "GPIO82",
256 				"I2S7_RSCK_DBG", "I2S8_RSCK_DBG"};
257 static const char * const i2s3_rws_group[] = {"I2S3_RWS", "GPIO83",
258 				"I2S7_RWS_DBG", "I2S8_RWS_DBG"};
259 static const char * const i2s3_tsck_group[] = {"I2S3_TSCK", "GPIO84",
260 				"I2S7_TSCK_DBG", "I2S8_TSCK_DBG"};
261 static const char * const i2s3_tws_group[] = {"I2S3_TWS", "GPIO85",
262 				"I2S7_TWS_DBG", "I2S8_TWS_DBG"};
263 static const char * const i2s3_data_in0_group[] = {"I2S3_DATA_IN0", "GPIO86",
264 				"I2S7_DATA_IN0_DBG", "I2S8_DATA_IN0_DBG"};
265 static const char * const i2s3_data_in1_group[] = {"I2S3_DATA_IN1", "GPIO87",
266 				"I2S7_DATA_IN1_DBG", "I2S8_DATA_IN1_DBG"};
267 static const char * const i2s3_data_out0_group[] = {"I2S3_DATA_OUT0", "GPIO88",
268 				"I2S7_DATA_OUT0_DBG", "I2S8_DATA_OUT0_DBG"};
269 static const char * const i2s3_data_out1_group[] = {"I2S3_DATA_OUT1", "GPIO89",
270 				"I2S7_DATA_OUT1_DBG", "I2S8_DATA_OUT1_DBG"};
271 static const char * const gpio90_group[] = {"GPIO90", "I2S4_MCLK_LB"};
272 static const char * const gpio91_group[] = {"GPIO91", "I2S4_SCK_LB"};
273 static const char * const gpio92_group[] = {"GPIO92", "I2S4_WS_LB"};
274 static const char * const gpio93_group[] = {"GPIO93", "I2S4_DATA_IN_LB"};
275 static const char * const gpio94_group[] = {"GPIO94", "I2S4_DATA_OUT_LB"};
276 static const char * const uart0_txd_group[] = {"UART0_TXD", "PWM0", "GPIO95"};
277 static const char * const uart0_rxd_group[] = {"UART0_RXD", "PWM1", "GPIO96"};
278 static const char * const uart0_cts_group[] = {"UART0_CTS", "FAN_OUT2",
279 				"GPIO97"};
280 static const char * const uart0_rts_group[] = {"UART0_RTS", "FAN_TACH2",
281 				"GPIO98"};
282 static const char * const uart1_txd_group[] = {"UART1_TXD", "FAN_OUT0",
283 				"GPIO99"};
284 static const char * const uart1_rxd_group[] = {"UART1_RXD", "FAN_TACH0",
285 				"GPIO100"};
286 static const char * const uart1_cts_group[] = {"UART1_CTS", "FAN_OUT1",
287 				"GPIO101"};
288 static const char * const uart1_rts_group[] = {"UART1_RTS", "FAN_TACH1",
289 				"GPIO102"};
290 static const char * const uart2_txd_group[] = {"UART2_TXD", "GPIO103"};
291 static const char * const uart2_rxd_group[] = {"UART2_RXD", "GPIO104"};
292 static const char * const uart3_txd_group[] = {"UART3_TXD", "GPIO105"};
293 static const char * const uart3_rxd_group[] = {"UART3_RXD", "GPIO106"};
294 static const char * const uart3_cts_group[] = {"UART3_CTS", "GPIO107",
295 				"TRIGIN0"};
296 static const char * const uart3_rts_group[] = {"UART3_RTS", "GPIO108",
297 				"TRIGIN1"};
298 static const char * const uart4_csu_pm_txd_group[] = {"UART4_CSU_PM_TXD",
299 				"GPIO109"};
300 static const char * const uart4_csu_pm_rxd_group[] = {"UART4_CSU_PM_RXD",
301 				"GPIO110"};
302 static const char * const uart5_csu_se_txd_group[] = {"UART5_CSU_SE_TXD",
303 				"GPIO111"};
304 static const char * const uart5_csu_se_rxd_group[] = {"UART5_CSU_SE_RXD",
305 				"GPIO112"};
306 static const char * const uart6_csu_se_rxd_group[] = {"UART6_CSU_SE_RXD",
307 				"GPIO113"};
308 static const char * const clk_req0_group[] = {"CLK_REQ0_L", "GPIO114"};
309 static const char * const clk_req2_group[] = {"CLK_REQ2_L", "GPIO115"};
310 static const char * const clk_req4_group[] = {"CLK_REQ4_L", "GPIO116"};
311 static const char * const csi0_mclk0_group[] = {"CSI0_MCLK0", "GPIO117"};
312 static const char * const csi0_mclk1_group[] = {"CSI0_MCLK1", "GPIO118"};
313 static const char * const csi1_mclk0_group[] = {"CSI1_MCLK0", "GPIO119"};
314 static const char * const csi1_mclk1_group[] = {"CSI1_MCLK1", "GPIO120"};
315 static const char * const gpio121_group[] = {"GPIO121", "GMAC0_REFCLK_25M"};
316 static const char * const gpio122_group[] = {"GPIO122", "GMAC0_TX_CTL"};
317 static const char * const gpio123_group[] = {"GPIO123", "GMAC0_TXD0"};
318 static const char * const gpio124_group[] = {"GPIO124", "GMAC0_TXD1"};
319 static const char * const gpio125_group[] = {"GPIO125", "GMAC0_TXD2"};
320 static const char * const gpio126_group[] = {"GPIO126", "GMAC0_TXD3"};
321 static const char * const gpio127_group[] = {"GPIO127", "GMAC0_TX_CLK"};
322 static const char * const gpio128_group[] = {"GPIO128", "GMAC0_RX_CTL"};
323 static const char * const gpio129_group[] = {"GPIO129", "GMAC0_RXD0"};
324 static const char * const gpio130_group[] = {"GPIO130", "GMAC0_RXD1"};
325 static const char * const gpio131_group[] = {"GPIO131", "GMAC0_RXD2"};
326 static const char * const gpio132_group[] = {"GPIO132", "GMAC0_RXD3"};
327 static const char * const gpio133_group[] = {"GPIO133", "GMAC0_RX_CLK"};
328 static const char * const gpio134_group[] = {"GPIO134", "GMAC0_MDC"};
329 static const char * const gpio135_group[] = {"GPIO135", "GMAC0_MDIO"};
330 static const char * const gpio136_group[] = {"GPIO136", "GMAC1_REFCLK_25M"};
331 static const char * const gpio137_group[] = {"GPIO137", "GMAC1_TX_CTL"};
332 static const char * const gpio138_group[] = {"GPIO138", "GMAC1_TXD0",
333 				"SPI2_MISO"};
334 static const char * const gpio139_group[] = {"GPIO139", "GMAC1_TXD1",
335 				"SPI2_CS0"};
336 static const char * const gpio140_group[] = {"GPIO140", "GMAC1_TXD2",
337 				"SPI2_CS1"};
338 static const char * const gpio141_group[] = {"GPIO141", "GMAC1_TXD3",
339 				"SPI2_MOSI"};
340 static const char * const gpio142_group[] = {"GPIO142", "GMAC1_TX_CLK",
341 				"SPI2_CLK"};
342 static const char * const gpio143_group[] = {"GPIO143", "GMAC1_RX_CTL"};
343 static const char * const gpio144_group[] = {"GPIO144", "GMAC1_RXD0"};
344 static const char * const gpio145_group[] = {"GPIO145", "GMAC1_RXD1"};
345 static const char * const gpio146_group[] = {"GPIO146", "GMAC1_RXD2"};
346 static const char * const gpio147_group[] = {"GPIO147", "GMAC1_RXD3"};
347 static const char * const gpio148_group[] = {"GPIO148", "GMAC1_RX_CLK"};
348 static const char * const gpio149_group[] = {"GPIO149", "GMAC1_MDC"};
349 static const char * const gpio150_group[] = {"GPIO150", "GMAC1_MDIO"};
350 static const char * const gpio151_group[] = {"GPIO151", "PM_GPIO0"};
351 static const char * const gpio152_group[] = {"GPIO152", "PM_GPIO1"};
352 static const char * const gpio153_group[] = {"GPIO153", "PM_GPIO2"};
353 static const struct sky1_pin_desc sky1_pinctrl_pads[] = {
354 	SKY_PINFUNCTION(PINCTRL_PIN(0, "GPIO43"), gpio43),
355 	SKY_PINFUNCTION(PINCTRL_PIN(1, "GPIO44"), gpio44),
356 	SKY_PINFUNCTION(PINCTRL_PIN(2, "GPIO45"), gpio45),
357 	SKY_PINFUNCTION(PINCTRL_PIN(3, "GPIO46"), gpio46),
358 	SKY_PINFUNCTION(PINCTRL_PIN(4, "RESET_IN_L"), reset_in),
359 	SKY_PINFUNCTION(PINCTRL_PIN(5, "PLT_RESET_L"), plt_reset),
360 	SKY_PINFUNCTION(PINCTRL_PIN(6, "THERMTRIP_L"), thermtrip),
361 	SKY_PINFUNCTION(PINCTRL_PIN(7, "PROCHOT_L"), prochot),
362 	SKY_PINFUNCTION(PINCTRL_PIN(8, "PM_I2C0_CLK"), pm_i2c0_clk),
363 	SKY_PINFUNCTION(PINCTRL_PIN(9, "PM_I2C0_DATA"), pm_i2c0_data),
364 	SKY_PINFUNCTION(PINCTRL_PIN(10, "PM_I2C1_CLK"), pm_i2c1_clk),
365 	SKY_PINFUNCTION(PINCTRL_PIN(11, "PM_I2C1_DATA"), pm_i2c1_data),
366 	SKY_PINFUNCTION(PINCTRL_PIN(12, "PM_I2C2_CLK"), pm_i2c2_clk),
367 	SKY_PINFUNCTION(PINCTRL_PIN(13, "PM_I2C2_DATA"), pm_i2c2_data),
368 	SKY_PINFUNCTION(PINCTRL_PIN(14, "PM_I2C3_CLK"), pm_i2c3_clk),
369 	SKY_PINFUNCTION(PINCTRL_PIN(15, "PM_I2C3_DATA"), pm_i2c3_data),
370 	SKY_PINFUNCTION(PINCTRL_PIN(16, "STRAP0"), strap0),
371 	SKY_PINFUNCTION(PINCTRL_PIN(17, "STRAP1"), strap1),
372 	SKY_PINFUNCTION(PINCTRL_PIN(18, "DP2_DIGON"), dp2_digon),
373 	SKY_PINFUNCTION(PINCTRL_PIN(19, "DP2_BLON"), dp2_blon),
374 	SKY_PINFUNCTION(PINCTRL_PIN(20, "DP2_VARY_BL"), dp2_vary_bl),
375 	SKY_PINFUNCTION(PINCTRL_PIN(21, "I2C7_SCL"), i2c7_scl),
376 	SKY_PINFUNCTION(PINCTRL_PIN(22, "I2C7_SDA"), i2c7_sda),
377 	SKY_PINFUNCTION(PINCTRL_PIN(23, "UART6_CSU_SE_TXD"), uart6_csu_se_txd),
378 	SKY_PINFUNCTION(PINCTRL_PIN(24, "CLK_REQ1_L"), clk_req1),
379 	SKY_PINFUNCTION(PINCTRL_PIN(25, "CLK_REQ3_L"), clk_req3),
380 	SKY_PINFUNCTION(PINCTRL_PIN(26, "I2C5_SCL"), i2c5_scl),
381 	SKY_PINFUNCTION(PINCTRL_PIN(27, "I2C5_SDA"), i2c5_sda),
382 	SKY_PINFUNCTION(PINCTRL_PIN(28, "I2C6_SCL"), i2c6_scl),
383 	SKY_PINFUNCTION(PINCTRL_PIN(29, "I2C6_SDA"), i2c6_sda),
384 	SKY_PINFUNCTION(PINCTRL_PIN(30, "I2C0_CLK"), i2c0_scl),
385 	SKY_PINFUNCTION(PINCTRL_PIN(31, "I2C0_SDA"), i2c0_sda),
386 	SKY_PINFUNCTION(PINCTRL_PIN(32, "I2C1_CLK"), i2c1_scl),
387 	SKY_PINFUNCTION(PINCTRL_PIN(33, "I2C1_SDA"), i2c1_sda),
388 	SKY_PINFUNCTION(PINCTRL_PIN(34, "I2C2_SCL"), i2c2_scl),
389 	SKY_PINFUNCTION(PINCTRL_PIN(35, "I2C2_SDA"), i2c2_sda),
390 	SKY_PINFUNCTION(PINCTRL_PIN(36, "GPIO57"), gpio57),
391 	SKY_PINFUNCTION(PINCTRL_PIN(37, "I2C3_SCL"), i2c3_scl),
392 	SKY_PINFUNCTION(PINCTRL_PIN(38, "I2C3_SDA"), i2c3_sda),
393 	SKY_PINFUNCTION(PINCTRL_PIN(39, "GPIO60"), gpio60),
394 	SKY_PINFUNCTION(PINCTRL_PIN(40, "I2C4_SCL"), i2c4_scl),
395 	SKY_PINFUNCTION(PINCTRL_PIN(41, "I2C4_SDA"), i2c4_sda),
396 	SKY_PINFUNCTION(PINCTRL_PIN(42, "HDA_BITCLK"), hda_bitclk),
397 	SKY_PINFUNCTION(PINCTRL_PIN(43, "HDA_RST_L"), hda_rst),
398 	SKY_PINFUNCTION(PINCTRL_PIN(44, "HDA_SDIN0"), hda_sdin0),
399 	SKY_PINFUNCTION(PINCTRL_PIN(45, "HDA_SDOUT0"), hda_sdout0),
400 	SKY_PINFUNCTION(PINCTRL_PIN(46, "HDA_SYNC"), hda_sync),
401 	SKY_PINFUNCTION(PINCTRL_PIN(47, "HDA_SDIN1"), hda_sdin1),
402 	SKY_PINFUNCTION(PINCTRL_PIN(48, "HDA_SDOUT1"), hda_sdout1),
403 	SKY_PINFUNCTION(PINCTRL_PIN(49, "I2S1_MCLK"), i2s1_mclk),
404 	SKY_PINFUNCTION(PINCTRL_PIN(50, "I2S1_SCK"), i2s1_sck),
405 	SKY_PINFUNCTION(PINCTRL_PIN(51, "I2S1_WS"), i2s1_ws),
406 	SKY_PINFUNCTION(PINCTRL_PIN(52, "I2S1_DATA_IN"), i2s1_data_in),
407 	SKY_PINFUNCTION(PINCTRL_PIN(53, "I2S1_DATA_OUT"), i2s1_data_out),
408 	SKY_PINFUNCTION(PINCTRL_PIN(54, "I2S2_MCLK"), i2s2_mck),
409 	SKY_PINFUNCTION(PINCTRL_PIN(55, "I2S2_RSCK"), i2s2_rsck),
410 	SKY_PINFUNCTION(PINCTRL_PIN(56, "I2S2_RWS"), i2s2_rws),
411 	SKY_PINFUNCTION(PINCTRL_PIN(57, "I2S2_TSCK"), i2s2_tsck),
412 	SKY_PINFUNCTION(PINCTRL_PIN(58, "I2S2_TWS"), i2s2_tws),
413 	SKY_PINFUNCTION(PINCTRL_PIN(59, "I2S2_DATA_IN0"), i2s2_data_in0),
414 	SKY_PINFUNCTION(PINCTRL_PIN(60, "I2S2_DATA_IN1"), i2s2_data_in1),
415 	SKY_PINFUNCTION(PINCTRL_PIN(61, "I2S2_DATA_OUT0"), i2s2_data_out0),
416 	SKY_PINFUNCTION(PINCTRL_PIN(62, "I2S2_DATA_OUT1"), i2s2_data_out1),
417 	SKY_PINFUNCTION(PINCTRL_PIN(63, "I2S2_DATA_OUT2"), i2s2_data_out2),
418 	SKY_PINFUNCTION(PINCTRL_PIN(64, "I2S2_DATA_OUT3"), i2s2_data_out3),
419 	SKY_PINFUNCTION(PINCTRL_PIN(65, "I2S3_MCLK"), i2s3_mclk),
420 	SKY_PINFUNCTION(PINCTRL_PIN(66, "I2S3_RSCK"), i2s3_rsck),
421 	SKY_PINFUNCTION(PINCTRL_PIN(67, "I2S3_RWS"), i2s3_rws),
422 	SKY_PINFUNCTION(PINCTRL_PIN(68, "I2S3_TSCK"), i2s3_tsck),
423 	SKY_PINFUNCTION(PINCTRL_PIN(69, "I2S3_TWS"), i2s3_tws),
424 	SKY_PINFUNCTION(PINCTRL_PIN(70, "I2S3_DATA_IN0"), i2s3_data_in0),
425 	SKY_PINFUNCTION(PINCTRL_PIN(71, "I2S3_DATA_IN1"), i2s3_data_in1),
426 	SKY_PINFUNCTION(PINCTRL_PIN(72, "I2S3_DATA_OUT0"), i2s3_data_out0),
427 	SKY_PINFUNCTION(PINCTRL_PIN(73, "I2S3_DATA_OUT1"), i2s3_data_out1),
428 	SKY_PINFUNCTION(PINCTRL_PIN(74, "GPIO90"), gpio90),
429 	SKY_PINFUNCTION(PINCTRL_PIN(75, "GPIO91"), gpio91),
430 	SKY_PINFUNCTION(PINCTRL_PIN(76, "GPIO92"), gpio92),
431 	SKY_PINFUNCTION(PINCTRL_PIN(77, "GPIO93"), gpio93),
432 	SKY_PINFUNCTION(PINCTRL_PIN(78, "GPIO94"), gpio94),
433 	SKY_PINFUNCTION(PINCTRL_PIN(79, "UART0_TXD"), uart0_txd),
434 	SKY_PINFUNCTION(PINCTRL_PIN(80, "UART0_RXD"), uart0_rxd),
435 	SKY_PINFUNCTION(PINCTRL_PIN(81, "UART0_CTS"), uart0_cts),
436 	SKY_PINFUNCTION(PINCTRL_PIN(82, "UART0_RTS"), uart0_rts),
437 	SKY_PINFUNCTION(PINCTRL_PIN(83, "UART1_TXD"), uart1_txd),
438 	SKY_PINFUNCTION(PINCTRL_PIN(84, "UART1_RXD"), uart1_rxd),
439 	SKY_PINFUNCTION(PINCTRL_PIN(85, "UART1_CTS"), uart1_cts),
440 	SKY_PINFUNCTION(PINCTRL_PIN(86, "UART1_RTS"), uart1_rts),
441 	SKY_PINFUNCTION(PINCTRL_PIN(87, "UART2_TXD"), uart2_txd),
442 	SKY_PINFUNCTION(PINCTRL_PIN(88, "UART2_RXD"), uart2_rxd),
443 	SKY_PINFUNCTION(PINCTRL_PIN(89, "UART3_TXD"), uart3_txd),
444 	SKY_PINFUNCTION(PINCTRL_PIN(90, "UART3_RXD"), uart3_rxd),
445 	SKY_PINFUNCTION(PINCTRL_PIN(91, "UART3_CTS"), uart3_cts),
446 	SKY_PINFUNCTION(PINCTRL_PIN(92, "UART3_RTS"), uart3_rts),
447 	SKY_PINFUNCTION(PINCTRL_PIN(93, "UART4_CSU_PM_TXD"), uart4_csu_pm_txd),
448 	SKY_PINFUNCTION(PINCTRL_PIN(94, "UART4_CSU_PM_RXD"), uart4_csu_pm_rxd),
449 	SKY_PINFUNCTION(PINCTRL_PIN(95, "UART5_CSU_SE_TXD"), uart5_csu_se_txd),
450 	SKY_PINFUNCTION(PINCTRL_PIN(96, "UART5_CSU_SE_RXD"), uart5_csu_se_rxd),
451 	SKY_PINFUNCTION(PINCTRL_PIN(97, "UART6_CSU_SE_RXD"), uart6_csu_se_rxd),
452 	SKY_PINFUNCTION(PINCTRL_PIN(98, "CLK_REQ0_L"), clk_req0),
453 	SKY_PINFUNCTION(PINCTRL_PIN(99, "CLK_REQ2_L"), clk_req2),
454 	SKY_PINFUNCTION(PINCTRL_PIN(100, "CLK_REQ4_L"), clk_req4),
455 	SKY_PINFUNCTION(PINCTRL_PIN(101, "CSI0_MCLK0"), csi0_mclk0),
456 	SKY_PINFUNCTION(PINCTRL_PIN(102, "CSI0_MCLK1"), csi0_mclk1),
457 	SKY_PINFUNCTION(PINCTRL_PIN(103, "CSI1_MCLK0"), csi1_mclk0),
458 	SKY_PINFUNCTION(PINCTRL_PIN(104, "CSI1_MCLK1"), csi1_mclk1),
459 	SKY_PINFUNCTION(PINCTRL_PIN(105, "GPIO121"), gpio121),
460 	SKY_PINFUNCTION(PINCTRL_PIN(106, "GPIO122"), gpio122),
461 	SKY_PINFUNCTION(PINCTRL_PIN(107, "GPIO123"), gpio123),
462 	SKY_PINFUNCTION(PINCTRL_PIN(108, "GPIO124"), gpio124),
463 	SKY_PINFUNCTION(PINCTRL_PIN(109, "GPIO125"), gpio125),
464 	SKY_PINFUNCTION(PINCTRL_PIN(110, "GPIO126"), gpio126),
465 	SKY_PINFUNCTION(PINCTRL_PIN(111, "GPIO127"), gpio127),
466 	SKY_PINFUNCTION(PINCTRL_PIN(112, "GPIO128"), gpio128),
467 	SKY_PINFUNCTION(PINCTRL_PIN(113, "GPIO129"), gpio129),
468 	SKY_PINFUNCTION(PINCTRL_PIN(114, "GPIO130"), gpio130),
469 	SKY_PINFUNCTION(PINCTRL_PIN(115, "GPIO131"), gpio131),
470 	SKY_PINFUNCTION(PINCTRL_PIN(116, "GPIO132"), gpio132),
471 	SKY_PINFUNCTION(PINCTRL_PIN(117, "GPIO133"), gpio133),
472 	SKY_PINFUNCTION(PINCTRL_PIN(118, "GPIO134"), gpio134),
473 	SKY_PINFUNCTION(PINCTRL_PIN(119, "GPIO135"), gpio135),
474 	SKY_PINFUNCTION(PINCTRL_PIN(120, "GPIO136"), gpio136),
475 	SKY_PINFUNCTION(PINCTRL_PIN(121, "GPIO137"), gpio137),
476 	SKY_PINFUNCTION(PINCTRL_PIN(122, "GPIO138"), gpio138),
477 	SKY_PINFUNCTION(PINCTRL_PIN(123, "GPIO139"), gpio139),
478 	SKY_PINFUNCTION(PINCTRL_PIN(124, "GPIO140"), gpio140),
479 	SKY_PINFUNCTION(PINCTRL_PIN(125, "GPIO141"), gpio141),
480 	SKY_PINFUNCTION(PINCTRL_PIN(126, "GPIO142"), gpio142),
481 	SKY_PINFUNCTION(PINCTRL_PIN(127, "GPIO143"), gpio143),
482 	SKY_PINFUNCTION(PINCTRL_PIN(128, "GPIO144"), gpio144),
483 	SKY_PINFUNCTION(PINCTRL_PIN(129, "GPIO145"), gpio145),
484 	SKY_PINFUNCTION(PINCTRL_PIN(130, "GPIO146"), gpio146),
485 	SKY_PINFUNCTION(PINCTRL_PIN(131, "GPIO147"), gpio147),
486 	SKY_PINFUNCTION(PINCTRL_PIN(132, "GPIO148"), gpio148),
487 	SKY_PINFUNCTION(PINCTRL_PIN(133, "GPIO149"), gpio149),
488 	SKY_PINFUNCTION(PINCTRL_PIN(134, "GPIO150"), gpio150),
489 	SKY_PINFUNCTION(PINCTRL_PIN(135, "GPIO151"), gpio151),
490 	SKY_PINFUNCTION(PINCTRL_PIN(136, "GPIO152"), gpio152),
491 	SKY_PINFUNCTION(PINCTRL_PIN(137, "GPIO153"), gpio153),
492 };
493 
494 static const struct sky1_pinctrl_soc_info sky1_pinctrl_s5_info = {
495 	.pins = sky1_pinctrl_s5_pads,
496 	.npins = ARRAY_SIZE(sky1_pinctrl_s5_pads),
497 };
498 
499 static const struct sky1_pinctrl_soc_info sky1_pinctrl_info = {
500 	.pins = sky1_pinctrl_pads,
501 	.npins = ARRAY_SIZE(sky1_pinctrl_pads),
502 };
503 
504 static const struct of_device_id sky1_pinctrl_of_match[] = {
505 	{ .compatible = "cix,sky1-pinctrl-s5", .data = &sky1_pinctrl_s5_info, },
506 	{ .compatible = "cix,sky1-pinctrl", .data = &sky1_pinctrl_info, },
507 	{ /* sentinel */ }
508 };
509 MODULE_DEVICE_TABLE(of, sky1_pinctrl_of_match);
510 
511 static int __maybe_unused sky1_pinctrl_suspend(struct device *dev)
512 {
513 	struct sky1_pinctrl *spctl = dev_get_drvdata(dev);
514 
515 	return pinctrl_force_sleep(spctl->pctl);
516 }
517 
518 static int __maybe_unused sky1_pinctrl_resume(struct device *dev)
519 {
520 	struct sky1_pinctrl *spctl = dev_get_drvdata(dev);
521 
522 	return pinctrl_force_default(spctl->pctl);
523 }
524 
525 const struct dev_pm_ops sky1_pinctrl_pm_ops = {
526 	SET_LATE_SYSTEM_SLEEP_PM_OPS(sky1_pinctrl_suspend,
527 					sky1_pinctrl_resume)
528 };
529 EXPORT_SYMBOL_GPL(sky1_pinctrl_pm_ops);
530 
531 static int sky1_pinctrl_probe(struct platform_device *pdev)
532 {
533 	const struct sky1_pinctrl_soc_info *pinctrl_info;
534 
535 	pinctrl_info = device_get_match_data(&pdev->dev);
536 	if (!pinctrl_info)
537 		return -ENODEV;
538 
539 	return sky1_base_pinctrl_probe(pdev, pinctrl_info);
540 }
541 
542 static struct platform_driver sky1_pinctrl_driver = {
543 	.driver = {
544 		.name = "sky1-pinctrl",
545 		.of_match_table = sky1_pinctrl_of_match,
546 		.pm = &sky1_pinctrl_pm_ops,
547 	},
548 	.probe = sky1_pinctrl_probe,
549 };
550 
551 static int __init sky1_pinctrl_init(void)
552 {
553 	return platform_driver_register(&sky1_pinctrl_driver);
554 }
555 arch_initcall(sky1_pinctrl_init);
556 
557 MODULE_AUTHOR("Jerry Zhu <Jerry.Zhu@cixtech.com>");
558 MODULE_DESCRIPTION("Cix Sky1 pinctrl driver");
559 MODULE_LICENSE("GPL");
560