xref: /linux/drivers/pinctrl/cirrus/pinctrl-cs47l35.c (revision 24168c5e6dfbdd5b414f048f47f75d64533296ca)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Pinctrl for Cirrus Logic CS47L35
4  *
5  * Copyright (C) 2016-2017 Cirrus Logic
6  */
7 
8 #include <linux/err.h>
9 #include <linux/mfd/madera/core.h>
10 
11 #include "pinctrl-madera.h"
12 
13 /*
14  * The alt func groups are the most commonly used functions we place these at
15  * the lower function indexes for convenience, and the less commonly used gpio
16  * functions at higher indexes.
17  *
18  * To stay consistent with the datasheet the function names are the same as
19  * the group names for that function's pins
20  *
21  * Note - all 1 less than in datasheet because these are zero-indexed
22  */
23 static const unsigned int cs47l35_aif3_pins[] = { 0, 1, 2, 3 };
24 static const unsigned int cs47l35_spk_pins[] = { 4, 5 };
25 static const unsigned int cs47l35_aif1_pins[] = { 7, 8, 9, 10 };
26 static const unsigned int cs47l35_aif2_pins[] = { 11, 12, 13, 14 };
27 static const unsigned int cs47l35_mif1_pins[] = { 6, 15 };
28 
29 static const struct madera_pin_groups cs47l35_pin_groups[] = {
30 	{ "aif1", cs47l35_aif1_pins, ARRAY_SIZE(cs47l35_aif1_pins) },
31 	{ "aif2", cs47l35_aif2_pins, ARRAY_SIZE(cs47l35_aif2_pins) },
32 	{ "aif3", cs47l35_aif3_pins, ARRAY_SIZE(cs47l35_aif3_pins) },
33 	{ "mif1", cs47l35_mif1_pins, ARRAY_SIZE(cs47l35_mif1_pins) },
34 	{ "pdmspk1", cs47l35_spk_pins, ARRAY_SIZE(cs47l35_spk_pins) },
35 };
36 
37 const struct madera_pin_chip cs47l35_pin_chip = {
38 	.n_pins = CS47L35_NUM_GPIOS,
39 	.pin_groups = cs47l35_pin_groups,
40 	.n_pin_groups = ARRAY_SIZE(cs47l35_pin_groups),
41 };
42