xref: /linux/drivers/pinctrl/Kconfig (revision f4e66983293f78e177bb210d19a46f083f5e8197)
12744e8afSLinus Walleij#
22744e8afSLinus Walleij# PINCTRL infrastructure and drivers
32744e8afSLinus Walleij#
42744e8afSLinus Walleij
545f034efSLinus Walleijconfig PINCTRL
645f034efSLinus Walleij	bool
72744e8afSLinus Walleij	depends on EXPERIMENTAL
82744e8afSLinus Walleij
92744e8afSLinus Walleijif PINCTRL
102744e8afSLinus Walleij
1145f034efSLinus Walleijmenu "Pin controllers"
1245f034efSLinus Walleij	depends on PINCTRL
1345f034efSLinus Walleij
142744e8afSLinus Walleijconfig PINMUX
15ae6b4d85SLinus Walleij	bool "Support pin multiplexing controllers"
16ae6b4d85SLinus Walleij
17ae6b4d85SLinus Walleijconfig PINCONF
18ae6b4d85SLinus Walleij	bool "Support pin configuration controllers"
192744e8afSLinus Walleij
202744e8afSLinus Walleijconfig DEBUG_PINCTRL
212744e8afSLinus Walleij	bool "Debug PINCTRL calls"
222744e8afSLinus Walleij	depends on DEBUG_KERNEL
232744e8afSLinus Walleij	help
242744e8afSLinus Walleij	  Say Y here to add some extra checks and diagnostics to PINCTRL calls.
252744e8afSLinus Walleij
26*f4e66983SHaojian Zhuangconfig PINCTRL_PXA3xx
27*f4e66983SHaojian Zhuang	bool
28*f4e66983SHaojian Zhuang	select PINMUX
29*f4e66983SHaojian Zhuang
30*f4e66983SHaojian Zhuangconfig PINCTRL_MMP2
31*f4e66983SHaojian Zhuang	bool "MMP2 pin controller driver"
32*f4e66983SHaojian Zhuang	depends on ARCH_MMP
33*f4e66983SHaojian Zhuang	select PINCTRL_PXA3xx
34*f4e66983SHaojian Zhuang	select PINCONF
35*f4e66983SHaojian Zhuang
36*f4e66983SHaojian Zhuangconfig PINCTRL_PXA168
37*f4e66983SHaojian Zhuang	bool "PXA168 pin controller driver"
38*f4e66983SHaojian Zhuang	depends on ARCH_MMP
39*f4e66983SHaojian Zhuang	select PINCTRL_PXA3xx
40*f4e66983SHaojian Zhuang	select PINCONF
41*f4e66983SHaojian Zhuang
42*f4e66983SHaojian Zhuangconfig PINCTRL_PXA910
43*f4e66983SHaojian Zhuang	bool "PXA910 pin controller driver"
44*f4e66983SHaojian Zhuang	depends on ARCH_MMP
45*f4e66983SHaojian Zhuang	select PINCTRL_PXA3xx
46*f4e66983SHaojian Zhuang	select PINCONF
47*f4e66983SHaojian Zhuang
483bece55aSLinus Walleijconfig PINCTRL_SIRF
493bece55aSLinus Walleij	bool "CSR SiRFprimaII pin controller driver"
50393daa81SRongjun Ying	depends on ARCH_PRIMA2
51393daa81SRongjun Ying	select PINMUX
52393daa81SRongjun Ying
533bece55aSLinus Walleijconfig PINCTRL_U300
543bece55aSLinus Walleij	bool "U300 pin controller driver"
5598da3529SLinus Walleij	depends on ARCH_U300
5698da3529SLinus Walleij	select PINMUX
5745f034efSLinus Walleij
58ca402d37SLinus Walleijconfig PINCTRL_COH901
59ca402d37SLinus Walleij	bool "ST-Ericsson U300 COH 901 335/571 GPIO"
60b4e3ac74SLinus Walleij	depends on GPIOLIB && ARCH_U300 && PINMUX_U300
61ca402d37SLinus Walleij	help
62ca402d37SLinus Walleij	  Say yes here to support GPIO interface on ST-Ericsson U300.
63ca402d37SLinus Walleij	  The names of the two IP block variants supported are
64ca402d37SLinus Walleij	  COH 901 335 and COH 901 571/3. They contain 3, 5 or 7
65ca402d37SLinus Walleij	  ports of 8 GPIO pins each.
66ca402d37SLinus Walleij
6745f034efSLinus Walleijendmenu
6898da3529SLinus Walleij
692744e8afSLinus Walleijendif
70