1*4a33bea0SAnurag Kumar Vulisha# SPDX-License-Identifier: GPL-2.0-only 2*4a33bea0SAnurag Kumar Vulisha 3*4a33bea0SAnurag Kumar Vulisha# 4*4a33bea0SAnurag Kumar Vulisha# PHY drivers for Xilinx platforms 5*4a33bea0SAnurag Kumar Vulisha# 6*4a33bea0SAnurag Kumar Vulisha 7*4a33bea0SAnurag Kumar Vulishaconfig PHY_XILINX_ZYNQMP 8*4a33bea0SAnurag Kumar Vulisha tristate "Xilinx ZynqMP PHY driver" 9*4a33bea0SAnurag Kumar Vulisha depends on ARCH_ZYNQMP || COMPILE_TEST 10*4a33bea0SAnurag Kumar Vulisha select GENERIC_PHY 11*4a33bea0SAnurag Kumar Vulisha help 12*4a33bea0SAnurag Kumar Vulisha Enable this to support ZynqMP High Speed Gigabit Transceiver 13*4a33bea0SAnurag Kumar Vulisha that is part of ZynqMP SoC. 14