xref: /linux/drivers/phy/sophgo/phy-cv1800-usb2.c (revision d30c1683aaecb93d2ab95685dc4300a33d3cea7a)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (C) 2025 Inochi Amaoto <inochiama@outlook.com>
4  */
5 
6 #include <linux/clk.h>
7 #include <linux/bitfield.h>
8 #include <linux/debugfs.h>
9 #include <linux/kernel.h>
10 #include <linux/mfd/syscon.h>
11 #include <linux/module.h>
12 #include <linux/of.h>
13 #include <linux/of_address.h>
14 #include <linux/platform_device.h>
15 #include <linux/phy/phy.h>
16 #include <linux/regmap.h>
17 #include <linux/spinlock.h>
18 
19 #define REG_USB_PHY_CTRL		0x048
20 
21 #define PHY_VBUS_POWER_EN		BIT(0)
22 #define PHY_VBUS_POWER			BIT(1)
23 #define PHY_ID_OVERWRITE_EN		BIT(6)
24 #define PHY_ID_OVERWRITE_MODE		BIT(7)
25 #define PHY_ID_OVERWRITE_MODE_HOST	FIELD_PREP(BIT(7), 0)
26 #define PHY_ID_OVERWRITE_MODE_DEVICE	FIELD_PREP(BIT(7), 1)
27 
28 #define PHY_APP_CLK_RATE		125000000
29 #define PHY_LPM_CLK_RATE		12000000
30 #define PHY_STB_CLK_RATE		333334
31 
32 struct cv1800_usb_phy {
33 	struct phy	*phy;
34 	struct regmap	*syscon;
35 	spinlock_t	lock;
36 	struct clk	*usb_app_clk;
37 	struct clk	*usb_lpm_clk;
38 	struct clk	*usb_stb_clk;
39 	bool		support_otg;
40 };
41 
42 static int cv1800_usb_phy_set_mode(struct phy *_phy,
43 				   enum phy_mode mode, int submode)
44 {
45 	struct cv1800_usb_phy *phy = phy_get_drvdata(_phy);
46 	unsigned int regval = 0;
47 	int ret;
48 
49 	dev_info(&phy->phy->dev, "set mode %d", (int)mode);
50 
51 	switch (mode) {
52 	case PHY_MODE_USB_DEVICE:
53 		regval = PHY_ID_OVERWRITE_EN | PHY_ID_OVERWRITE_MODE_DEVICE;
54 		regmap_clear_bits(phy->syscon, REG_USB_PHY_CTRL, PHY_VBUS_POWER);
55 		break;
56 	case PHY_MODE_USB_HOST:
57 		regval = PHY_ID_OVERWRITE_EN | PHY_ID_OVERWRITE_MODE_HOST;
58 		regmap_set_bits(phy->syscon, REG_USB_PHY_CTRL, PHY_VBUS_POWER);
59 		break;
60 	case PHY_MODE_USB_OTG:
61 		if (!phy->support_otg)
62 			return 0;
63 
64 		ret = regmap_read(phy->syscon, REG_USB_PHY_CTRL, &regval);
65 		if (ret)
66 			return ret;
67 
68 		regval = FIELD_GET(PHY_ID_OVERWRITE_MODE, regval);
69 		break;
70 	default:
71 		return -EINVAL;
72 	}
73 
74 	return regmap_update_bits(phy->syscon, REG_USB_PHY_CTRL,
75 				  PHY_ID_OVERWRITE_EN | PHY_ID_OVERWRITE_MODE,
76 				  regval);
77 }
78 
79 static int cv1800_usb_phy_set_clock(struct cv1800_usb_phy *phy)
80 {
81 	int ret;
82 
83 	ret = clk_set_rate(phy->usb_app_clk, PHY_APP_CLK_RATE);
84 	if (ret)
85 		return ret;
86 
87 	ret = clk_set_rate(phy->usb_lpm_clk, PHY_LPM_CLK_RATE);
88 	if (ret)
89 		return ret;
90 
91 	return clk_set_rate(phy->usb_stb_clk, PHY_STB_CLK_RATE);
92 }
93 
94 static const struct phy_ops cv1800_usb_phy_ops = {
95 	.set_mode	= cv1800_usb_phy_set_mode,
96 	.owner		= THIS_MODULE,
97 };
98 
99 static int cv1800_usb_phy_probe(struct platform_device *pdev)
100 {
101 	struct device *dev = &pdev->dev;
102 	struct device *parent = dev->parent;
103 	struct cv1800_usb_phy *phy;
104 	struct phy_provider *phy_provider;
105 	int ret;
106 
107 	if (!parent)
108 		return -ENODEV;
109 
110 	phy = devm_kmalloc(dev, sizeof(*phy), GFP_KERNEL);
111 	if (!phy)
112 		return -ENOMEM;
113 
114 	phy->syscon = syscon_node_to_regmap(parent->of_node);
115 	if (IS_ERR_OR_NULL(phy->syscon))
116 		return -ENODEV;
117 
118 	phy->support_otg = false;
119 
120 	spin_lock_init(&phy->lock);
121 
122 	phy->usb_app_clk = devm_clk_get_enabled(dev, "app");
123 	if (IS_ERR(phy->usb_app_clk))
124 		return dev_err_probe(dev, PTR_ERR(phy->usb_app_clk),
125 			"Failed to get app clock\n");
126 
127 	phy->usb_lpm_clk = devm_clk_get_enabled(dev, "lpm");
128 	if (IS_ERR(phy->usb_lpm_clk))
129 		return dev_err_probe(dev, PTR_ERR(phy->usb_lpm_clk),
130 			"Failed to get lpm clock\n");
131 
132 	phy->usb_stb_clk = devm_clk_get_enabled(dev, "stb");
133 	if (IS_ERR(phy->usb_stb_clk))
134 		return dev_err_probe(dev, PTR_ERR(phy->usb_stb_clk),
135 			"Failed to get stb clock\n");
136 
137 	phy->phy = devm_phy_create(dev, NULL, &cv1800_usb_phy_ops);
138 	if (IS_ERR(phy->phy))
139 		return dev_err_probe(dev, PTR_ERR(phy->phy),
140 			"Failed to create phy\n");
141 
142 	ret = cv1800_usb_phy_set_clock(phy);
143 	if (ret)
144 		return ret;
145 
146 	phy_set_drvdata(phy->phy, phy);
147 	phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
148 
149 	return PTR_ERR_OR_ZERO(phy_provider);
150 }
151 
152 static const struct of_device_id cv1800_usb_phy_ids[] = {
153 	{ .compatible = "sophgo,cv1800b-usb2-phy" },
154 	{ },
155 };
156 MODULE_DEVICE_TABLE(of, cv1800_usb_phy_ids);
157 
158 static struct platform_driver cv1800_usb_phy_driver = {
159 	.probe = cv1800_usb_phy_probe,
160 	.driver = {
161 		.name = "cv1800-usb2-phy",
162 		.of_match_table = cv1800_usb_phy_ids,
163 	 },
164 };
165 module_platform_driver(cv1800_usb_phy_driver);
166 
167 MODULE_AUTHOR("Inochi Amaoto <inochiama@outlook.com>");
168 MODULE_DESCRIPTION("CV1800/SG2000 SoC USB 2.0 PHY driver");
169 MODULE_LICENSE("GPL");
170