15ab43d0fSKunihiko Hayashi // SPDX-License-Identifier: GPL-2.0 25ab43d0fSKunihiko Hayashi /* 35ab43d0fSKunihiko Hayashi * phy-uniphier-usb3ss.c - SS-PHY driver for Socionext UniPhier USB3 controller 45ab43d0fSKunihiko Hayashi * Copyright 2015-2018 Socionext Inc. 55ab43d0fSKunihiko Hayashi * Author: 65ab43d0fSKunihiko Hayashi * Kunihiko Hayashi <hayashi.kunihiko@socionext.com> 75ab43d0fSKunihiko Hayashi * Contributors: 85ab43d0fSKunihiko Hayashi * Motoya Tanigawa <tanigawa.motoya@socionext.com> 95ab43d0fSKunihiko Hayashi * Masami Hiramatsu <masami.hiramatsu@linaro.org> 105ab43d0fSKunihiko Hayashi */ 115ab43d0fSKunihiko Hayashi 125ab43d0fSKunihiko Hayashi #include <linux/bitfield.h> 135ab43d0fSKunihiko Hayashi #include <linux/bitops.h> 145ab43d0fSKunihiko Hayashi #include <linux/clk.h> 155ab43d0fSKunihiko Hayashi #include <linux/io.h> 165ab43d0fSKunihiko Hayashi #include <linux/module.h> 175ab43d0fSKunihiko Hayashi #include <linux/of.h> 185ab43d0fSKunihiko Hayashi #include <linux/of_platform.h> 195ab43d0fSKunihiko Hayashi #include <linux/phy/phy.h> 205ab43d0fSKunihiko Hayashi #include <linux/platform_device.h> 215ab43d0fSKunihiko Hayashi #include <linux/regulator/consumer.h> 225ab43d0fSKunihiko Hayashi #include <linux/reset.h> 235ab43d0fSKunihiko Hayashi 245ab43d0fSKunihiko Hayashi #define SSPHY_TESTI 0x0 255ab43d0fSKunihiko Hayashi #define SSPHY_TESTO 0x4 265ab43d0fSKunihiko Hayashi #define TESTI_DAT_MASK GENMASK(13, 6) 275ab43d0fSKunihiko Hayashi #define TESTI_ADR_MASK GENMASK(5, 1) 285ab43d0fSKunihiko Hayashi #define TESTI_WR_EN BIT(0) 295ab43d0fSKunihiko Hayashi 305ab43d0fSKunihiko Hayashi #define PHY_F(regno, msb, lsb) { (regno), (msb), (lsb) } 315ab43d0fSKunihiko Hayashi 325ab43d0fSKunihiko Hayashi #define CDR_CPD_TRIM PHY_F(7, 3, 0) /* RxPLL charge pump current */ 335ab43d0fSKunihiko Hayashi #define CDR_CPF_TRIM PHY_F(8, 3, 0) /* RxPLL charge pump current 2 */ 345ab43d0fSKunihiko Hayashi #define TX_PLL_TRIM PHY_F(9, 3, 0) /* TxPLL charge pump current */ 355ab43d0fSKunihiko Hayashi #define BGAP_TRIM PHY_F(11, 3, 0) /* Bandgap voltage */ 365ab43d0fSKunihiko Hayashi #define CDR_TRIM PHY_F(13, 6, 5) /* Clock Data Recovery setting */ 375ab43d0fSKunihiko Hayashi #define VCO_CTRL PHY_F(26, 7, 4) /* VCO control */ 385ab43d0fSKunihiko Hayashi #define VCOPLL_CTRL PHY_F(27, 2, 0) /* TxPLL VCO tuning */ 395ab43d0fSKunihiko Hayashi #define VCOPLL_CM PHY_F(28, 1, 0) /* TxPLL voltage */ 405ab43d0fSKunihiko Hayashi 415ab43d0fSKunihiko Hayashi #define MAX_PHY_PARAMS 7 425ab43d0fSKunihiko Hayashi 435ab43d0fSKunihiko Hayashi struct uniphier_u3ssphy_param { 445ab43d0fSKunihiko Hayashi struct { 455ab43d0fSKunihiko Hayashi int reg_no; 465ab43d0fSKunihiko Hayashi int msb; 475ab43d0fSKunihiko Hayashi int lsb; 485ab43d0fSKunihiko Hayashi } field; 495ab43d0fSKunihiko Hayashi u8 value; 505ab43d0fSKunihiko Hayashi }; 515ab43d0fSKunihiko Hayashi 525ab43d0fSKunihiko Hayashi struct uniphier_u3ssphy_priv { 535ab43d0fSKunihiko Hayashi struct device *dev; 545ab43d0fSKunihiko Hayashi void __iomem *base; 555ab43d0fSKunihiko Hayashi struct clk *clk, *clk_ext, *clk_parent, *clk_parent_gio; 565ab43d0fSKunihiko Hayashi struct reset_control *rst, *rst_parent, *rst_parent_gio; 575ab43d0fSKunihiko Hayashi struct regulator *vbus; 585ab43d0fSKunihiko Hayashi const struct uniphier_u3ssphy_soc_data *data; 595ab43d0fSKunihiko Hayashi }; 605ab43d0fSKunihiko Hayashi 615ab43d0fSKunihiko Hayashi struct uniphier_u3ssphy_soc_data { 625ab43d0fSKunihiko Hayashi bool is_legacy; 635ab43d0fSKunihiko Hayashi int nparams; 645ab43d0fSKunihiko Hayashi const struct uniphier_u3ssphy_param param[MAX_PHY_PARAMS]; 655ab43d0fSKunihiko Hayashi }; 665ab43d0fSKunihiko Hayashi 675ab43d0fSKunihiko Hayashi static void uniphier_u3ssphy_testio_write(struct uniphier_u3ssphy_priv *priv, 685ab43d0fSKunihiko Hayashi u32 data) 695ab43d0fSKunihiko Hayashi { 705ab43d0fSKunihiko Hayashi /* need to read TESTO twice after accessing TESTI */ 715ab43d0fSKunihiko Hayashi writel(data, priv->base + SSPHY_TESTI); 725ab43d0fSKunihiko Hayashi readl(priv->base + SSPHY_TESTO); 735ab43d0fSKunihiko Hayashi readl(priv->base + SSPHY_TESTO); 745ab43d0fSKunihiko Hayashi } 755ab43d0fSKunihiko Hayashi 765ab43d0fSKunihiko Hayashi static void uniphier_u3ssphy_set_param(struct uniphier_u3ssphy_priv *priv, 775ab43d0fSKunihiko Hayashi const struct uniphier_u3ssphy_param *p) 785ab43d0fSKunihiko Hayashi { 795ab43d0fSKunihiko Hayashi u32 val; 805ab43d0fSKunihiko Hayashi u8 field_mask = GENMASK(p->field.msb, p->field.lsb); 815ab43d0fSKunihiko Hayashi u8 data; 825ab43d0fSKunihiko Hayashi 835ab43d0fSKunihiko Hayashi /* read previous data */ 845ab43d0fSKunihiko Hayashi val = FIELD_PREP(TESTI_DAT_MASK, 1); 855ab43d0fSKunihiko Hayashi val |= FIELD_PREP(TESTI_ADR_MASK, p->field.reg_no); 865ab43d0fSKunihiko Hayashi uniphier_u3ssphy_testio_write(priv, val); 875ab43d0fSKunihiko Hayashi val = readl(priv->base + SSPHY_TESTO); 885ab43d0fSKunihiko Hayashi 895ab43d0fSKunihiko Hayashi /* update value */ 905ab43d0fSKunihiko Hayashi val &= ~FIELD_PREP(TESTI_DAT_MASK, field_mask); 915ab43d0fSKunihiko Hayashi data = field_mask & (p->value << p->field.lsb); 925ab43d0fSKunihiko Hayashi val = FIELD_PREP(TESTI_DAT_MASK, data); 935ab43d0fSKunihiko Hayashi val |= FIELD_PREP(TESTI_ADR_MASK, p->field.reg_no); 945ab43d0fSKunihiko Hayashi uniphier_u3ssphy_testio_write(priv, val); 955ab43d0fSKunihiko Hayashi uniphier_u3ssphy_testio_write(priv, val | TESTI_WR_EN); 965ab43d0fSKunihiko Hayashi uniphier_u3ssphy_testio_write(priv, val); 975ab43d0fSKunihiko Hayashi 985ab43d0fSKunihiko Hayashi /* read current data as dummy */ 995ab43d0fSKunihiko Hayashi val = FIELD_PREP(TESTI_DAT_MASK, 1); 1005ab43d0fSKunihiko Hayashi val |= FIELD_PREP(TESTI_ADR_MASK, p->field.reg_no); 1015ab43d0fSKunihiko Hayashi uniphier_u3ssphy_testio_write(priv, val); 1025ab43d0fSKunihiko Hayashi readl(priv->base + SSPHY_TESTO); 1035ab43d0fSKunihiko Hayashi } 1045ab43d0fSKunihiko Hayashi 1055ab43d0fSKunihiko Hayashi static int uniphier_u3ssphy_power_on(struct phy *phy) 1065ab43d0fSKunihiko Hayashi { 1075ab43d0fSKunihiko Hayashi struct uniphier_u3ssphy_priv *priv = phy_get_drvdata(phy); 1085ab43d0fSKunihiko Hayashi int ret; 1095ab43d0fSKunihiko Hayashi 1105ab43d0fSKunihiko Hayashi ret = clk_prepare_enable(priv->clk_ext); 1115ab43d0fSKunihiko Hayashi if (ret) 1125ab43d0fSKunihiko Hayashi return ret; 1135ab43d0fSKunihiko Hayashi 1145ab43d0fSKunihiko Hayashi ret = clk_prepare_enable(priv->clk); 1155ab43d0fSKunihiko Hayashi if (ret) 1165ab43d0fSKunihiko Hayashi goto out_clk_ext_disable; 1175ab43d0fSKunihiko Hayashi 1185ab43d0fSKunihiko Hayashi ret = reset_control_deassert(priv->rst); 1195ab43d0fSKunihiko Hayashi if (ret) 1205ab43d0fSKunihiko Hayashi goto out_clk_disable; 1215ab43d0fSKunihiko Hayashi 1225ab43d0fSKunihiko Hayashi if (priv->vbus) { 1235ab43d0fSKunihiko Hayashi ret = regulator_enable(priv->vbus); 1245ab43d0fSKunihiko Hayashi if (ret) 1255ab43d0fSKunihiko Hayashi goto out_rst_assert; 1265ab43d0fSKunihiko Hayashi } 1275ab43d0fSKunihiko Hayashi 1285ab43d0fSKunihiko Hayashi return 0; 1295ab43d0fSKunihiko Hayashi 1305ab43d0fSKunihiko Hayashi out_rst_assert: 1315ab43d0fSKunihiko Hayashi reset_control_assert(priv->rst); 1325ab43d0fSKunihiko Hayashi out_clk_disable: 1335ab43d0fSKunihiko Hayashi clk_disable_unprepare(priv->clk); 1345ab43d0fSKunihiko Hayashi out_clk_ext_disable: 1355ab43d0fSKunihiko Hayashi clk_disable_unprepare(priv->clk_ext); 1365ab43d0fSKunihiko Hayashi 1375ab43d0fSKunihiko Hayashi return ret; 1385ab43d0fSKunihiko Hayashi } 1395ab43d0fSKunihiko Hayashi 1405ab43d0fSKunihiko Hayashi static int uniphier_u3ssphy_power_off(struct phy *phy) 1415ab43d0fSKunihiko Hayashi { 1425ab43d0fSKunihiko Hayashi struct uniphier_u3ssphy_priv *priv = phy_get_drvdata(phy); 1435ab43d0fSKunihiko Hayashi 1445ab43d0fSKunihiko Hayashi if (priv->vbus) 1455ab43d0fSKunihiko Hayashi regulator_disable(priv->vbus); 1465ab43d0fSKunihiko Hayashi 1475ab43d0fSKunihiko Hayashi reset_control_assert(priv->rst); 1485ab43d0fSKunihiko Hayashi clk_disable_unprepare(priv->clk); 1495ab43d0fSKunihiko Hayashi clk_disable_unprepare(priv->clk_ext); 1505ab43d0fSKunihiko Hayashi 1515ab43d0fSKunihiko Hayashi return 0; 1525ab43d0fSKunihiko Hayashi } 1535ab43d0fSKunihiko Hayashi 1545ab43d0fSKunihiko Hayashi static int uniphier_u3ssphy_init(struct phy *phy) 1555ab43d0fSKunihiko Hayashi { 1565ab43d0fSKunihiko Hayashi struct uniphier_u3ssphy_priv *priv = phy_get_drvdata(phy); 1575ab43d0fSKunihiko Hayashi int i, ret; 1585ab43d0fSKunihiko Hayashi 1595ab43d0fSKunihiko Hayashi ret = clk_prepare_enable(priv->clk_parent); 1605ab43d0fSKunihiko Hayashi if (ret) 1615ab43d0fSKunihiko Hayashi return ret; 1625ab43d0fSKunihiko Hayashi 1635ab43d0fSKunihiko Hayashi ret = clk_prepare_enable(priv->clk_parent_gio); 1645ab43d0fSKunihiko Hayashi if (ret) 1655ab43d0fSKunihiko Hayashi goto out_clk_disable; 1665ab43d0fSKunihiko Hayashi 1675ab43d0fSKunihiko Hayashi ret = reset_control_deassert(priv->rst_parent); 1685ab43d0fSKunihiko Hayashi if (ret) 1695ab43d0fSKunihiko Hayashi goto out_clk_gio_disable; 1705ab43d0fSKunihiko Hayashi 1715ab43d0fSKunihiko Hayashi ret = reset_control_deassert(priv->rst_parent_gio); 1725ab43d0fSKunihiko Hayashi if (ret) 1735ab43d0fSKunihiko Hayashi goto out_rst_assert; 1745ab43d0fSKunihiko Hayashi 1755ab43d0fSKunihiko Hayashi if (priv->data->is_legacy) 1765ab43d0fSKunihiko Hayashi return 0; 1775ab43d0fSKunihiko Hayashi 1785ab43d0fSKunihiko Hayashi for (i = 0; i < priv->data->nparams; i++) 1795ab43d0fSKunihiko Hayashi uniphier_u3ssphy_set_param(priv, &priv->data->param[i]); 1805ab43d0fSKunihiko Hayashi 1815ab43d0fSKunihiko Hayashi return 0; 1825ab43d0fSKunihiko Hayashi 1835ab43d0fSKunihiko Hayashi out_rst_assert: 1845ab43d0fSKunihiko Hayashi reset_control_assert(priv->rst_parent); 1855ab43d0fSKunihiko Hayashi out_clk_gio_disable: 1865ab43d0fSKunihiko Hayashi clk_disable_unprepare(priv->clk_parent_gio); 1875ab43d0fSKunihiko Hayashi out_clk_disable: 1885ab43d0fSKunihiko Hayashi clk_disable_unprepare(priv->clk_parent); 1895ab43d0fSKunihiko Hayashi 1905ab43d0fSKunihiko Hayashi return ret; 1915ab43d0fSKunihiko Hayashi } 1925ab43d0fSKunihiko Hayashi 1935ab43d0fSKunihiko Hayashi static int uniphier_u3ssphy_exit(struct phy *phy) 1945ab43d0fSKunihiko Hayashi { 1955ab43d0fSKunihiko Hayashi struct uniphier_u3ssphy_priv *priv = phy_get_drvdata(phy); 1965ab43d0fSKunihiko Hayashi 1975ab43d0fSKunihiko Hayashi reset_control_assert(priv->rst_parent_gio); 1985ab43d0fSKunihiko Hayashi reset_control_assert(priv->rst_parent); 1995ab43d0fSKunihiko Hayashi clk_disable_unprepare(priv->clk_parent_gio); 2005ab43d0fSKunihiko Hayashi clk_disable_unprepare(priv->clk_parent); 2015ab43d0fSKunihiko Hayashi 2025ab43d0fSKunihiko Hayashi return 0; 2035ab43d0fSKunihiko Hayashi } 2045ab43d0fSKunihiko Hayashi 2055ab43d0fSKunihiko Hayashi static const struct phy_ops uniphier_u3ssphy_ops = { 2065ab43d0fSKunihiko Hayashi .init = uniphier_u3ssphy_init, 2075ab43d0fSKunihiko Hayashi .exit = uniphier_u3ssphy_exit, 2085ab43d0fSKunihiko Hayashi .power_on = uniphier_u3ssphy_power_on, 2095ab43d0fSKunihiko Hayashi .power_off = uniphier_u3ssphy_power_off, 2105ab43d0fSKunihiko Hayashi .owner = THIS_MODULE, 2115ab43d0fSKunihiko Hayashi }; 2125ab43d0fSKunihiko Hayashi 2135ab43d0fSKunihiko Hayashi static int uniphier_u3ssphy_probe(struct platform_device *pdev) 2145ab43d0fSKunihiko Hayashi { 2155ab43d0fSKunihiko Hayashi struct device *dev = &pdev->dev; 2165ab43d0fSKunihiko Hayashi struct uniphier_u3ssphy_priv *priv; 2175ab43d0fSKunihiko Hayashi struct phy_provider *phy_provider; 2185ab43d0fSKunihiko Hayashi struct phy *phy; 2195ab43d0fSKunihiko Hayashi 2205ab43d0fSKunihiko Hayashi priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); 2215ab43d0fSKunihiko Hayashi if (!priv) 2225ab43d0fSKunihiko Hayashi return -ENOMEM; 2235ab43d0fSKunihiko Hayashi 2245ab43d0fSKunihiko Hayashi priv->dev = dev; 2255ab43d0fSKunihiko Hayashi priv->data = of_device_get_match_data(dev); 2265ab43d0fSKunihiko Hayashi if (WARN_ON(!priv->data || 2275ab43d0fSKunihiko Hayashi priv->data->nparams > MAX_PHY_PARAMS)) 2285ab43d0fSKunihiko Hayashi return -EINVAL; 2295ab43d0fSKunihiko Hayashi 23040d76346SKunihiko Hayashi priv->base = devm_platform_ioremap_resource(pdev, 0); 2315ab43d0fSKunihiko Hayashi if (IS_ERR(priv->base)) 2325ab43d0fSKunihiko Hayashi return PTR_ERR(priv->base); 2335ab43d0fSKunihiko Hayashi 2345ab43d0fSKunihiko Hayashi if (!priv->data->is_legacy) { 2355ab43d0fSKunihiko Hayashi priv->clk = devm_clk_get(dev, "phy"); 2365ab43d0fSKunihiko Hayashi if (IS_ERR(priv->clk)) 2375ab43d0fSKunihiko Hayashi return PTR_ERR(priv->clk); 2385ab43d0fSKunihiko Hayashi 239752d31a3SChunfeng Yun priv->clk_ext = devm_clk_get_optional(dev, "phy-ext"); 240752d31a3SChunfeng Yun if (IS_ERR(priv->clk_ext)) 2415ab43d0fSKunihiko Hayashi return PTR_ERR(priv->clk_ext); 2425ab43d0fSKunihiko Hayashi 2435ab43d0fSKunihiko Hayashi priv->rst = devm_reset_control_get_shared(dev, "phy"); 2445ab43d0fSKunihiko Hayashi if (IS_ERR(priv->rst)) 2455ab43d0fSKunihiko Hayashi return PTR_ERR(priv->rst); 2465ab43d0fSKunihiko Hayashi } else { 2475ab43d0fSKunihiko Hayashi priv->clk_parent_gio = devm_clk_get(dev, "gio"); 2485ab43d0fSKunihiko Hayashi if (IS_ERR(priv->clk_parent_gio)) 2495ab43d0fSKunihiko Hayashi return PTR_ERR(priv->clk_parent_gio); 2505ab43d0fSKunihiko Hayashi 2515ab43d0fSKunihiko Hayashi priv->rst_parent_gio = 2525ab43d0fSKunihiko Hayashi devm_reset_control_get_shared(dev, "gio"); 2535ab43d0fSKunihiko Hayashi if (IS_ERR(priv->rst_parent_gio)) 2545ab43d0fSKunihiko Hayashi return PTR_ERR(priv->rst_parent_gio); 2555ab43d0fSKunihiko Hayashi } 2565ab43d0fSKunihiko Hayashi 2575ab43d0fSKunihiko Hayashi priv->clk_parent = devm_clk_get(dev, "link"); 2585ab43d0fSKunihiko Hayashi if (IS_ERR(priv->clk_parent)) 2595ab43d0fSKunihiko Hayashi return PTR_ERR(priv->clk_parent); 2605ab43d0fSKunihiko Hayashi 2615ab43d0fSKunihiko Hayashi priv->rst_parent = devm_reset_control_get_shared(dev, "link"); 2625ab43d0fSKunihiko Hayashi if (IS_ERR(priv->rst_parent)) 2635ab43d0fSKunihiko Hayashi return PTR_ERR(priv->rst_parent); 2645ab43d0fSKunihiko Hayashi 2655ab43d0fSKunihiko Hayashi priv->vbus = devm_regulator_get_optional(dev, "vbus"); 2665ab43d0fSKunihiko Hayashi if (IS_ERR(priv->vbus)) { 2675ab43d0fSKunihiko Hayashi if (PTR_ERR(priv->vbus) == -EPROBE_DEFER) 2685ab43d0fSKunihiko Hayashi return PTR_ERR(priv->vbus); 2695ab43d0fSKunihiko Hayashi priv->vbus = NULL; 2705ab43d0fSKunihiko Hayashi } 2715ab43d0fSKunihiko Hayashi 2725ab43d0fSKunihiko Hayashi phy = devm_phy_create(dev, dev->of_node, &uniphier_u3ssphy_ops); 2735ab43d0fSKunihiko Hayashi if (IS_ERR(phy)) 2745ab43d0fSKunihiko Hayashi return PTR_ERR(phy); 2755ab43d0fSKunihiko Hayashi 2765ab43d0fSKunihiko Hayashi phy_set_drvdata(phy, priv); 2775ab43d0fSKunihiko Hayashi phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); 2785ab43d0fSKunihiko Hayashi 2795ab43d0fSKunihiko Hayashi return PTR_ERR_OR_ZERO(phy_provider); 2805ab43d0fSKunihiko Hayashi } 2815ab43d0fSKunihiko Hayashi 2825ab43d0fSKunihiko Hayashi static const struct uniphier_u3ssphy_soc_data uniphier_pro4_data = { 2835ab43d0fSKunihiko Hayashi .is_legacy = true, 2845ab43d0fSKunihiko Hayashi }; 2855ab43d0fSKunihiko Hayashi 2865ab43d0fSKunihiko Hayashi static const struct uniphier_u3ssphy_soc_data uniphier_pxs2_data = { 2875ab43d0fSKunihiko Hayashi .is_legacy = false, 2885ab43d0fSKunihiko Hayashi .nparams = 7, 2895ab43d0fSKunihiko Hayashi .param = { 2905ab43d0fSKunihiko Hayashi { CDR_CPD_TRIM, 10 }, 2915ab43d0fSKunihiko Hayashi { CDR_CPF_TRIM, 3 }, 2925ab43d0fSKunihiko Hayashi { TX_PLL_TRIM, 5 }, 2935ab43d0fSKunihiko Hayashi { BGAP_TRIM, 9 }, 2945ab43d0fSKunihiko Hayashi { CDR_TRIM, 2 }, 2955ab43d0fSKunihiko Hayashi { VCOPLL_CTRL, 7 }, 2965ab43d0fSKunihiko Hayashi { VCOPLL_CM, 1 }, 2975ab43d0fSKunihiko Hayashi }, 2985ab43d0fSKunihiko Hayashi }; 2995ab43d0fSKunihiko Hayashi 3005ab43d0fSKunihiko Hayashi static const struct uniphier_u3ssphy_soc_data uniphier_ld20_data = { 3015ab43d0fSKunihiko Hayashi .is_legacy = false, 3025ab43d0fSKunihiko Hayashi .nparams = 3, 3035ab43d0fSKunihiko Hayashi .param = { 3045ab43d0fSKunihiko Hayashi { CDR_CPD_TRIM, 6 }, 3055ab43d0fSKunihiko Hayashi { CDR_TRIM, 2 }, 3065ab43d0fSKunihiko Hayashi { VCO_CTRL, 5 }, 3075ab43d0fSKunihiko Hayashi }, 3085ab43d0fSKunihiko Hayashi }; 3095ab43d0fSKunihiko Hayashi 3105ab43d0fSKunihiko Hayashi static const struct of_device_id uniphier_u3ssphy_match[] = { 3115ab43d0fSKunihiko Hayashi { 3125ab43d0fSKunihiko Hayashi .compatible = "socionext,uniphier-pro4-usb3-ssphy", 3135ab43d0fSKunihiko Hayashi .data = &uniphier_pro4_data, 3145ab43d0fSKunihiko Hayashi }, 3155ab43d0fSKunihiko Hayashi { 316*9376fa63SKunihiko Hayashi .compatible = "socionext,uniphier-pro5-usb3-ssphy", 317*9376fa63SKunihiko Hayashi .data = &uniphier_pro4_data, 318*9376fa63SKunihiko Hayashi }, 319*9376fa63SKunihiko Hayashi { 3205ab43d0fSKunihiko Hayashi .compatible = "socionext,uniphier-pxs2-usb3-ssphy", 3215ab43d0fSKunihiko Hayashi .data = &uniphier_pxs2_data, 3225ab43d0fSKunihiko Hayashi }, 3235ab43d0fSKunihiko Hayashi { 3245ab43d0fSKunihiko Hayashi .compatible = "socionext,uniphier-ld20-usb3-ssphy", 3255ab43d0fSKunihiko Hayashi .data = &uniphier_ld20_data, 3265ab43d0fSKunihiko Hayashi }, 3275ab43d0fSKunihiko Hayashi { 3285ab43d0fSKunihiko Hayashi .compatible = "socionext,uniphier-pxs3-usb3-ssphy", 3295ab43d0fSKunihiko Hayashi .data = &uniphier_ld20_data, 3305ab43d0fSKunihiko Hayashi }, 3315ab43d0fSKunihiko Hayashi { /* sentinel */ } 3325ab43d0fSKunihiko Hayashi }; 3335ab43d0fSKunihiko Hayashi MODULE_DEVICE_TABLE(of, uniphier_u3ssphy_match); 3345ab43d0fSKunihiko Hayashi 3355ab43d0fSKunihiko Hayashi static struct platform_driver uniphier_u3ssphy_driver = { 3365ab43d0fSKunihiko Hayashi .probe = uniphier_u3ssphy_probe, 3375ab43d0fSKunihiko Hayashi .driver = { 3385ab43d0fSKunihiko Hayashi .name = "uniphier-usb3-ssphy", 3395ab43d0fSKunihiko Hayashi .of_match_table = uniphier_u3ssphy_match, 3405ab43d0fSKunihiko Hayashi }, 3415ab43d0fSKunihiko Hayashi }; 3425ab43d0fSKunihiko Hayashi 3435ab43d0fSKunihiko Hayashi module_platform_driver(uniphier_u3ssphy_driver); 3445ab43d0fSKunihiko Hayashi 3455ab43d0fSKunihiko Hayashi MODULE_AUTHOR("Kunihiko Hayashi <hayashi.kunihiko@socionext.com>"); 3465ab43d0fSKunihiko Hayashi MODULE_DESCRIPTION("UniPhier SS-PHY driver for USB3 controller"); 3475ab43d0fSKunihiko Hayashi MODULE_LICENSE("GPL v2"); 348