1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Renesas R-Car Gen3 for USB2.0 PHY driver 4 * 5 * Copyright (C) 2015-2017 Renesas Electronics Corporation 6 * 7 * This is based on the phy-rcar-gen2 driver: 8 * Copyright (C) 2014 Renesas Solutions Corp. 9 * Copyright (C) 2014 Cogent Embedded, Inc. 10 */ 11 12 #include <linux/extcon-provider.h> 13 #include <linux/interrupt.h> 14 #include <linux/io.h> 15 #include <linux/module.h> 16 #include <linux/mutex.h> 17 #include <linux/of.h> 18 #include <linux/phy/phy.h> 19 #include <linux/platform_device.h> 20 #include <linux/pm_runtime.h> 21 #include <linux/regulator/consumer.h> 22 #include <linux/string.h> 23 #include <linux/usb/of.h> 24 #include <linux/workqueue.h> 25 26 /******* USB2.0 Host registers (original offset is +0x200) *******/ 27 #define USB2_INT_ENABLE 0x000 28 #define USB2_USBCTR 0x00c 29 #define USB2_SPD_RSM_TIMSET 0x10c 30 #define USB2_OC_TIMSET 0x110 31 #define USB2_COMMCTRL 0x600 32 #define USB2_OBINTSTA 0x604 33 #define USB2_OBINTEN 0x608 34 #define USB2_VBCTRL 0x60c 35 #define USB2_LINECTRL1 0x610 36 #define USB2_ADPCTRL 0x630 37 38 /* INT_ENABLE */ 39 #define USB2_INT_ENABLE_UCOM_INTEN BIT(3) 40 #define USB2_INT_ENABLE_USBH_INTB_EN BIT(2) /* For EHCI */ 41 #define USB2_INT_ENABLE_USBH_INTA_EN BIT(1) /* For OHCI */ 42 43 /* USBCTR */ 44 #define USB2_USBCTR_DIRPD BIT(2) 45 #define USB2_USBCTR_PLL_RST BIT(1) 46 47 /* SPD_RSM_TIMSET */ 48 #define USB2_SPD_RSM_TIMSET_INIT 0x014e029b 49 50 /* OC_TIMSET */ 51 #define USB2_OC_TIMSET_INIT 0x000209ab 52 53 /* COMMCTRL */ 54 #define USB2_COMMCTRL_OTG_PERI BIT(31) /* 1 = Peripheral mode */ 55 56 /* OBINTSTA and OBINTEN */ 57 #define USB2_OBINT_SESSVLDCHG BIT(12) 58 #define USB2_OBINT_IDDIGCHG BIT(11) 59 #define USB2_OBINT_BITS (USB2_OBINT_SESSVLDCHG | \ 60 USB2_OBINT_IDDIGCHG) 61 62 /* VBCTRL */ 63 #define USB2_VBCTRL_OCCLREN BIT(16) 64 #define USB2_VBCTRL_DRVVBUSSEL BIT(8) 65 #define USB2_VBCTRL_VBOUT BIT(0) 66 67 /* LINECTRL1 */ 68 #define USB2_LINECTRL1_DPRPD_EN BIT(19) 69 #define USB2_LINECTRL1_DP_RPD BIT(18) 70 #define USB2_LINECTRL1_DMRPD_EN BIT(17) 71 #define USB2_LINECTRL1_DM_RPD BIT(16) 72 #define USB2_LINECTRL1_OPMODE_NODRV BIT(6) 73 74 /* ADPCTRL */ 75 #define USB2_ADPCTRL_OTGSESSVLD BIT(20) 76 #define USB2_ADPCTRL_IDDIG BIT(19) 77 #define USB2_ADPCTRL_IDPULLUP BIT(5) /* 1 = ID sampling is enabled */ 78 #define USB2_ADPCTRL_DRVVBUS BIT(4) 79 80 /* RZ/G2L specific */ 81 #define USB2_OBINT_IDCHG_EN BIT(0) 82 #define USB2_LINECTRL1_USB2_IDMON BIT(0) 83 84 #define NUM_OF_PHYS 4 85 enum rcar_gen3_phy_index { 86 PHY_INDEX_BOTH_HC, 87 PHY_INDEX_OHCI, 88 PHY_INDEX_EHCI, 89 PHY_INDEX_HSUSB 90 }; 91 92 static const u32 rcar_gen3_int_enable[NUM_OF_PHYS] = { 93 USB2_INT_ENABLE_USBH_INTB_EN | USB2_INT_ENABLE_USBH_INTA_EN, 94 USB2_INT_ENABLE_USBH_INTA_EN, 95 USB2_INT_ENABLE_USBH_INTB_EN, 96 0 97 }; 98 99 struct rcar_gen3_phy { 100 struct phy *phy; 101 struct rcar_gen3_chan *ch; 102 u32 int_enable_bits; 103 bool initialized; 104 bool otg_initialized; 105 bool powered; 106 }; 107 108 struct rcar_gen3_chan { 109 void __iomem *base; 110 struct device *dev; /* platform_device's device */ 111 struct extcon_dev *extcon; 112 struct rcar_gen3_phy rphys[NUM_OF_PHYS]; 113 struct regulator *vbus; 114 struct work_struct work; 115 struct mutex lock; /* protects rphys[...].powered */ 116 enum usb_dr_mode dr_mode; 117 int irq; 118 u32 obint_enable_bits; 119 bool extcon_host; 120 bool is_otg_channel; 121 bool uses_otg_pins; 122 bool soc_no_adp_ctrl; 123 }; 124 125 struct rcar_gen3_phy_drv_data { 126 const struct phy_ops *phy_usb2_ops; 127 bool no_adp_ctrl; 128 }; 129 130 /* 131 * Combination about is_otg_channel and uses_otg_pins: 132 * 133 * Parameters || Behaviors 134 * is_otg_channel | uses_otg_pins || irqs | role sysfs 135 * ---------------------+---------------++--------------+------------ 136 * true | true || enabled | enabled 137 * true | false || disabled | enabled 138 * false | any || disabled | disabled 139 */ 140 141 static void rcar_gen3_phy_usb2_work(struct work_struct *work) 142 { 143 struct rcar_gen3_chan *ch = container_of(work, struct rcar_gen3_chan, 144 work); 145 146 if (ch->extcon_host) { 147 extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, true); 148 extcon_set_state_sync(ch->extcon, EXTCON_USB, false); 149 } else { 150 extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, false); 151 extcon_set_state_sync(ch->extcon, EXTCON_USB, true); 152 } 153 } 154 155 static void rcar_gen3_set_host_mode(struct rcar_gen3_chan *ch, int host) 156 { 157 void __iomem *usb2_base = ch->base; 158 u32 val = readl(usb2_base + USB2_COMMCTRL); 159 160 dev_vdbg(ch->dev, "%s: %08x, %d\n", __func__, val, host); 161 if (host) 162 val &= ~USB2_COMMCTRL_OTG_PERI; 163 else 164 val |= USB2_COMMCTRL_OTG_PERI; 165 writel(val, usb2_base + USB2_COMMCTRL); 166 } 167 168 static void rcar_gen3_set_linectrl(struct rcar_gen3_chan *ch, int dp, int dm) 169 { 170 void __iomem *usb2_base = ch->base; 171 u32 val = readl(usb2_base + USB2_LINECTRL1); 172 173 dev_vdbg(ch->dev, "%s: %08x, %d, %d\n", __func__, val, dp, dm); 174 val &= ~(USB2_LINECTRL1_DP_RPD | USB2_LINECTRL1_DM_RPD); 175 if (dp) 176 val |= USB2_LINECTRL1_DP_RPD; 177 if (dm) 178 val |= USB2_LINECTRL1_DM_RPD; 179 writel(val, usb2_base + USB2_LINECTRL1); 180 } 181 182 static void rcar_gen3_enable_vbus_ctrl(struct rcar_gen3_chan *ch, int vbus) 183 { 184 void __iomem *usb2_base = ch->base; 185 u32 vbus_ctrl_reg = USB2_ADPCTRL; 186 u32 vbus_ctrl_val = USB2_ADPCTRL_DRVVBUS; 187 u32 val; 188 189 dev_vdbg(ch->dev, "%s: %08x, %d\n", __func__, val, vbus); 190 if (ch->soc_no_adp_ctrl) { 191 if (ch->vbus) 192 regulator_hardware_enable(ch->vbus, vbus); 193 194 vbus_ctrl_reg = USB2_VBCTRL; 195 vbus_ctrl_val = USB2_VBCTRL_VBOUT; 196 } 197 198 val = readl(usb2_base + vbus_ctrl_reg); 199 if (vbus) 200 val |= vbus_ctrl_val; 201 else 202 val &= ~vbus_ctrl_val; 203 writel(val, usb2_base + vbus_ctrl_reg); 204 } 205 206 static void rcar_gen3_control_otg_irq(struct rcar_gen3_chan *ch, int enable) 207 { 208 void __iomem *usb2_base = ch->base; 209 u32 val = readl(usb2_base + USB2_OBINTEN); 210 211 if (ch->uses_otg_pins && enable) 212 val |= ch->obint_enable_bits; 213 else 214 val &= ~ch->obint_enable_bits; 215 writel(val, usb2_base + USB2_OBINTEN); 216 } 217 218 static void rcar_gen3_init_for_host(struct rcar_gen3_chan *ch) 219 { 220 rcar_gen3_set_linectrl(ch, 1, 1); 221 rcar_gen3_set_host_mode(ch, 1); 222 rcar_gen3_enable_vbus_ctrl(ch, 1); 223 224 ch->extcon_host = true; 225 schedule_work(&ch->work); 226 } 227 228 static void rcar_gen3_init_for_peri(struct rcar_gen3_chan *ch) 229 { 230 rcar_gen3_set_linectrl(ch, 0, 1); 231 rcar_gen3_set_host_mode(ch, 0); 232 rcar_gen3_enable_vbus_ctrl(ch, 0); 233 234 ch->extcon_host = false; 235 schedule_work(&ch->work); 236 } 237 238 static void rcar_gen3_init_for_b_host(struct rcar_gen3_chan *ch) 239 { 240 void __iomem *usb2_base = ch->base; 241 u32 val; 242 243 val = readl(usb2_base + USB2_LINECTRL1); 244 writel(val | USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1); 245 246 rcar_gen3_set_linectrl(ch, 1, 1); 247 rcar_gen3_set_host_mode(ch, 1); 248 rcar_gen3_enable_vbus_ctrl(ch, 0); 249 250 val = readl(usb2_base + USB2_LINECTRL1); 251 writel(val & ~USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1); 252 } 253 254 static void rcar_gen3_init_for_a_peri(struct rcar_gen3_chan *ch) 255 { 256 rcar_gen3_set_linectrl(ch, 0, 1); 257 rcar_gen3_set_host_mode(ch, 0); 258 rcar_gen3_enable_vbus_ctrl(ch, 1); 259 } 260 261 static void rcar_gen3_init_from_a_peri_to_a_host(struct rcar_gen3_chan *ch) 262 { 263 rcar_gen3_control_otg_irq(ch, 0); 264 265 rcar_gen3_enable_vbus_ctrl(ch, 1); 266 rcar_gen3_init_for_host(ch); 267 268 rcar_gen3_control_otg_irq(ch, 1); 269 } 270 271 static bool rcar_gen3_check_id(struct rcar_gen3_chan *ch) 272 { 273 if (!ch->uses_otg_pins) 274 return (ch->dr_mode == USB_DR_MODE_HOST) ? false : true; 275 276 if (ch->soc_no_adp_ctrl) 277 return !!(readl(ch->base + USB2_LINECTRL1) & USB2_LINECTRL1_USB2_IDMON); 278 279 return !!(readl(ch->base + USB2_ADPCTRL) & USB2_ADPCTRL_IDDIG); 280 } 281 282 static void rcar_gen3_device_recognition(struct rcar_gen3_chan *ch) 283 { 284 if (!rcar_gen3_check_id(ch)) 285 rcar_gen3_init_for_host(ch); 286 else 287 rcar_gen3_init_for_peri(ch); 288 } 289 290 static bool rcar_gen3_is_host(struct rcar_gen3_chan *ch) 291 { 292 return !(readl(ch->base + USB2_COMMCTRL) & USB2_COMMCTRL_OTG_PERI); 293 } 294 295 static enum phy_mode rcar_gen3_get_phy_mode(struct rcar_gen3_chan *ch) 296 { 297 if (rcar_gen3_is_host(ch)) 298 return PHY_MODE_USB_HOST; 299 300 return PHY_MODE_USB_DEVICE; 301 } 302 303 static bool rcar_gen3_is_any_rphy_initialized(struct rcar_gen3_chan *ch) 304 { 305 int i; 306 307 for (i = 0; i < NUM_OF_PHYS; i++) { 308 if (ch->rphys[i].initialized) 309 return true; 310 } 311 312 return false; 313 } 314 315 static bool rcar_gen3_needs_init_otg(struct rcar_gen3_chan *ch) 316 { 317 int i; 318 319 for (i = 0; i < NUM_OF_PHYS; i++) { 320 if (ch->rphys[i].otg_initialized) 321 return false; 322 } 323 324 return true; 325 } 326 327 static bool rcar_gen3_are_all_rphys_power_off(struct rcar_gen3_chan *ch) 328 { 329 int i; 330 331 for (i = 0; i < NUM_OF_PHYS; i++) { 332 if (ch->rphys[i].powered) 333 return false; 334 } 335 336 return true; 337 } 338 339 static ssize_t role_store(struct device *dev, struct device_attribute *attr, 340 const char *buf, size_t count) 341 { 342 struct rcar_gen3_chan *ch = dev_get_drvdata(dev); 343 bool is_b_device; 344 enum phy_mode cur_mode, new_mode; 345 346 if (!ch->is_otg_channel || !rcar_gen3_is_any_rphy_initialized(ch)) 347 return -EIO; 348 349 if (sysfs_streq(buf, "host")) 350 new_mode = PHY_MODE_USB_HOST; 351 else if (sysfs_streq(buf, "peripheral")) 352 new_mode = PHY_MODE_USB_DEVICE; 353 else 354 return -EINVAL; 355 356 /* is_b_device: true is B-Device. false is A-Device. */ 357 is_b_device = rcar_gen3_check_id(ch); 358 cur_mode = rcar_gen3_get_phy_mode(ch); 359 360 /* If current and new mode is the same, this returns the error */ 361 if (cur_mode == new_mode) 362 return -EINVAL; 363 364 if (new_mode == PHY_MODE_USB_HOST) { /* And is_host must be false */ 365 if (!is_b_device) /* A-Peripheral */ 366 rcar_gen3_init_from_a_peri_to_a_host(ch); 367 else /* B-Peripheral */ 368 rcar_gen3_init_for_b_host(ch); 369 } else { /* And is_host must be true */ 370 if (!is_b_device) /* A-Host */ 371 rcar_gen3_init_for_a_peri(ch); 372 else /* B-Host */ 373 rcar_gen3_init_for_peri(ch); 374 } 375 376 return count; 377 } 378 379 static ssize_t role_show(struct device *dev, struct device_attribute *attr, 380 char *buf) 381 { 382 struct rcar_gen3_chan *ch = dev_get_drvdata(dev); 383 384 if (!ch->is_otg_channel || !rcar_gen3_is_any_rphy_initialized(ch)) 385 return -EIO; 386 387 return sprintf(buf, "%s\n", rcar_gen3_is_host(ch) ? "host" : 388 "peripheral"); 389 } 390 static DEVICE_ATTR_RW(role); 391 392 static void rcar_gen3_init_otg(struct rcar_gen3_chan *ch) 393 { 394 void __iomem *usb2_base = ch->base; 395 u32 val; 396 397 /* Should not use functions of read-modify-write a register */ 398 val = readl(usb2_base + USB2_LINECTRL1); 399 val = (val & ~USB2_LINECTRL1_DP_RPD) | USB2_LINECTRL1_DPRPD_EN | 400 USB2_LINECTRL1_DMRPD_EN | USB2_LINECTRL1_DM_RPD; 401 writel(val, usb2_base + USB2_LINECTRL1); 402 403 if (!ch->soc_no_adp_ctrl) { 404 val = readl(usb2_base + USB2_VBCTRL); 405 val &= ~USB2_VBCTRL_OCCLREN; 406 writel(val | USB2_VBCTRL_DRVVBUSSEL, usb2_base + USB2_VBCTRL); 407 val = readl(usb2_base + USB2_ADPCTRL); 408 writel(val | USB2_ADPCTRL_IDPULLUP, usb2_base + USB2_ADPCTRL); 409 } 410 msleep(20); 411 412 writel(0xffffffff, usb2_base + USB2_OBINTSTA); 413 writel(ch->obint_enable_bits, usb2_base + USB2_OBINTEN); 414 415 rcar_gen3_device_recognition(ch); 416 } 417 418 static irqreturn_t rcar_gen3_phy_usb2_irq(int irq, void *_ch) 419 { 420 struct rcar_gen3_chan *ch = _ch; 421 void __iomem *usb2_base = ch->base; 422 u32 status = readl(usb2_base + USB2_OBINTSTA); 423 irqreturn_t ret = IRQ_NONE; 424 425 if (status & ch->obint_enable_bits) { 426 dev_vdbg(ch->dev, "%s: %08x\n", __func__, status); 427 writel(ch->obint_enable_bits, usb2_base + USB2_OBINTSTA); 428 rcar_gen3_device_recognition(ch); 429 ret = IRQ_HANDLED; 430 } 431 432 return ret; 433 } 434 435 static int rcar_gen3_phy_usb2_init(struct phy *p) 436 { 437 struct rcar_gen3_phy *rphy = phy_get_drvdata(p); 438 struct rcar_gen3_chan *channel = rphy->ch; 439 void __iomem *usb2_base = channel->base; 440 u32 val; 441 int ret; 442 443 if (!rcar_gen3_is_any_rphy_initialized(channel) && channel->irq >= 0) { 444 INIT_WORK(&channel->work, rcar_gen3_phy_usb2_work); 445 ret = request_irq(channel->irq, rcar_gen3_phy_usb2_irq, 446 IRQF_SHARED, dev_name(channel->dev), channel); 447 if (ret < 0) { 448 dev_err(channel->dev, "No irq handler (%d)\n", channel->irq); 449 return ret; 450 } 451 } 452 453 /* Initialize USB2 part */ 454 val = readl(usb2_base + USB2_INT_ENABLE); 455 val |= USB2_INT_ENABLE_UCOM_INTEN | rphy->int_enable_bits; 456 writel(val, usb2_base + USB2_INT_ENABLE); 457 writel(USB2_SPD_RSM_TIMSET_INIT, usb2_base + USB2_SPD_RSM_TIMSET); 458 writel(USB2_OC_TIMSET_INIT, usb2_base + USB2_OC_TIMSET); 459 460 /* Initialize otg part */ 461 if (channel->is_otg_channel) { 462 if (rcar_gen3_needs_init_otg(channel)) 463 rcar_gen3_init_otg(channel); 464 rphy->otg_initialized = true; 465 } 466 467 rphy->initialized = true; 468 469 return 0; 470 } 471 472 static int rcar_gen3_phy_usb2_exit(struct phy *p) 473 { 474 struct rcar_gen3_phy *rphy = phy_get_drvdata(p); 475 struct rcar_gen3_chan *channel = rphy->ch; 476 void __iomem *usb2_base = channel->base; 477 u32 val; 478 479 rphy->initialized = false; 480 481 if (channel->is_otg_channel) 482 rphy->otg_initialized = false; 483 484 val = readl(usb2_base + USB2_INT_ENABLE); 485 val &= ~rphy->int_enable_bits; 486 if (!rcar_gen3_is_any_rphy_initialized(channel)) 487 val &= ~USB2_INT_ENABLE_UCOM_INTEN; 488 writel(val, usb2_base + USB2_INT_ENABLE); 489 490 if (channel->irq >= 0 && !rcar_gen3_is_any_rphy_initialized(channel)) 491 free_irq(channel->irq, channel); 492 493 return 0; 494 } 495 496 static int rcar_gen3_phy_usb2_power_on(struct phy *p) 497 { 498 struct rcar_gen3_phy *rphy = phy_get_drvdata(p); 499 struct rcar_gen3_chan *channel = rphy->ch; 500 void __iomem *usb2_base = channel->base; 501 u32 val; 502 int ret = 0; 503 504 mutex_lock(&channel->lock); 505 if (!rcar_gen3_are_all_rphys_power_off(channel)) 506 goto out; 507 508 if (channel->vbus) { 509 ret = regulator_enable(channel->vbus); 510 if (ret) 511 goto out; 512 } 513 514 val = readl(usb2_base + USB2_USBCTR); 515 val |= USB2_USBCTR_PLL_RST; 516 writel(val, usb2_base + USB2_USBCTR); 517 val &= ~USB2_USBCTR_PLL_RST; 518 writel(val, usb2_base + USB2_USBCTR); 519 520 out: 521 /* The powered flag should be set for any other phys anyway */ 522 rphy->powered = true; 523 mutex_unlock(&channel->lock); 524 525 return 0; 526 } 527 528 static int rcar_gen3_phy_usb2_power_off(struct phy *p) 529 { 530 struct rcar_gen3_phy *rphy = phy_get_drvdata(p); 531 struct rcar_gen3_chan *channel = rphy->ch; 532 int ret = 0; 533 534 mutex_lock(&channel->lock); 535 rphy->powered = false; 536 537 if (!rcar_gen3_are_all_rphys_power_off(channel)) 538 goto out; 539 540 if (channel->vbus) 541 ret = regulator_disable(channel->vbus); 542 543 out: 544 mutex_unlock(&channel->lock); 545 546 return ret; 547 } 548 549 static const struct phy_ops rcar_gen3_phy_usb2_ops = { 550 .init = rcar_gen3_phy_usb2_init, 551 .exit = rcar_gen3_phy_usb2_exit, 552 .power_on = rcar_gen3_phy_usb2_power_on, 553 .power_off = rcar_gen3_phy_usb2_power_off, 554 .owner = THIS_MODULE, 555 }; 556 557 static const struct phy_ops rz_g1c_phy_usb2_ops = { 558 .init = rcar_gen3_phy_usb2_init, 559 .exit = rcar_gen3_phy_usb2_exit, 560 .owner = THIS_MODULE, 561 }; 562 563 static const struct rcar_gen3_phy_drv_data rcar_gen3_phy_usb2_data = { 564 .phy_usb2_ops = &rcar_gen3_phy_usb2_ops, 565 .no_adp_ctrl = false, 566 }; 567 568 static const struct rcar_gen3_phy_drv_data rz_g1c_phy_usb2_data = { 569 .phy_usb2_ops = &rz_g1c_phy_usb2_ops, 570 .no_adp_ctrl = false, 571 }; 572 573 static const struct rcar_gen3_phy_drv_data rz_g2l_phy_usb2_data = { 574 .phy_usb2_ops = &rcar_gen3_phy_usb2_ops, 575 .no_adp_ctrl = true, 576 }; 577 578 static const struct of_device_id rcar_gen3_phy_usb2_match_table[] = { 579 { 580 .compatible = "renesas,usb2-phy-r8a77470", 581 .data = &rz_g1c_phy_usb2_data, 582 }, 583 { 584 .compatible = "renesas,usb2-phy-r8a7795", 585 .data = &rcar_gen3_phy_usb2_data, 586 }, 587 { 588 .compatible = "renesas,usb2-phy-r8a7796", 589 .data = &rcar_gen3_phy_usb2_data, 590 }, 591 { 592 .compatible = "renesas,usb2-phy-r8a77965", 593 .data = &rcar_gen3_phy_usb2_data, 594 }, 595 { 596 .compatible = "renesas,rzg2l-usb2-phy", 597 .data = &rz_g2l_phy_usb2_data, 598 }, 599 { 600 .compatible = "renesas,rcar-gen3-usb2-phy", 601 .data = &rcar_gen3_phy_usb2_data, 602 }, 603 { /* sentinel */ }, 604 }; 605 MODULE_DEVICE_TABLE(of, rcar_gen3_phy_usb2_match_table); 606 607 static const unsigned int rcar_gen3_phy_cable[] = { 608 EXTCON_USB, 609 EXTCON_USB_HOST, 610 EXTCON_NONE, 611 }; 612 613 static struct phy *rcar_gen3_phy_usb2_xlate(struct device *dev, 614 const struct of_phandle_args *args) 615 { 616 struct rcar_gen3_chan *ch = dev_get_drvdata(dev); 617 618 if (args->args_count == 0) /* For old version dts */ 619 return ch->rphys[PHY_INDEX_BOTH_HC].phy; 620 else if (args->args_count > 1) /* Prevent invalid args count */ 621 return ERR_PTR(-ENODEV); 622 623 if (args->args[0] >= NUM_OF_PHYS) 624 return ERR_PTR(-ENODEV); 625 626 return ch->rphys[args->args[0]].phy; 627 } 628 629 static enum usb_dr_mode rcar_gen3_get_dr_mode(struct device_node *np) 630 { 631 enum usb_dr_mode candidate = USB_DR_MODE_UNKNOWN; 632 int i; 633 634 /* 635 * If one of device nodes has other dr_mode except UNKNOWN, 636 * this function returns UNKNOWN. To achieve backward compatibility, 637 * this loop starts the index as 0. 638 */ 639 for (i = 0; i < NUM_OF_PHYS; i++) { 640 enum usb_dr_mode mode = of_usb_get_dr_mode_by_phy(np, i); 641 642 if (mode != USB_DR_MODE_UNKNOWN) { 643 if (candidate == USB_DR_MODE_UNKNOWN) 644 candidate = mode; 645 else if (candidate != mode) 646 return USB_DR_MODE_UNKNOWN; 647 } 648 } 649 650 return candidate; 651 } 652 653 static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev) 654 { 655 const struct rcar_gen3_phy_drv_data *phy_data; 656 struct device *dev = &pdev->dev; 657 struct rcar_gen3_chan *channel; 658 struct phy_provider *provider; 659 int ret = 0, i; 660 661 if (!dev->of_node) { 662 dev_err(dev, "This driver needs device tree\n"); 663 return -EINVAL; 664 } 665 666 channel = devm_kzalloc(dev, sizeof(*channel), GFP_KERNEL); 667 if (!channel) 668 return -ENOMEM; 669 670 channel->base = devm_platform_ioremap_resource(pdev, 0); 671 if (IS_ERR(channel->base)) 672 return PTR_ERR(channel->base); 673 674 channel->obint_enable_bits = USB2_OBINT_BITS; 675 /* get irq number here and request_irq for OTG in phy_init */ 676 channel->irq = platform_get_irq_optional(pdev, 0); 677 channel->dr_mode = rcar_gen3_get_dr_mode(dev->of_node); 678 if (channel->dr_mode != USB_DR_MODE_UNKNOWN) { 679 channel->is_otg_channel = true; 680 channel->uses_otg_pins = !of_property_read_bool(dev->of_node, 681 "renesas,no-otg-pins"); 682 channel->extcon = devm_extcon_dev_allocate(dev, 683 rcar_gen3_phy_cable); 684 if (IS_ERR(channel->extcon)) 685 return PTR_ERR(channel->extcon); 686 687 ret = devm_extcon_dev_register(dev, channel->extcon); 688 if (ret < 0) { 689 dev_err(dev, "Failed to register extcon\n"); 690 return ret; 691 } 692 } 693 694 /* 695 * devm_phy_create() will call pm_runtime_enable(&phy->dev); 696 * And then, phy-core will manage runtime pm for this device. 697 */ 698 pm_runtime_enable(dev); 699 700 phy_data = of_device_get_match_data(dev); 701 if (!phy_data) { 702 ret = -EINVAL; 703 goto error; 704 } 705 706 channel->soc_no_adp_ctrl = phy_data->no_adp_ctrl; 707 if (phy_data->no_adp_ctrl) 708 channel->obint_enable_bits = USB2_OBINT_IDCHG_EN; 709 710 mutex_init(&channel->lock); 711 for (i = 0; i < NUM_OF_PHYS; i++) { 712 channel->rphys[i].phy = devm_phy_create(dev, NULL, 713 phy_data->phy_usb2_ops); 714 if (IS_ERR(channel->rphys[i].phy)) { 715 dev_err(dev, "Failed to create USB2 PHY\n"); 716 ret = PTR_ERR(channel->rphys[i].phy); 717 goto error; 718 } 719 channel->rphys[i].ch = channel; 720 channel->rphys[i].int_enable_bits = rcar_gen3_int_enable[i]; 721 phy_set_drvdata(channel->rphys[i].phy, &channel->rphys[i]); 722 } 723 724 if (channel->soc_no_adp_ctrl && channel->is_otg_channel) 725 channel->vbus = devm_regulator_get_exclusive(dev, "vbus"); 726 else 727 channel->vbus = devm_regulator_get_optional(dev, "vbus"); 728 if (IS_ERR(channel->vbus)) { 729 if (PTR_ERR(channel->vbus) == -EPROBE_DEFER) { 730 ret = PTR_ERR(channel->vbus); 731 goto error; 732 } 733 channel->vbus = NULL; 734 } 735 736 platform_set_drvdata(pdev, channel); 737 channel->dev = dev; 738 739 provider = devm_of_phy_provider_register(dev, rcar_gen3_phy_usb2_xlate); 740 if (IS_ERR(provider)) { 741 dev_err(dev, "Failed to register PHY provider\n"); 742 ret = PTR_ERR(provider); 743 goto error; 744 } else if (channel->is_otg_channel) { 745 ret = device_create_file(dev, &dev_attr_role); 746 if (ret < 0) 747 goto error; 748 } 749 750 return 0; 751 752 error: 753 pm_runtime_disable(dev); 754 755 return ret; 756 } 757 758 static void rcar_gen3_phy_usb2_remove(struct platform_device *pdev) 759 { 760 struct rcar_gen3_chan *channel = platform_get_drvdata(pdev); 761 762 if (channel->is_otg_channel) 763 device_remove_file(&pdev->dev, &dev_attr_role); 764 765 pm_runtime_disable(&pdev->dev); 766 }; 767 768 static struct platform_driver rcar_gen3_phy_usb2_driver = { 769 .driver = { 770 .name = "phy_rcar_gen3_usb2", 771 .of_match_table = rcar_gen3_phy_usb2_match_table, 772 }, 773 .probe = rcar_gen3_phy_usb2_probe, 774 .remove_new = rcar_gen3_phy_usb2_remove, 775 }; 776 module_platform_driver(rcar_gen3_phy_usb2_driver); 777 778 MODULE_LICENSE("GPL v2"); 779 MODULE_DESCRIPTION("Renesas R-Car Gen3 USB 2.0 PHY"); 780 MODULE_AUTHOR("Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>"); 781