1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Renesas R-Car Gen3 for USB2.0 PHY driver 4 * 5 * Copyright (C) 2015-2017 Renesas Electronics Corporation 6 * 7 * This is based on the phy-rcar-gen2 driver: 8 * Copyright (C) 2014 Renesas Solutions Corp. 9 * Copyright (C) 2014 Cogent Embedded, Inc. 10 */ 11 12 #include <linux/cleanup.h> 13 #include <linux/extcon-provider.h> 14 #include <linux/interrupt.h> 15 #include <linux/io.h> 16 #include <linux/module.h> 17 #include <linux/mutex.h> 18 #include <linux/of.h> 19 #include <linux/phy/phy.h> 20 #include <linux/platform_device.h> 21 #include <linux/pm_runtime.h> 22 #include <linux/regulator/consumer.h> 23 #include <linux/reset.h> 24 #include <linux/string.h> 25 #include <linux/usb/of.h> 26 #include <linux/workqueue.h> 27 28 /******* USB2.0 Host registers (original offset is +0x200) *******/ 29 #define USB2_INT_ENABLE 0x000 30 #define USB2_AHB_BUS_CTR 0x008 31 #define USB2_USBCTR 0x00c 32 #define USB2_REGEN_CG_CTRL 0x104 /* RZ/V2H(P) only */ 33 #define USB2_SPD_RSM_TIMSET 0x10c 34 #define USB2_OC_TIMSET 0x110 35 #define USB2_UTMI_CTRL 0x118 /* RZ/V2H(P) only */ 36 #define USB2_COMMCTRL 0x600 37 #define USB2_OBINTSTA 0x604 38 #define USB2_OBINTEN 0x608 39 #define USB2_VBCTRL 0x60c 40 #define USB2_LINECTRL1 0x610 41 #define USB2_ADPCTRL 0x630 42 43 /* INT_ENABLE */ 44 #define USB2_INT_ENABLE_UCOM_INTEN BIT(3) 45 #define USB2_INT_ENABLE_USBH_INTB_EN BIT(2) /* For EHCI */ 46 #define USB2_INT_ENABLE_USBH_INTA_EN BIT(1) /* For OHCI */ 47 48 /* AHB_BUS_CTR */ 49 #define USB2_AHB_BUS_CTR_MBL_MASK GENMASK(1, 0) 50 #define USB2_AHB_BUS_CTR_MBL_INCR4 2 51 52 /* USBCTR */ 53 #define USB2_USBCTR_DIRPD BIT(2) 54 #define USB2_USBCTR_PLL_RST BIT(1) 55 56 /* REGEN_CG_CTRL*/ 57 #define USB2_REGEN_CG_CTRL_UPHY_WEN BIT(0) 58 59 /* SPD_RSM_TIMSET */ 60 #define USB2_SPD_RSM_TIMSET_INIT 0x014e029b 61 62 /* OC_TIMSET */ 63 #define USB2_OC_TIMSET_INIT 0x000209ab 64 65 /* UTMI_CTRL */ 66 #define USB2_UTMI_CTRL_INIT 0x8000018f 67 68 /* COMMCTRL */ 69 #define USB2_COMMCTRL_OTG_PERI BIT(31) /* 1 = Peripheral mode */ 70 71 /* OBINTSTA and OBINTEN */ 72 #define USB2_OBINT_SESSVLDCHG BIT(12) 73 #define USB2_OBINT_IDDIGCHG BIT(11) 74 #define USB2_OBINT_BITS (USB2_OBINT_SESSVLDCHG | \ 75 USB2_OBINT_IDDIGCHG) 76 77 /* VBCTRL */ 78 #define USB2_VBCTRL_OCCLREN BIT(16) 79 #define USB2_VBCTRL_DRVVBUSSEL BIT(8) 80 #define USB2_VBCTRL_VBOUT BIT(0) 81 82 /* LINECTRL1 */ 83 #define USB2_LINECTRL1_DPRPD_EN BIT(19) 84 #define USB2_LINECTRL1_DP_RPD BIT(18) 85 #define USB2_LINECTRL1_DMRPD_EN BIT(17) 86 #define USB2_LINECTRL1_DM_RPD BIT(16) 87 #define USB2_LINECTRL1_OPMODE_NODRV BIT(6) 88 89 /* ADPCTRL */ 90 #define USB2_ADPCTRL_OTGSESSVLD BIT(20) 91 #define USB2_ADPCTRL_IDDIG BIT(19) 92 #define USB2_ADPCTRL_IDPULLUP BIT(5) /* 1 = ID sampling is enabled */ 93 #define USB2_ADPCTRL_DRVVBUS BIT(4) 94 95 /* RZ/G2L specific */ 96 #define USB2_OBINT_IDCHG_EN BIT(0) 97 #define USB2_LINECTRL1_USB2_IDMON BIT(0) 98 99 #define NUM_OF_PHYS 4 100 enum rcar_gen3_phy_index { 101 PHY_INDEX_BOTH_HC, 102 PHY_INDEX_OHCI, 103 PHY_INDEX_EHCI, 104 PHY_INDEX_HSUSB 105 }; 106 107 static const u32 rcar_gen3_int_enable[NUM_OF_PHYS] = { 108 USB2_INT_ENABLE_USBH_INTB_EN | USB2_INT_ENABLE_USBH_INTA_EN, 109 USB2_INT_ENABLE_USBH_INTA_EN, 110 USB2_INT_ENABLE_USBH_INTB_EN, 111 0 112 }; 113 114 struct rcar_gen3_phy { 115 struct phy *phy; 116 struct rcar_gen3_chan *ch; 117 u32 int_enable_bits; 118 bool initialized; 119 bool powered; 120 }; 121 122 struct rcar_gen3_chan { 123 void __iomem *base; 124 struct device *dev; /* platform_device's device */ 125 struct extcon_dev *extcon; 126 struct rcar_gen3_phy rphys[NUM_OF_PHYS]; 127 struct regulator *vbus; 128 struct reset_control *rstc; 129 struct work_struct work; 130 spinlock_t lock; /* protects access to hardware and driver data structure. */ 131 enum usb_dr_mode dr_mode; 132 u32 obint_enable_bits; 133 bool extcon_host; 134 bool is_otg_channel; 135 bool uses_otg_pins; 136 bool soc_no_adp_ctrl; 137 bool utmi_ctrl; 138 }; 139 140 struct rcar_gen3_phy_drv_data { 141 const struct phy_ops *phy_usb2_ops; 142 bool no_adp_ctrl; 143 bool init_bus; 144 bool utmi_ctrl; 145 }; 146 147 /* 148 * Combination about is_otg_channel and uses_otg_pins: 149 * 150 * Parameters || Behaviors 151 * is_otg_channel | uses_otg_pins || irqs | role sysfs 152 * ---------------------+---------------++--------------+------------ 153 * true | true || enabled | enabled 154 * true | false || disabled | enabled 155 * false | any || disabled | disabled 156 */ 157 158 static void rcar_gen3_phy_usb2_work(struct work_struct *work) 159 { 160 struct rcar_gen3_chan *ch = container_of(work, struct rcar_gen3_chan, 161 work); 162 163 if (ch->extcon_host) { 164 extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, true); 165 extcon_set_state_sync(ch->extcon, EXTCON_USB, false); 166 } else { 167 extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, false); 168 extcon_set_state_sync(ch->extcon, EXTCON_USB, true); 169 } 170 } 171 172 static void rcar_gen3_set_host_mode(struct rcar_gen3_chan *ch, int host) 173 { 174 void __iomem *usb2_base = ch->base; 175 u32 val = readl(usb2_base + USB2_COMMCTRL); 176 177 dev_vdbg(ch->dev, "%s: %08x, %d\n", __func__, val, host); 178 if (host) 179 val &= ~USB2_COMMCTRL_OTG_PERI; 180 else 181 val |= USB2_COMMCTRL_OTG_PERI; 182 writel(val, usb2_base + USB2_COMMCTRL); 183 } 184 185 static void rcar_gen3_set_linectrl(struct rcar_gen3_chan *ch, int dp, int dm) 186 { 187 void __iomem *usb2_base = ch->base; 188 u32 val = readl(usb2_base + USB2_LINECTRL1); 189 190 dev_vdbg(ch->dev, "%s: %08x, %d, %d\n", __func__, val, dp, dm); 191 val &= ~(USB2_LINECTRL1_DP_RPD | USB2_LINECTRL1_DM_RPD); 192 if (dp) 193 val |= USB2_LINECTRL1_DP_RPD; 194 if (dm) 195 val |= USB2_LINECTRL1_DM_RPD; 196 writel(val, usb2_base + USB2_LINECTRL1); 197 } 198 199 static void rcar_gen3_enable_vbus_ctrl(struct rcar_gen3_chan *ch, int vbus) 200 { 201 void __iomem *usb2_base = ch->base; 202 u32 vbus_ctrl_reg = USB2_ADPCTRL; 203 u32 vbus_ctrl_val = USB2_ADPCTRL_DRVVBUS; 204 u32 val; 205 206 dev_vdbg(ch->dev, "%s: %08x, %d\n", __func__, val, vbus); 207 if (ch->soc_no_adp_ctrl) { 208 if (ch->vbus) 209 regulator_hardware_enable(ch->vbus, vbus); 210 211 vbus_ctrl_reg = USB2_VBCTRL; 212 vbus_ctrl_val = USB2_VBCTRL_VBOUT; 213 } 214 215 val = readl(usb2_base + vbus_ctrl_reg); 216 if (vbus) 217 val |= vbus_ctrl_val; 218 else 219 val &= ~vbus_ctrl_val; 220 writel(val, usb2_base + vbus_ctrl_reg); 221 } 222 223 static void rcar_gen3_control_otg_irq(struct rcar_gen3_chan *ch, int enable) 224 { 225 void __iomem *usb2_base = ch->base; 226 u32 val = readl(usb2_base + USB2_OBINTEN); 227 228 if (ch->uses_otg_pins && enable) 229 val |= ch->obint_enable_bits; 230 else 231 val &= ~ch->obint_enable_bits; 232 writel(val, usb2_base + USB2_OBINTEN); 233 } 234 235 static void rcar_gen3_init_for_host(struct rcar_gen3_chan *ch) 236 { 237 rcar_gen3_set_linectrl(ch, 1, 1); 238 rcar_gen3_set_host_mode(ch, 1); 239 rcar_gen3_enable_vbus_ctrl(ch, 1); 240 241 ch->extcon_host = true; 242 schedule_work(&ch->work); 243 } 244 245 static void rcar_gen3_init_for_peri(struct rcar_gen3_chan *ch) 246 { 247 rcar_gen3_set_linectrl(ch, 0, 1); 248 rcar_gen3_set_host_mode(ch, 0); 249 rcar_gen3_enable_vbus_ctrl(ch, 0); 250 251 ch->extcon_host = false; 252 schedule_work(&ch->work); 253 } 254 255 static void rcar_gen3_init_for_b_host(struct rcar_gen3_chan *ch) 256 { 257 void __iomem *usb2_base = ch->base; 258 u32 val; 259 260 val = readl(usb2_base + USB2_LINECTRL1); 261 writel(val | USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1); 262 263 rcar_gen3_set_linectrl(ch, 1, 1); 264 rcar_gen3_set_host_mode(ch, 1); 265 rcar_gen3_enable_vbus_ctrl(ch, 0); 266 267 val = readl(usb2_base + USB2_LINECTRL1); 268 writel(val & ~USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1); 269 } 270 271 static void rcar_gen3_init_for_a_peri(struct rcar_gen3_chan *ch) 272 { 273 rcar_gen3_set_linectrl(ch, 0, 1); 274 rcar_gen3_set_host_mode(ch, 0); 275 rcar_gen3_enable_vbus_ctrl(ch, 1); 276 } 277 278 static void rcar_gen3_init_from_a_peri_to_a_host(struct rcar_gen3_chan *ch) 279 { 280 rcar_gen3_control_otg_irq(ch, 0); 281 282 rcar_gen3_enable_vbus_ctrl(ch, 1); 283 rcar_gen3_init_for_host(ch); 284 285 rcar_gen3_control_otg_irq(ch, 1); 286 } 287 288 static bool rcar_gen3_check_id(struct rcar_gen3_chan *ch) 289 { 290 if (!ch->uses_otg_pins) 291 return (ch->dr_mode == USB_DR_MODE_HOST) ? false : true; 292 293 if (ch->soc_no_adp_ctrl) 294 return !!(readl(ch->base + USB2_LINECTRL1) & USB2_LINECTRL1_USB2_IDMON); 295 296 return !!(readl(ch->base + USB2_ADPCTRL) & USB2_ADPCTRL_IDDIG); 297 } 298 299 static void rcar_gen3_device_recognition(struct rcar_gen3_chan *ch) 300 { 301 if (!rcar_gen3_check_id(ch)) 302 rcar_gen3_init_for_host(ch); 303 else 304 rcar_gen3_init_for_peri(ch); 305 } 306 307 static bool rcar_gen3_is_host(struct rcar_gen3_chan *ch) 308 { 309 return !(readl(ch->base + USB2_COMMCTRL) & USB2_COMMCTRL_OTG_PERI); 310 } 311 312 static enum phy_mode rcar_gen3_get_phy_mode(struct rcar_gen3_chan *ch) 313 { 314 if (rcar_gen3_is_host(ch)) 315 return PHY_MODE_USB_HOST; 316 317 return PHY_MODE_USB_DEVICE; 318 } 319 320 static bool rcar_gen3_is_any_rphy_initialized(struct rcar_gen3_chan *ch) 321 { 322 int i; 323 324 for (i = 0; i < NUM_OF_PHYS; i++) { 325 if (ch->rphys[i].initialized) 326 return true; 327 } 328 329 return false; 330 } 331 332 static bool rcar_gen3_is_any_otg_rphy_initialized(struct rcar_gen3_chan *ch) 333 { 334 for (enum rcar_gen3_phy_index i = PHY_INDEX_BOTH_HC; i <= PHY_INDEX_EHCI; 335 i++) { 336 if (ch->rphys[i].initialized) 337 return true; 338 } 339 340 return false; 341 } 342 343 static bool rcar_gen3_are_all_rphys_power_off(struct rcar_gen3_chan *ch) 344 { 345 int i; 346 347 for (i = 0; i < NUM_OF_PHYS; i++) { 348 if (ch->rphys[i].powered) 349 return false; 350 } 351 352 return true; 353 } 354 355 static ssize_t role_store(struct device *dev, struct device_attribute *attr, 356 const char *buf, size_t count) 357 { 358 struct rcar_gen3_chan *ch = dev_get_drvdata(dev); 359 bool is_b_device; 360 enum phy_mode cur_mode, new_mode; 361 362 guard(spinlock_irqsave)(&ch->lock); 363 364 if (!ch->is_otg_channel || !rcar_gen3_is_any_otg_rphy_initialized(ch)) 365 return -EIO; 366 367 if (sysfs_streq(buf, "host")) 368 new_mode = PHY_MODE_USB_HOST; 369 else if (sysfs_streq(buf, "peripheral")) 370 new_mode = PHY_MODE_USB_DEVICE; 371 else 372 return -EINVAL; 373 374 /* is_b_device: true is B-Device. false is A-Device. */ 375 is_b_device = rcar_gen3_check_id(ch); 376 cur_mode = rcar_gen3_get_phy_mode(ch); 377 378 /* If current and new mode is the same, this returns the error */ 379 if (cur_mode == new_mode) 380 return -EINVAL; 381 382 if (new_mode == PHY_MODE_USB_HOST) { /* And is_host must be false */ 383 if (!is_b_device) /* A-Peripheral */ 384 rcar_gen3_init_from_a_peri_to_a_host(ch); 385 else /* B-Peripheral */ 386 rcar_gen3_init_for_b_host(ch); 387 } else { /* And is_host must be true */ 388 if (!is_b_device) /* A-Host */ 389 rcar_gen3_init_for_a_peri(ch); 390 else /* B-Host */ 391 rcar_gen3_init_for_peri(ch); 392 } 393 394 return count; 395 } 396 397 static ssize_t role_show(struct device *dev, struct device_attribute *attr, 398 char *buf) 399 { 400 struct rcar_gen3_chan *ch = dev_get_drvdata(dev); 401 402 if (!ch->is_otg_channel || !rcar_gen3_is_any_otg_rphy_initialized(ch)) 403 return -EIO; 404 405 return sprintf(buf, "%s\n", rcar_gen3_is_host(ch) ? "host" : 406 "peripheral"); 407 } 408 static DEVICE_ATTR_RW(role); 409 410 static void rcar_gen3_init_otg(struct rcar_gen3_chan *ch) 411 { 412 void __iomem *usb2_base = ch->base; 413 u32 val; 414 415 if (!ch->is_otg_channel || rcar_gen3_is_any_otg_rphy_initialized(ch)) 416 return; 417 418 /* Should not use functions of read-modify-write a register */ 419 val = readl(usb2_base + USB2_LINECTRL1); 420 val = (val & ~USB2_LINECTRL1_DP_RPD) | USB2_LINECTRL1_DPRPD_EN | 421 USB2_LINECTRL1_DMRPD_EN | USB2_LINECTRL1_DM_RPD; 422 writel(val, usb2_base + USB2_LINECTRL1); 423 424 if (!ch->soc_no_adp_ctrl) { 425 val = readl(usb2_base + USB2_VBCTRL); 426 val &= ~USB2_VBCTRL_OCCLREN; 427 writel(val | USB2_VBCTRL_DRVVBUSSEL, usb2_base + USB2_VBCTRL); 428 val = readl(usb2_base + USB2_ADPCTRL); 429 writel(val | USB2_ADPCTRL_IDPULLUP, usb2_base + USB2_ADPCTRL); 430 } 431 mdelay(20); 432 433 writel(0xffffffff, usb2_base + USB2_OBINTSTA); 434 writel(ch->obint_enable_bits, usb2_base + USB2_OBINTEN); 435 436 rcar_gen3_device_recognition(ch); 437 } 438 439 static irqreturn_t rcar_gen3_phy_usb2_irq(int irq, void *_ch) 440 { 441 struct rcar_gen3_chan *ch = _ch; 442 void __iomem *usb2_base = ch->base; 443 struct device *dev = ch->dev; 444 irqreturn_t ret = IRQ_NONE; 445 u32 status; 446 447 pm_runtime_get_noresume(dev); 448 449 if (pm_runtime_suspended(dev)) 450 goto rpm_put; 451 452 scoped_guard(spinlock, &ch->lock) { 453 status = readl(usb2_base + USB2_OBINTSTA); 454 if (status & ch->obint_enable_bits) { 455 dev_vdbg(dev, "%s: %08x\n", __func__, status); 456 writel(ch->obint_enable_bits, usb2_base + USB2_OBINTSTA); 457 rcar_gen3_device_recognition(ch); 458 ret = IRQ_HANDLED; 459 } 460 } 461 462 rpm_put: 463 pm_runtime_put_noidle(dev); 464 return ret; 465 } 466 467 static int rcar_gen3_phy_usb2_init(struct phy *p) 468 { 469 struct rcar_gen3_phy *rphy = phy_get_drvdata(p); 470 struct rcar_gen3_chan *channel = rphy->ch; 471 void __iomem *usb2_base = channel->base; 472 u32 val; 473 474 guard(spinlock_irqsave)(&channel->lock); 475 476 /* Initialize USB2 part */ 477 val = readl(usb2_base + USB2_INT_ENABLE); 478 val |= USB2_INT_ENABLE_UCOM_INTEN | rphy->int_enable_bits; 479 writel(val, usb2_base + USB2_INT_ENABLE); 480 481 if (!rcar_gen3_is_any_rphy_initialized(channel)) { 482 writel(USB2_SPD_RSM_TIMSET_INIT, usb2_base + USB2_SPD_RSM_TIMSET); 483 writel(USB2_OC_TIMSET_INIT, usb2_base + USB2_OC_TIMSET); 484 } 485 486 /* Initialize otg part (only if we initialize a PHY with IRQs). */ 487 if (rphy->int_enable_bits) 488 rcar_gen3_init_otg(channel); 489 490 if (channel->utmi_ctrl) { 491 val = readl(usb2_base + USB2_REGEN_CG_CTRL) | USB2_REGEN_CG_CTRL_UPHY_WEN; 492 writel(val, usb2_base + USB2_REGEN_CG_CTRL); 493 494 writel(USB2_UTMI_CTRL_INIT, usb2_base + USB2_UTMI_CTRL); 495 writel(val & ~USB2_REGEN_CG_CTRL_UPHY_WEN, usb2_base + USB2_REGEN_CG_CTRL); 496 } 497 498 rphy->initialized = true; 499 500 return 0; 501 } 502 503 static int rcar_gen3_phy_usb2_exit(struct phy *p) 504 { 505 struct rcar_gen3_phy *rphy = phy_get_drvdata(p); 506 struct rcar_gen3_chan *channel = rphy->ch; 507 void __iomem *usb2_base = channel->base; 508 u32 val; 509 510 guard(spinlock_irqsave)(&channel->lock); 511 512 rphy->initialized = false; 513 514 val = readl(usb2_base + USB2_INT_ENABLE); 515 val &= ~rphy->int_enable_bits; 516 if (!rcar_gen3_is_any_rphy_initialized(channel)) 517 val &= ~USB2_INT_ENABLE_UCOM_INTEN; 518 writel(val, usb2_base + USB2_INT_ENABLE); 519 520 return 0; 521 } 522 523 static int rcar_gen3_phy_usb2_power_on(struct phy *p) 524 { 525 struct rcar_gen3_phy *rphy = phy_get_drvdata(p); 526 struct rcar_gen3_chan *channel = rphy->ch; 527 void __iomem *usb2_base = channel->base; 528 u32 val; 529 int ret = 0; 530 531 if (channel->vbus) { 532 ret = regulator_enable(channel->vbus); 533 if (ret) 534 return ret; 535 } 536 537 guard(spinlock_irqsave)(&channel->lock); 538 539 if (!rcar_gen3_are_all_rphys_power_off(channel)) 540 goto out; 541 542 val = readl(usb2_base + USB2_USBCTR); 543 val |= USB2_USBCTR_PLL_RST; 544 writel(val, usb2_base + USB2_USBCTR); 545 val &= ~USB2_USBCTR_PLL_RST; 546 writel(val, usb2_base + USB2_USBCTR); 547 548 out: 549 /* The powered flag should be set for any other phys anyway */ 550 rphy->powered = true; 551 552 return 0; 553 } 554 555 static int rcar_gen3_phy_usb2_power_off(struct phy *p) 556 { 557 struct rcar_gen3_phy *rphy = phy_get_drvdata(p); 558 struct rcar_gen3_chan *channel = rphy->ch; 559 int ret = 0; 560 561 scoped_guard(spinlock_irqsave, &channel->lock) { 562 rphy->powered = false; 563 564 if (rcar_gen3_are_all_rphys_power_off(channel)) { 565 u32 val = readl(channel->base + USB2_USBCTR); 566 567 val |= USB2_USBCTR_PLL_RST; 568 writel(val, channel->base + USB2_USBCTR); 569 } 570 } 571 572 if (channel->vbus) 573 ret = regulator_disable(channel->vbus); 574 575 return ret; 576 } 577 578 static const struct phy_ops rcar_gen3_phy_usb2_ops = { 579 .init = rcar_gen3_phy_usb2_init, 580 .exit = rcar_gen3_phy_usb2_exit, 581 .power_on = rcar_gen3_phy_usb2_power_on, 582 .power_off = rcar_gen3_phy_usb2_power_off, 583 .owner = THIS_MODULE, 584 }; 585 586 static const struct phy_ops rz_g1c_phy_usb2_ops = { 587 .init = rcar_gen3_phy_usb2_init, 588 .exit = rcar_gen3_phy_usb2_exit, 589 .owner = THIS_MODULE, 590 }; 591 592 static const struct rcar_gen3_phy_drv_data rcar_gen3_phy_usb2_data = { 593 .phy_usb2_ops = &rcar_gen3_phy_usb2_ops, 594 .no_adp_ctrl = false, 595 }; 596 597 static const struct rcar_gen3_phy_drv_data rz_g1c_phy_usb2_data = { 598 .phy_usb2_ops = &rz_g1c_phy_usb2_ops, 599 .no_adp_ctrl = false, 600 }; 601 602 static const struct rcar_gen3_phy_drv_data rz_g2l_phy_usb2_data = { 603 .phy_usb2_ops = &rcar_gen3_phy_usb2_ops, 604 .no_adp_ctrl = true, 605 }; 606 607 static const struct rcar_gen3_phy_drv_data rz_g3s_phy_usb2_data = { 608 .phy_usb2_ops = &rcar_gen3_phy_usb2_ops, 609 .no_adp_ctrl = true, 610 .init_bus = true, 611 }; 612 613 static const struct rcar_gen3_phy_drv_data rz_v2h_phy_usb2_data = { 614 .phy_usb2_ops = &rcar_gen3_phy_usb2_ops, 615 .no_adp_ctrl = true, 616 .utmi_ctrl = true, 617 }; 618 619 static const struct of_device_id rcar_gen3_phy_usb2_match_table[] = { 620 { 621 .compatible = "renesas,usb2-phy-r8a77470", 622 .data = &rz_g1c_phy_usb2_data, 623 }, 624 { 625 .compatible = "renesas,usb2-phy-r8a7795", 626 .data = &rcar_gen3_phy_usb2_data, 627 }, 628 { 629 .compatible = "renesas,usb2-phy-r8a7796", 630 .data = &rcar_gen3_phy_usb2_data, 631 }, 632 { 633 .compatible = "renesas,usb2-phy-r8a77965", 634 .data = &rcar_gen3_phy_usb2_data, 635 }, 636 { 637 .compatible = "renesas,usb2-phy-r9a08g045", 638 .data = &rz_g3s_phy_usb2_data, 639 }, 640 { 641 .compatible = "renesas,usb2-phy-r9a09g057", 642 .data = &rz_v2h_phy_usb2_data, 643 }, 644 { 645 .compatible = "renesas,rzg2l-usb2-phy", 646 .data = &rz_g2l_phy_usb2_data, 647 }, 648 { 649 .compatible = "renesas,rcar-gen3-usb2-phy", 650 .data = &rcar_gen3_phy_usb2_data, 651 }, 652 { /* sentinel */ }, 653 }; 654 MODULE_DEVICE_TABLE(of, rcar_gen3_phy_usb2_match_table); 655 656 static const unsigned int rcar_gen3_phy_cable[] = { 657 EXTCON_USB, 658 EXTCON_USB_HOST, 659 EXTCON_NONE, 660 }; 661 662 static struct phy *rcar_gen3_phy_usb2_xlate(struct device *dev, 663 const struct of_phandle_args *args) 664 { 665 struct rcar_gen3_chan *ch = dev_get_drvdata(dev); 666 667 if (args->args_count == 0) /* For old version dts */ 668 return ch->rphys[PHY_INDEX_BOTH_HC].phy; 669 else if (args->args_count > 1) /* Prevent invalid args count */ 670 return ERR_PTR(-ENODEV); 671 672 if (args->args[0] >= NUM_OF_PHYS) 673 return ERR_PTR(-ENODEV); 674 675 return ch->rphys[args->args[0]].phy; 676 } 677 678 static enum usb_dr_mode rcar_gen3_get_dr_mode(struct device_node *np) 679 { 680 enum usb_dr_mode candidate = USB_DR_MODE_UNKNOWN; 681 int i; 682 683 /* 684 * If one of device nodes has other dr_mode except UNKNOWN, 685 * this function returns UNKNOWN. To achieve backward compatibility, 686 * this loop starts the index as 0. 687 */ 688 for (i = 0; i < NUM_OF_PHYS; i++) { 689 enum usb_dr_mode mode = of_usb_get_dr_mode_by_phy(np, i); 690 691 if (mode != USB_DR_MODE_UNKNOWN) { 692 if (candidate == USB_DR_MODE_UNKNOWN) 693 candidate = mode; 694 else if (candidate != mode) 695 return USB_DR_MODE_UNKNOWN; 696 } 697 } 698 699 return candidate; 700 } 701 702 static int rcar_gen3_phy_usb2_init_bus(struct rcar_gen3_chan *channel) 703 { 704 struct device *dev = channel->dev; 705 int ret; 706 u32 val; 707 708 channel->rstc = devm_reset_control_array_get_shared(dev); 709 if (IS_ERR(channel->rstc)) 710 return PTR_ERR(channel->rstc); 711 712 ret = pm_runtime_resume_and_get(dev); 713 if (ret) 714 return ret; 715 716 ret = reset_control_deassert(channel->rstc); 717 if (ret) 718 goto rpm_put; 719 720 val = readl(channel->base + USB2_AHB_BUS_CTR); 721 val &= ~USB2_AHB_BUS_CTR_MBL_MASK; 722 val |= USB2_AHB_BUS_CTR_MBL_INCR4; 723 writel(val, channel->base + USB2_AHB_BUS_CTR); 724 725 rpm_put: 726 pm_runtime_put(dev); 727 728 return ret; 729 } 730 731 static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev) 732 { 733 const struct rcar_gen3_phy_drv_data *phy_data; 734 struct device *dev = &pdev->dev; 735 struct rcar_gen3_chan *channel; 736 struct phy_provider *provider; 737 int ret = 0, i, irq; 738 739 if (!dev->of_node) { 740 dev_err(dev, "This driver needs device tree\n"); 741 return -EINVAL; 742 } 743 744 channel = devm_kzalloc(dev, sizeof(*channel), GFP_KERNEL); 745 if (!channel) 746 return -ENOMEM; 747 748 channel->base = devm_platform_ioremap_resource(pdev, 0); 749 if (IS_ERR(channel->base)) 750 return PTR_ERR(channel->base); 751 752 channel->obint_enable_bits = USB2_OBINT_BITS; 753 channel->dr_mode = rcar_gen3_get_dr_mode(dev->of_node); 754 if (channel->dr_mode != USB_DR_MODE_UNKNOWN) { 755 channel->is_otg_channel = true; 756 channel->uses_otg_pins = !of_property_read_bool(dev->of_node, 757 "renesas,no-otg-pins"); 758 channel->extcon = devm_extcon_dev_allocate(dev, 759 rcar_gen3_phy_cable); 760 if (IS_ERR(channel->extcon)) 761 return PTR_ERR(channel->extcon); 762 763 ret = devm_extcon_dev_register(dev, channel->extcon); 764 if (ret < 0) { 765 dev_err(dev, "Failed to register extcon\n"); 766 return ret; 767 } 768 } 769 770 /* 771 * devm_phy_create() will call pm_runtime_enable(&phy->dev); 772 * And then, phy-core will manage runtime pm for this device. 773 */ 774 pm_runtime_enable(dev); 775 776 phy_data = of_device_get_match_data(dev); 777 if (!phy_data) { 778 ret = -EINVAL; 779 goto error; 780 } 781 782 platform_set_drvdata(pdev, channel); 783 channel->dev = dev; 784 785 if (phy_data->init_bus) { 786 ret = rcar_gen3_phy_usb2_init_bus(channel); 787 if (ret) 788 goto error; 789 } 790 791 channel->soc_no_adp_ctrl = phy_data->no_adp_ctrl; 792 if (phy_data->no_adp_ctrl) 793 channel->obint_enable_bits = USB2_OBINT_IDCHG_EN; 794 795 channel->utmi_ctrl = phy_data->utmi_ctrl; 796 797 spin_lock_init(&channel->lock); 798 for (i = 0; i < NUM_OF_PHYS; i++) { 799 channel->rphys[i].phy = devm_phy_create(dev, NULL, 800 phy_data->phy_usb2_ops); 801 if (IS_ERR(channel->rphys[i].phy)) { 802 dev_err(dev, "Failed to create USB2 PHY\n"); 803 ret = PTR_ERR(channel->rphys[i].phy); 804 goto error; 805 } 806 channel->rphys[i].ch = channel; 807 channel->rphys[i].int_enable_bits = rcar_gen3_int_enable[i]; 808 phy_set_drvdata(channel->rphys[i].phy, &channel->rphys[i]); 809 } 810 811 if (channel->soc_no_adp_ctrl && channel->is_otg_channel) 812 channel->vbus = devm_regulator_get_exclusive(dev, "vbus"); 813 else 814 channel->vbus = devm_regulator_get_optional(dev, "vbus"); 815 if (IS_ERR(channel->vbus)) { 816 if (PTR_ERR(channel->vbus) == -EPROBE_DEFER) { 817 ret = PTR_ERR(channel->vbus); 818 goto error; 819 } 820 channel->vbus = NULL; 821 } 822 823 irq = platform_get_irq_optional(pdev, 0); 824 if (irq < 0 && irq != -ENXIO) { 825 ret = irq; 826 goto error; 827 } else if (irq > 0) { 828 INIT_WORK(&channel->work, rcar_gen3_phy_usb2_work); 829 ret = devm_request_irq(dev, irq, rcar_gen3_phy_usb2_irq, 830 IRQF_SHARED, dev_name(dev), channel); 831 if (ret < 0) { 832 dev_err(dev, "Failed to request irq (%d)\n", irq); 833 goto error; 834 } 835 } 836 837 provider = devm_of_phy_provider_register(dev, rcar_gen3_phy_usb2_xlate); 838 if (IS_ERR(provider)) { 839 dev_err(dev, "Failed to register PHY provider\n"); 840 ret = PTR_ERR(provider); 841 goto error; 842 } else if (channel->is_otg_channel) { 843 ret = device_create_file(dev, &dev_attr_role); 844 if (ret < 0) 845 goto error; 846 } 847 848 return 0; 849 850 error: 851 pm_runtime_disable(dev); 852 853 return ret; 854 } 855 856 static void rcar_gen3_phy_usb2_remove(struct platform_device *pdev) 857 { 858 struct rcar_gen3_chan *channel = platform_get_drvdata(pdev); 859 860 if (channel->is_otg_channel) 861 device_remove_file(&pdev->dev, &dev_attr_role); 862 863 reset_control_assert(channel->rstc); 864 pm_runtime_disable(&pdev->dev); 865 }; 866 867 static struct platform_driver rcar_gen3_phy_usb2_driver = { 868 .driver = { 869 .name = "phy_rcar_gen3_usb2", 870 .of_match_table = rcar_gen3_phy_usb2_match_table, 871 }, 872 .probe = rcar_gen3_phy_usb2_probe, 873 .remove = rcar_gen3_phy_usb2_remove, 874 }; 875 module_platform_driver(rcar_gen3_phy_usb2_driver); 876 877 MODULE_LICENSE("GPL v2"); 878 MODULE_DESCRIPTION("Renesas R-Car Gen3 USB 2.0 PHY"); 879 MODULE_AUTHOR("Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>"); 880