1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Renesas R-Car Gen3 for USB2.0 PHY driver 4 * 5 * Copyright (C) 2015-2017 Renesas Electronics Corporation 6 * 7 * This is based on the phy-rcar-gen2 driver: 8 * Copyright (C) 2014 Renesas Solutions Corp. 9 * Copyright (C) 2014 Cogent Embedded, Inc. 10 */ 11 12 #include <linux/extcon-provider.h> 13 #include <linux/interrupt.h> 14 #include <linux/io.h> 15 #include <linux/module.h> 16 #include <linux/of.h> 17 #include <linux/of_address.h> 18 #include <linux/of_device.h> 19 #include <linux/phy/phy.h> 20 #include <linux/platform_device.h> 21 #include <linux/pm_runtime.h> 22 #include <linux/regulator/consumer.h> 23 #include <linux/usb/of.h> 24 #include <linux/workqueue.h> 25 26 /******* USB2.0 Host registers (original offset is +0x200) *******/ 27 #define USB2_INT_ENABLE 0x000 28 #define USB2_USBCTR 0x00c 29 #define USB2_SPD_RSM_TIMSET 0x10c 30 #define USB2_OC_TIMSET 0x110 31 #define USB2_COMMCTRL 0x600 32 #define USB2_OBINTSTA 0x604 33 #define USB2_OBINTEN 0x608 34 #define USB2_VBCTRL 0x60c 35 #define USB2_LINECTRL1 0x610 36 #define USB2_ADPCTRL 0x630 37 38 /* INT_ENABLE */ 39 #define USB2_INT_ENABLE_UCOM_INTEN BIT(3) 40 #define USB2_INT_ENABLE_USBH_INTB_EN BIT(2) /* For EHCI */ 41 #define USB2_INT_ENABLE_USBH_INTA_EN BIT(1) /* For OHCI */ 42 43 /* USBCTR */ 44 #define USB2_USBCTR_DIRPD BIT(2) 45 #define USB2_USBCTR_PLL_RST BIT(1) 46 47 /* SPD_RSM_TIMSET */ 48 #define USB2_SPD_RSM_TIMSET_INIT 0x014e029b 49 50 /* OC_TIMSET */ 51 #define USB2_OC_TIMSET_INIT 0x000209ab 52 53 /* COMMCTRL */ 54 #define USB2_COMMCTRL_OTG_PERI BIT(31) /* 1 = Peripheral mode */ 55 56 /* OBINTSTA and OBINTEN */ 57 #define USB2_OBINT_SESSVLDCHG BIT(12) 58 #define USB2_OBINT_IDDIGCHG BIT(11) 59 #define USB2_OBINT_BITS (USB2_OBINT_SESSVLDCHG | \ 60 USB2_OBINT_IDDIGCHG) 61 62 /* VBCTRL */ 63 #define USB2_VBCTRL_DRVVBUSSEL BIT(8) 64 65 /* LINECTRL1 */ 66 #define USB2_LINECTRL1_DPRPD_EN BIT(19) 67 #define USB2_LINECTRL1_DP_RPD BIT(18) 68 #define USB2_LINECTRL1_DMRPD_EN BIT(17) 69 #define USB2_LINECTRL1_DM_RPD BIT(16) 70 #define USB2_LINECTRL1_OPMODE_NODRV BIT(6) 71 72 /* ADPCTRL */ 73 #define USB2_ADPCTRL_OTGSESSVLD BIT(20) 74 #define USB2_ADPCTRL_IDDIG BIT(19) 75 #define USB2_ADPCTRL_IDPULLUP BIT(5) /* 1 = ID sampling is enabled */ 76 #define USB2_ADPCTRL_DRVVBUS BIT(4) 77 78 #define NUM_OF_PHYS 4 79 enum rcar_gen3_phy_index { 80 PHY_INDEX_BOTH_HC, 81 PHY_INDEX_OHCI, 82 PHY_INDEX_EHCI, 83 PHY_INDEX_HSUSB 84 }; 85 86 static const u32 rcar_gen3_int_enable[NUM_OF_PHYS] = { 87 USB2_INT_ENABLE_USBH_INTB_EN | USB2_INT_ENABLE_USBH_INTA_EN, 88 USB2_INT_ENABLE_USBH_INTA_EN, 89 USB2_INT_ENABLE_USBH_INTB_EN, 90 0 91 }; 92 93 struct rcar_gen3_phy { 94 struct phy *phy; 95 struct rcar_gen3_chan *ch; 96 u32 int_enable_bits; 97 bool initialized; 98 bool otg_initialized; 99 bool powered; 100 }; 101 102 struct rcar_gen3_chan { 103 void __iomem *base; 104 struct device *dev; /* platform_device's device */ 105 struct extcon_dev *extcon; 106 struct rcar_gen3_phy rphys[NUM_OF_PHYS]; 107 struct regulator *vbus; 108 struct work_struct work; 109 enum usb_dr_mode dr_mode; 110 bool extcon_host; 111 bool is_otg_channel; 112 bool uses_otg_pins; 113 }; 114 115 /* 116 * Combination about is_otg_channel and uses_otg_pins: 117 * 118 * Parameters || Behaviors 119 * is_otg_channel | uses_otg_pins || irqs | role sysfs 120 * ---------------------+---------------++--------------+------------ 121 * true | true || enabled | enabled 122 * true | false || disabled | enabled 123 * false | any || disabled | disabled 124 */ 125 126 static void rcar_gen3_phy_usb2_work(struct work_struct *work) 127 { 128 struct rcar_gen3_chan *ch = container_of(work, struct rcar_gen3_chan, 129 work); 130 131 if (ch->extcon_host) { 132 extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, true); 133 extcon_set_state_sync(ch->extcon, EXTCON_USB, false); 134 } else { 135 extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, false); 136 extcon_set_state_sync(ch->extcon, EXTCON_USB, true); 137 } 138 } 139 140 static void rcar_gen3_set_host_mode(struct rcar_gen3_chan *ch, int host) 141 { 142 void __iomem *usb2_base = ch->base; 143 u32 val = readl(usb2_base + USB2_COMMCTRL); 144 145 dev_vdbg(ch->dev, "%s: %08x, %d\n", __func__, val, host); 146 if (host) 147 val &= ~USB2_COMMCTRL_OTG_PERI; 148 else 149 val |= USB2_COMMCTRL_OTG_PERI; 150 writel(val, usb2_base + USB2_COMMCTRL); 151 } 152 153 static void rcar_gen3_set_linectrl(struct rcar_gen3_chan *ch, int dp, int dm) 154 { 155 void __iomem *usb2_base = ch->base; 156 u32 val = readl(usb2_base + USB2_LINECTRL1); 157 158 dev_vdbg(ch->dev, "%s: %08x, %d, %d\n", __func__, val, dp, dm); 159 val &= ~(USB2_LINECTRL1_DP_RPD | USB2_LINECTRL1_DM_RPD); 160 if (dp) 161 val |= USB2_LINECTRL1_DP_RPD; 162 if (dm) 163 val |= USB2_LINECTRL1_DM_RPD; 164 writel(val, usb2_base + USB2_LINECTRL1); 165 } 166 167 static void rcar_gen3_enable_vbus_ctrl(struct rcar_gen3_chan *ch, int vbus) 168 { 169 void __iomem *usb2_base = ch->base; 170 u32 val = readl(usb2_base + USB2_ADPCTRL); 171 172 dev_vdbg(ch->dev, "%s: %08x, %d\n", __func__, val, vbus); 173 if (vbus) 174 val |= USB2_ADPCTRL_DRVVBUS; 175 else 176 val &= ~USB2_ADPCTRL_DRVVBUS; 177 writel(val, usb2_base + USB2_ADPCTRL); 178 } 179 180 static void rcar_gen3_control_otg_irq(struct rcar_gen3_chan *ch, int enable) 181 { 182 void __iomem *usb2_base = ch->base; 183 u32 val = readl(usb2_base + USB2_OBINTEN); 184 185 if (ch->uses_otg_pins && enable) 186 val |= USB2_OBINT_BITS; 187 else 188 val &= ~USB2_OBINT_BITS; 189 writel(val, usb2_base + USB2_OBINTEN); 190 } 191 192 static void rcar_gen3_init_for_host(struct rcar_gen3_chan *ch) 193 { 194 rcar_gen3_set_linectrl(ch, 1, 1); 195 rcar_gen3_set_host_mode(ch, 1); 196 rcar_gen3_enable_vbus_ctrl(ch, 1); 197 198 ch->extcon_host = true; 199 schedule_work(&ch->work); 200 } 201 202 static void rcar_gen3_init_for_peri(struct rcar_gen3_chan *ch) 203 { 204 rcar_gen3_set_linectrl(ch, 0, 1); 205 rcar_gen3_set_host_mode(ch, 0); 206 rcar_gen3_enable_vbus_ctrl(ch, 0); 207 208 ch->extcon_host = false; 209 schedule_work(&ch->work); 210 } 211 212 static void rcar_gen3_init_for_b_host(struct rcar_gen3_chan *ch) 213 { 214 void __iomem *usb2_base = ch->base; 215 u32 val; 216 217 val = readl(usb2_base + USB2_LINECTRL1); 218 writel(val | USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1); 219 220 rcar_gen3_set_linectrl(ch, 1, 1); 221 rcar_gen3_set_host_mode(ch, 1); 222 rcar_gen3_enable_vbus_ctrl(ch, 0); 223 224 val = readl(usb2_base + USB2_LINECTRL1); 225 writel(val & ~USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1); 226 } 227 228 static void rcar_gen3_init_for_a_peri(struct rcar_gen3_chan *ch) 229 { 230 rcar_gen3_set_linectrl(ch, 0, 1); 231 rcar_gen3_set_host_mode(ch, 0); 232 rcar_gen3_enable_vbus_ctrl(ch, 1); 233 } 234 235 static void rcar_gen3_init_from_a_peri_to_a_host(struct rcar_gen3_chan *ch) 236 { 237 rcar_gen3_control_otg_irq(ch, 0); 238 239 rcar_gen3_enable_vbus_ctrl(ch, 1); 240 rcar_gen3_init_for_host(ch); 241 242 rcar_gen3_control_otg_irq(ch, 1); 243 } 244 245 static bool rcar_gen3_check_id(struct rcar_gen3_chan *ch) 246 { 247 if (!ch->uses_otg_pins) 248 return (ch->dr_mode == USB_DR_MODE_HOST) ? false : true; 249 250 return !!(readl(ch->base + USB2_ADPCTRL) & USB2_ADPCTRL_IDDIG); 251 } 252 253 static void rcar_gen3_device_recognition(struct rcar_gen3_chan *ch) 254 { 255 if (!rcar_gen3_check_id(ch)) 256 rcar_gen3_init_for_host(ch); 257 else 258 rcar_gen3_init_for_peri(ch); 259 } 260 261 static bool rcar_gen3_is_host(struct rcar_gen3_chan *ch) 262 { 263 return !(readl(ch->base + USB2_COMMCTRL) & USB2_COMMCTRL_OTG_PERI); 264 } 265 266 static enum phy_mode rcar_gen3_get_phy_mode(struct rcar_gen3_chan *ch) 267 { 268 if (rcar_gen3_is_host(ch)) 269 return PHY_MODE_USB_HOST; 270 271 return PHY_MODE_USB_DEVICE; 272 } 273 274 static bool rcar_gen3_is_any_rphy_initialized(struct rcar_gen3_chan *ch) 275 { 276 int i; 277 278 for (i = 0; i < NUM_OF_PHYS; i++) { 279 if (ch->rphys[i].initialized) 280 return true; 281 } 282 283 return false; 284 } 285 286 static bool rcar_gen3_needs_init_otg(struct rcar_gen3_chan *ch) 287 { 288 int i; 289 290 for (i = 0; i < NUM_OF_PHYS; i++) { 291 if (ch->rphys[i].otg_initialized) 292 return false; 293 } 294 295 return true; 296 } 297 298 static bool rcar_gen3_are_all_rphys_power_off(struct rcar_gen3_chan *ch) 299 { 300 int i; 301 302 for (i = 0; i < NUM_OF_PHYS; i++) { 303 if (ch->rphys[i].powered) 304 return false; 305 } 306 307 return true; 308 } 309 310 static ssize_t role_store(struct device *dev, struct device_attribute *attr, 311 const char *buf, size_t count) 312 { 313 struct rcar_gen3_chan *ch = dev_get_drvdata(dev); 314 bool is_b_device; 315 enum phy_mode cur_mode, new_mode; 316 317 if (!ch->is_otg_channel || !rcar_gen3_is_any_rphy_initialized(ch)) 318 return -EIO; 319 320 if (!strncmp(buf, "host", strlen("host"))) 321 new_mode = PHY_MODE_USB_HOST; 322 else if (!strncmp(buf, "peripheral", strlen("peripheral"))) 323 new_mode = PHY_MODE_USB_DEVICE; 324 else 325 return -EINVAL; 326 327 /* is_b_device: true is B-Device. false is A-Device. */ 328 is_b_device = rcar_gen3_check_id(ch); 329 cur_mode = rcar_gen3_get_phy_mode(ch); 330 331 /* If current and new mode is the same, this returns the error */ 332 if (cur_mode == new_mode) 333 return -EINVAL; 334 335 if (new_mode == PHY_MODE_USB_HOST) { /* And is_host must be false */ 336 if (!is_b_device) /* A-Peripheral */ 337 rcar_gen3_init_from_a_peri_to_a_host(ch); 338 else /* B-Peripheral */ 339 rcar_gen3_init_for_b_host(ch); 340 } else { /* And is_host must be true */ 341 if (!is_b_device) /* A-Host */ 342 rcar_gen3_init_for_a_peri(ch); 343 else /* B-Host */ 344 rcar_gen3_init_for_peri(ch); 345 } 346 347 return count; 348 } 349 350 static ssize_t role_show(struct device *dev, struct device_attribute *attr, 351 char *buf) 352 { 353 struct rcar_gen3_chan *ch = dev_get_drvdata(dev); 354 355 if (!ch->is_otg_channel || !rcar_gen3_is_any_rphy_initialized(ch)) 356 return -EIO; 357 358 return sprintf(buf, "%s\n", rcar_gen3_is_host(ch) ? "host" : 359 "peripheral"); 360 } 361 static DEVICE_ATTR_RW(role); 362 363 static void rcar_gen3_init_otg(struct rcar_gen3_chan *ch) 364 { 365 void __iomem *usb2_base = ch->base; 366 u32 val; 367 368 /* Should not use functions of read-modify-write a register */ 369 val = readl(usb2_base + USB2_LINECTRL1); 370 val = (val & ~USB2_LINECTRL1_DP_RPD) | USB2_LINECTRL1_DPRPD_EN | 371 USB2_LINECTRL1_DMRPD_EN | USB2_LINECTRL1_DM_RPD; 372 writel(val, usb2_base + USB2_LINECTRL1); 373 374 val = readl(usb2_base + USB2_VBCTRL); 375 writel(val | USB2_VBCTRL_DRVVBUSSEL, usb2_base + USB2_VBCTRL); 376 val = readl(usb2_base + USB2_ADPCTRL); 377 writel(val | USB2_ADPCTRL_IDPULLUP, usb2_base + USB2_ADPCTRL); 378 379 msleep(20); 380 381 writel(0xffffffff, usb2_base + USB2_OBINTSTA); 382 writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTEN); 383 384 rcar_gen3_device_recognition(ch); 385 } 386 387 static int rcar_gen3_phy_usb2_init(struct phy *p) 388 { 389 struct rcar_gen3_phy *rphy = phy_get_drvdata(p); 390 struct rcar_gen3_chan *channel = rphy->ch; 391 void __iomem *usb2_base = channel->base; 392 u32 val; 393 394 /* Initialize USB2 part */ 395 val = readl(usb2_base + USB2_INT_ENABLE); 396 val |= USB2_INT_ENABLE_UCOM_INTEN | rphy->int_enable_bits; 397 writel(val, usb2_base + USB2_INT_ENABLE); 398 writel(USB2_SPD_RSM_TIMSET_INIT, usb2_base + USB2_SPD_RSM_TIMSET); 399 writel(USB2_OC_TIMSET_INIT, usb2_base + USB2_OC_TIMSET); 400 401 /* Initialize otg part */ 402 if (channel->is_otg_channel) { 403 if (rcar_gen3_needs_init_otg(channel)) 404 rcar_gen3_init_otg(channel); 405 rphy->otg_initialized = true; 406 } 407 408 rphy->initialized = true; 409 410 return 0; 411 } 412 413 static int rcar_gen3_phy_usb2_exit(struct phy *p) 414 { 415 struct rcar_gen3_phy *rphy = phy_get_drvdata(p); 416 struct rcar_gen3_chan *channel = rphy->ch; 417 void __iomem *usb2_base = channel->base; 418 u32 val; 419 420 rphy->initialized = false; 421 422 if (channel->is_otg_channel) 423 rphy->otg_initialized = false; 424 425 val = readl(usb2_base + USB2_INT_ENABLE); 426 val &= ~rphy->int_enable_bits; 427 if (!rcar_gen3_is_any_rphy_initialized(channel)) 428 val &= ~USB2_INT_ENABLE_UCOM_INTEN; 429 writel(val, usb2_base + USB2_INT_ENABLE); 430 431 return 0; 432 } 433 434 static int rcar_gen3_phy_usb2_power_on(struct phy *p) 435 { 436 struct rcar_gen3_phy *rphy = phy_get_drvdata(p); 437 struct rcar_gen3_chan *channel = rphy->ch; 438 void __iomem *usb2_base = channel->base; 439 u32 val; 440 int ret; 441 442 if (!rcar_gen3_are_all_rphys_power_off(channel)) 443 return 0; 444 445 if (channel->vbus) { 446 ret = regulator_enable(channel->vbus); 447 if (ret) 448 return ret; 449 } 450 451 val = readl(usb2_base + USB2_USBCTR); 452 val |= USB2_USBCTR_PLL_RST; 453 writel(val, usb2_base + USB2_USBCTR); 454 val &= ~USB2_USBCTR_PLL_RST; 455 writel(val, usb2_base + USB2_USBCTR); 456 457 rphy->powered = true; 458 459 return 0; 460 } 461 462 static int rcar_gen3_phy_usb2_power_off(struct phy *p) 463 { 464 struct rcar_gen3_phy *rphy = phy_get_drvdata(p); 465 struct rcar_gen3_chan *channel = rphy->ch; 466 int ret = 0; 467 468 rphy->powered = false; 469 470 if (!rcar_gen3_are_all_rphys_power_off(channel)) 471 return 0; 472 473 if (channel->vbus) 474 ret = regulator_disable(channel->vbus); 475 476 return ret; 477 } 478 479 static const struct phy_ops rcar_gen3_phy_usb2_ops = { 480 .init = rcar_gen3_phy_usb2_init, 481 .exit = rcar_gen3_phy_usb2_exit, 482 .power_on = rcar_gen3_phy_usb2_power_on, 483 .power_off = rcar_gen3_phy_usb2_power_off, 484 .owner = THIS_MODULE, 485 }; 486 487 static const struct phy_ops rz_g1c_phy_usb2_ops = { 488 .init = rcar_gen3_phy_usb2_init, 489 .exit = rcar_gen3_phy_usb2_exit, 490 .owner = THIS_MODULE, 491 }; 492 493 static irqreturn_t rcar_gen3_phy_usb2_irq(int irq, void *_ch) 494 { 495 struct rcar_gen3_chan *ch = _ch; 496 void __iomem *usb2_base = ch->base; 497 u32 status = readl(usb2_base + USB2_OBINTSTA); 498 irqreturn_t ret = IRQ_NONE; 499 500 if (status & USB2_OBINT_BITS) { 501 dev_vdbg(ch->dev, "%s: %08x\n", __func__, status); 502 writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTSTA); 503 rcar_gen3_device_recognition(ch); 504 ret = IRQ_HANDLED; 505 } 506 507 return ret; 508 } 509 510 static const struct of_device_id rcar_gen3_phy_usb2_match_table[] = { 511 { 512 .compatible = "renesas,usb2-phy-r8a77470", 513 .data = &rz_g1c_phy_usb2_ops, 514 }, 515 { 516 .compatible = "renesas,usb2-phy-r8a7795", 517 .data = &rcar_gen3_phy_usb2_ops, 518 }, 519 { 520 .compatible = "renesas,usb2-phy-r8a7796", 521 .data = &rcar_gen3_phy_usb2_ops, 522 }, 523 { 524 .compatible = "renesas,usb2-phy-r8a77965", 525 .data = &rcar_gen3_phy_usb2_ops, 526 }, 527 { 528 .compatible = "renesas,rcar-gen3-usb2-phy", 529 .data = &rcar_gen3_phy_usb2_ops, 530 }, 531 { /* sentinel */ }, 532 }; 533 MODULE_DEVICE_TABLE(of, rcar_gen3_phy_usb2_match_table); 534 535 static const unsigned int rcar_gen3_phy_cable[] = { 536 EXTCON_USB, 537 EXTCON_USB_HOST, 538 EXTCON_NONE, 539 }; 540 541 static struct phy *rcar_gen3_phy_usb2_xlate(struct device *dev, 542 struct of_phandle_args *args) 543 { 544 struct rcar_gen3_chan *ch = dev_get_drvdata(dev); 545 546 if (args->args_count == 0) /* For old version dts */ 547 return ch->rphys[PHY_INDEX_BOTH_HC].phy; 548 else if (args->args_count > 1) /* Prevent invalid args count */ 549 return ERR_PTR(-ENODEV); 550 551 if (args->args[0] >= NUM_OF_PHYS) 552 return ERR_PTR(-ENODEV); 553 554 return ch->rphys[args->args[0]].phy; 555 } 556 557 static enum usb_dr_mode rcar_gen3_get_dr_mode(struct device_node *np) 558 { 559 enum usb_dr_mode candidate = USB_DR_MODE_UNKNOWN; 560 int i; 561 562 /* 563 * If one of device nodes has other dr_mode except UNKNOWN, 564 * this function returns UNKNOWN. To achieve backward compatibility, 565 * this loop starts the index as 0. 566 */ 567 for (i = 0; i < NUM_OF_PHYS; i++) { 568 enum usb_dr_mode mode = of_usb_get_dr_mode_by_phy(np, i); 569 570 if (mode != USB_DR_MODE_UNKNOWN) { 571 if (candidate == USB_DR_MODE_UNKNOWN) 572 candidate = mode; 573 else if (candidate != mode) 574 return USB_DR_MODE_UNKNOWN; 575 } 576 } 577 578 return candidate; 579 } 580 581 static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev) 582 { 583 struct device *dev = &pdev->dev; 584 struct rcar_gen3_chan *channel; 585 struct phy_provider *provider; 586 struct resource *res; 587 const struct phy_ops *phy_usb2_ops; 588 int irq, ret = 0, i; 589 590 if (!dev->of_node) { 591 dev_err(dev, "This driver needs device tree\n"); 592 return -EINVAL; 593 } 594 595 channel = devm_kzalloc(dev, sizeof(*channel), GFP_KERNEL); 596 if (!channel) 597 return -ENOMEM; 598 599 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 600 channel->base = devm_ioremap_resource(dev, res); 601 if (IS_ERR(channel->base)) 602 return PTR_ERR(channel->base); 603 604 /* call request_irq for OTG */ 605 irq = platform_get_irq(pdev, 0); 606 if (irq >= 0) { 607 INIT_WORK(&channel->work, rcar_gen3_phy_usb2_work); 608 irq = devm_request_irq(dev, irq, rcar_gen3_phy_usb2_irq, 609 IRQF_SHARED, dev_name(dev), channel); 610 if (irq < 0) 611 dev_err(dev, "No irq handler (%d)\n", irq); 612 } 613 614 channel->dr_mode = rcar_gen3_get_dr_mode(dev->of_node); 615 if (channel->dr_mode != USB_DR_MODE_UNKNOWN) { 616 int ret; 617 618 channel->is_otg_channel = true; 619 channel->uses_otg_pins = !of_property_read_bool(dev->of_node, 620 "renesas,no-otg-pins"); 621 channel->extcon = devm_extcon_dev_allocate(dev, 622 rcar_gen3_phy_cable); 623 if (IS_ERR(channel->extcon)) 624 return PTR_ERR(channel->extcon); 625 626 ret = devm_extcon_dev_register(dev, channel->extcon); 627 if (ret < 0) { 628 dev_err(dev, "Failed to register extcon\n"); 629 return ret; 630 } 631 } 632 633 /* 634 * devm_phy_create() will call pm_runtime_enable(&phy->dev); 635 * And then, phy-core will manage runtime pm for this device. 636 */ 637 pm_runtime_enable(dev); 638 phy_usb2_ops = of_device_get_match_data(dev); 639 if (!phy_usb2_ops) 640 return -EINVAL; 641 642 for (i = 0; i < NUM_OF_PHYS; i++) { 643 channel->rphys[i].phy = devm_phy_create(dev, NULL, 644 phy_usb2_ops); 645 if (IS_ERR(channel->rphys[i].phy)) { 646 dev_err(dev, "Failed to create USB2 PHY\n"); 647 ret = PTR_ERR(channel->rphys[i].phy); 648 goto error; 649 } 650 channel->rphys[i].ch = channel; 651 channel->rphys[i].int_enable_bits = rcar_gen3_int_enable[i]; 652 phy_set_drvdata(channel->rphys[i].phy, &channel->rphys[i]); 653 } 654 655 channel->vbus = devm_regulator_get_optional(dev, "vbus"); 656 if (IS_ERR(channel->vbus)) { 657 if (PTR_ERR(channel->vbus) == -EPROBE_DEFER) { 658 ret = PTR_ERR(channel->vbus); 659 goto error; 660 } 661 channel->vbus = NULL; 662 } 663 664 platform_set_drvdata(pdev, channel); 665 channel->dev = dev; 666 667 provider = devm_of_phy_provider_register(dev, rcar_gen3_phy_usb2_xlate); 668 if (IS_ERR(provider)) { 669 dev_err(dev, "Failed to register PHY provider\n"); 670 ret = PTR_ERR(provider); 671 goto error; 672 } else if (channel->is_otg_channel) { 673 int ret; 674 675 ret = device_create_file(dev, &dev_attr_role); 676 if (ret < 0) 677 goto error; 678 } 679 680 return 0; 681 682 error: 683 pm_runtime_disable(dev); 684 685 return ret; 686 } 687 688 static int rcar_gen3_phy_usb2_remove(struct platform_device *pdev) 689 { 690 struct rcar_gen3_chan *channel = platform_get_drvdata(pdev); 691 692 if (channel->is_otg_channel) 693 device_remove_file(&pdev->dev, &dev_attr_role); 694 695 pm_runtime_disable(&pdev->dev); 696 697 return 0; 698 }; 699 700 static struct platform_driver rcar_gen3_phy_usb2_driver = { 701 .driver = { 702 .name = "phy_rcar_gen3_usb2", 703 .of_match_table = rcar_gen3_phy_usb2_match_table, 704 }, 705 .probe = rcar_gen3_phy_usb2_probe, 706 .remove = rcar_gen3_phy_usb2_remove, 707 }; 708 module_platform_driver(rcar_gen3_phy_usb2_driver); 709 710 MODULE_LICENSE("GPL v2"); 711 MODULE_DESCRIPTION("Renesas R-Car Gen3 USB 2.0 PHY"); 712 MODULE_AUTHOR("Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>"); 713