1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Renesas R-Car Gen3 for USB2.0 PHY driver
4 *
5 * Copyright (C) 2015-2017 Renesas Electronics Corporation
6 *
7 * This is based on the phy-rcar-gen2 driver:
8 * Copyright (C) 2014 Renesas Solutions Corp.
9 * Copyright (C) 2014 Cogent Embedded, Inc.
10 */
11
12 #include <linux/extcon-provider.h>
13 #include <linux/interrupt.h>
14 #include <linux/io.h>
15 #include <linux/module.h>
16 #include <linux/mutex.h>
17 #include <linux/of.h>
18 #include <linux/phy/phy.h>
19 #include <linux/platform_device.h>
20 #include <linux/pm_runtime.h>
21 #include <linux/regulator/consumer.h>
22 #include <linux/reset.h>
23 #include <linux/string.h>
24 #include <linux/usb/of.h>
25 #include <linux/workqueue.h>
26
27 /******* USB2.0 Host registers (original offset is +0x200) *******/
28 #define USB2_INT_ENABLE 0x000
29 #define USB2_AHB_BUS_CTR 0x008
30 #define USB2_USBCTR 0x00c
31 #define USB2_SPD_RSM_TIMSET 0x10c
32 #define USB2_OC_TIMSET 0x110
33 #define USB2_COMMCTRL 0x600
34 #define USB2_OBINTSTA 0x604
35 #define USB2_OBINTEN 0x608
36 #define USB2_VBCTRL 0x60c
37 #define USB2_LINECTRL1 0x610
38 #define USB2_ADPCTRL 0x630
39
40 /* INT_ENABLE */
41 #define USB2_INT_ENABLE_UCOM_INTEN BIT(3)
42 #define USB2_INT_ENABLE_USBH_INTB_EN BIT(2) /* For EHCI */
43 #define USB2_INT_ENABLE_USBH_INTA_EN BIT(1) /* For OHCI */
44
45 /* AHB_BUS_CTR */
46 #define USB2_AHB_BUS_CTR_MBL_MASK GENMASK(1, 0)
47 #define USB2_AHB_BUS_CTR_MBL_INCR4 2
48
49 /* USBCTR */
50 #define USB2_USBCTR_DIRPD BIT(2)
51 #define USB2_USBCTR_PLL_RST BIT(1)
52
53 /* SPD_RSM_TIMSET */
54 #define USB2_SPD_RSM_TIMSET_INIT 0x014e029b
55
56 /* OC_TIMSET */
57 #define USB2_OC_TIMSET_INIT 0x000209ab
58
59 /* COMMCTRL */
60 #define USB2_COMMCTRL_OTG_PERI BIT(31) /* 1 = Peripheral mode */
61
62 /* OBINTSTA and OBINTEN */
63 #define USB2_OBINT_SESSVLDCHG BIT(12)
64 #define USB2_OBINT_IDDIGCHG BIT(11)
65 #define USB2_OBINT_BITS (USB2_OBINT_SESSVLDCHG | \
66 USB2_OBINT_IDDIGCHG)
67
68 /* VBCTRL */
69 #define USB2_VBCTRL_OCCLREN BIT(16)
70 #define USB2_VBCTRL_DRVVBUSSEL BIT(8)
71 #define USB2_VBCTRL_VBOUT BIT(0)
72
73 /* LINECTRL1 */
74 #define USB2_LINECTRL1_DPRPD_EN BIT(19)
75 #define USB2_LINECTRL1_DP_RPD BIT(18)
76 #define USB2_LINECTRL1_DMRPD_EN BIT(17)
77 #define USB2_LINECTRL1_DM_RPD BIT(16)
78 #define USB2_LINECTRL1_OPMODE_NODRV BIT(6)
79
80 /* ADPCTRL */
81 #define USB2_ADPCTRL_OTGSESSVLD BIT(20)
82 #define USB2_ADPCTRL_IDDIG BIT(19)
83 #define USB2_ADPCTRL_IDPULLUP BIT(5) /* 1 = ID sampling is enabled */
84 #define USB2_ADPCTRL_DRVVBUS BIT(4)
85
86 /* RZ/G2L specific */
87 #define USB2_OBINT_IDCHG_EN BIT(0)
88 #define USB2_LINECTRL1_USB2_IDMON BIT(0)
89
90 #define NUM_OF_PHYS 4
91 enum rcar_gen3_phy_index {
92 PHY_INDEX_BOTH_HC,
93 PHY_INDEX_OHCI,
94 PHY_INDEX_EHCI,
95 PHY_INDEX_HSUSB
96 };
97
98 static const u32 rcar_gen3_int_enable[NUM_OF_PHYS] = {
99 USB2_INT_ENABLE_USBH_INTB_EN | USB2_INT_ENABLE_USBH_INTA_EN,
100 USB2_INT_ENABLE_USBH_INTA_EN,
101 USB2_INT_ENABLE_USBH_INTB_EN,
102 0
103 };
104
105 struct rcar_gen3_phy {
106 struct phy *phy;
107 struct rcar_gen3_chan *ch;
108 u32 int_enable_bits;
109 bool initialized;
110 bool otg_initialized;
111 bool powered;
112 };
113
114 struct rcar_gen3_chan {
115 void __iomem *base;
116 struct device *dev; /* platform_device's device */
117 struct extcon_dev *extcon;
118 struct rcar_gen3_phy rphys[NUM_OF_PHYS];
119 struct regulator *vbus;
120 struct reset_control *rstc;
121 struct work_struct work;
122 struct mutex lock; /* protects rphys[...].powered */
123 enum usb_dr_mode dr_mode;
124 int irq;
125 u32 obint_enable_bits;
126 bool extcon_host;
127 bool is_otg_channel;
128 bool uses_otg_pins;
129 bool soc_no_adp_ctrl;
130 };
131
132 struct rcar_gen3_phy_drv_data {
133 const struct phy_ops *phy_usb2_ops;
134 bool no_adp_ctrl;
135 bool init_bus;
136 };
137
138 /*
139 * Combination about is_otg_channel and uses_otg_pins:
140 *
141 * Parameters || Behaviors
142 * is_otg_channel | uses_otg_pins || irqs | role sysfs
143 * ---------------------+---------------++--------------+------------
144 * true | true || enabled | enabled
145 * true | false || disabled | enabled
146 * false | any || disabled | disabled
147 */
148
rcar_gen3_phy_usb2_work(struct work_struct * work)149 static void rcar_gen3_phy_usb2_work(struct work_struct *work)
150 {
151 struct rcar_gen3_chan *ch = container_of(work, struct rcar_gen3_chan,
152 work);
153
154 if (ch->extcon_host) {
155 extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, true);
156 extcon_set_state_sync(ch->extcon, EXTCON_USB, false);
157 } else {
158 extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, false);
159 extcon_set_state_sync(ch->extcon, EXTCON_USB, true);
160 }
161 }
162
rcar_gen3_set_host_mode(struct rcar_gen3_chan * ch,int host)163 static void rcar_gen3_set_host_mode(struct rcar_gen3_chan *ch, int host)
164 {
165 void __iomem *usb2_base = ch->base;
166 u32 val = readl(usb2_base + USB2_COMMCTRL);
167
168 dev_vdbg(ch->dev, "%s: %08x, %d\n", __func__, val, host);
169 if (host)
170 val &= ~USB2_COMMCTRL_OTG_PERI;
171 else
172 val |= USB2_COMMCTRL_OTG_PERI;
173 writel(val, usb2_base + USB2_COMMCTRL);
174 }
175
rcar_gen3_set_linectrl(struct rcar_gen3_chan * ch,int dp,int dm)176 static void rcar_gen3_set_linectrl(struct rcar_gen3_chan *ch, int dp, int dm)
177 {
178 void __iomem *usb2_base = ch->base;
179 u32 val = readl(usb2_base + USB2_LINECTRL1);
180
181 dev_vdbg(ch->dev, "%s: %08x, %d, %d\n", __func__, val, dp, dm);
182 val &= ~(USB2_LINECTRL1_DP_RPD | USB2_LINECTRL1_DM_RPD);
183 if (dp)
184 val |= USB2_LINECTRL1_DP_RPD;
185 if (dm)
186 val |= USB2_LINECTRL1_DM_RPD;
187 writel(val, usb2_base + USB2_LINECTRL1);
188 }
189
rcar_gen3_enable_vbus_ctrl(struct rcar_gen3_chan * ch,int vbus)190 static void rcar_gen3_enable_vbus_ctrl(struct rcar_gen3_chan *ch, int vbus)
191 {
192 void __iomem *usb2_base = ch->base;
193 u32 vbus_ctrl_reg = USB2_ADPCTRL;
194 u32 vbus_ctrl_val = USB2_ADPCTRL_DRVVBUS;
195 u32 val;
196
197 dev_vdbg(ch->dev, "%s: %08x, %d\n", __func__, val, vbus);
198 if (ch->soc_no_adp_ctrl) {
199 if (ch->vbus)
200 regulator_hardware_enable(ch->vbus, vbus);
201
202 vbus_ctrl_reg = USB2_VBCTRL;
203 vbus_ctrl_val = USB2_VBCTRL_VBOUT;
204 }
205
206 val = readl(usb2_base + vbus_ctrl_reg);
207 if (vbus)
208 val |= vbus_ctrl_val;
209 else
210 val &= ~vbus_ctrl_val;
211 writel(val, usb2_base + vbus_ctrl_reg);
212 }
213
rcar_gen3_control_otg_irq(struct rcar_gen3_chan * ch,int enable)214 static void rcar_gen3_control_otg_irq(struct rcar_gen3_chan *ch, int enable)
215 {
216 void __iomem *usb2_base = ch->base;
217 u32 val = readl(usb2_base + USB2_OBINTEN);
218
219 if (ch->uses_otg_pins && enable)
220 val |= ch->obint_enable_bits;
221 else
222 val &= ~ch->obint_enable_bits;
223 writel(val, usb2_base + USB2_OBINTEN);
224 }
225
rcar_gen3_init_for_host(struct rcar_gen3_chan * ch)226 static void rcar_gen3_init_for_host(struct rcar_gen3_chan *ch)
227 {
228 rcar_gen3_set_linectrl(ch, 1, 1);
229 rcar_gen3_set_host_mode(ch, 1);
230 rcar_gen3_enable_vbus_ctrl(ch, 1);
231
232 ch->extcon_host = true;
233 schedule_work(&ch->work);
234 }
235
rcar_gen3_init_for_peri(struct rcar_gen3_chan * ch)236 static void rcar_gen3_init_for_peri(struct rcar_gen3_chan *ch)
237 {
238 rcar_gen3_set_linectrl(ch, 0, 1);
239 rcar_gen3_set_host_mode(ch, 0);
240 rcar_gen3_enable_vbus_ctrl(ch, 0);
241
242 ch->extcon_host = false;
243 schedule_work(&ch->work);
244 }
245
rcar_gen3_init_for_b_host(struct rcar_gen3_chan * ch)246 static void rcar_gen3_init_for_b_host(struct rcar_gen3_chan *ch)
247 {
248 void __iomem *usb2_base = ch->base;
249 u32 val;
250
251 val = readl(usb2_base + USB2_LINECTRL1);
252 writel(val | USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
253
254 rcar_gen3_set_linectrl(ch, 1, 1);
255 rcar_gen3_set_host_mode(ch, 1);
256 rcar_gen3_enable_vbus_ctrl(ch, 0);
257
258 val = readl(usb2_base + USB2_LINECTRL1);
259 writel(val & ~USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
260 }
261
rcar_gen3_init_for_a_peri(struct rcar_gen3_chan * ch)262 static void rcar_gen3_init_for_a_peri(struct rcar_gen3_chan *ch)
263 {
264 rcar_gen3_set_linectrl(ch, 0, 1);
265 rcar_gen3_set_host_mode(ch, 0);
266 rcar_gen3_enable_vbus_ctrl(ch, 1);
267 }
268
rcar_gen3_init_from_a_peri_to_a_host(struct rcar_gen3_chan * ch)269 static void rcar_gen3_init_from_a_peri_to_a_host(struct rcar_gen3_chan *ch)
270 {
271 rcar_gen3_control_otg_irq(ch, 0);
272
273 rcar_gen3_enable_vbus_ctrl(ch, 1);
274 rcar_gen3_init_for_host(ch);
275
276 rcar_gen3_control_otg_irq(ch, 1);
277 }
278
rcar_gen3_check_id(struct rcar_gen3_chan * ch)279 static bool rcar_gen3_check_id(struct rcar_gen3_chan *ch)
280 {
281 if (!ch->uses_otg_pins)
282 return (ch->dr_mode == USB_DR_MODE_HOST) ? false : true;
283
284 if (ch->soc_no_adp_ctrl)
285 return !!(readl(ch->base + USB2_LINECTRL1) & USB2_LINECTRL1_USB2_IDMON);
286
287 return !!(readl(ch->base + USB2_ADPCTRL) & USB2_ADPCTRL_IDDIG);
288 }
289
rcar_gen3_device_recognition(struct rcar_gen3_chan * ch)290 static void rcar_gen3_device_recognition(struct rcar_gen3_chan *ch)
291 {
292 if (!rcar_gen3_check_id(ch))
293 rcar_gen3_init_for_host(ch);
294 else
295 rcar_gen3_init_for_peri(ch);
296 }
297
rcar_gen3_is_host(struct rcar_gen3_chan * ch)298 static bool rcar_gen3_is_host(struct rcar_gen3_chan *ch)
299 {
300 return !(readl(ch->base + USB2_COMMCTRL) & USB2_COMMCTRL_OTG_PERI);
301 }
302
rcar_gen3_get_phy_mode(struct rcar_gen3_chan * ch)303 static enum phy_mode rcar_gen3_get_phy_mode(struct rcar_gen3_chan *ch)
304 {
305 if (rcar_gen3_is_host(ch))
306 return PHY_MODE_USB_HOST;
307
308 return PHY_MODE_USB_DEVICE;
309 }
310
rcar_gen3_is_any_rphy_initialized(struct rcar_gen3_chan * ch)311 static bool rcar_gen3_is_any_rphy_initialized(struct rcar_gen3_chan *ch)
312 {
313 int i;
314
315 for (i = 0; i < NUM_OF_PHYS; i++) {
316 if (ch->rphys[i].initialized)
317 return true;
318 }
319
320 return false;
321 }
322
rcar_gen3_needs_init_otg(struct rcar_gen3_chan * ch)323 static bool rcar_gen3_needs_init_otg(struct rcar_gen3_chan *ch)
324 {
325 int i;
326
327 for (i = 0; i < NUM_OF_PHYS; i++) {
328 if (ch->rphys[i].otg_initialized)
329 return false;
330 }
331
332 return true;
333 }
334
rcar_gen3_are_all_rphys_power_off(struct rcar_gen3_chan * ch)335 static bool rcar_gen3_are_all_rphys_power_off(struct rcar_gen3_chan *ch)
336 {
337 int i;
338
339 for (i = 0; i < NUM_OF_PHYS; i++) {
340 if (ch->rphys[i].powered)
341 return false;
342 }
343
344 return true;
345 }
346
role_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)347 static ssize_t role_store(struct device *dev, struct device_attribute *attr,
348 const char *buf, size_t count)
349 {
350 struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
351 bool is_b_device;
352 enum phy_mode cur_mode, new_mode;
353
354 if (!ch->is_otg_channel || !rcar_gen3_is_any_rphy_initialized(ch))
355 return -EIO;
356
357 if (sysfs_streq(buf, "host"))
358 new_mode = PHY_MODE_USB_HOST;
359 else if (sysfs_streq(buf, "peripheral"))
360 new_mode = PHY_MODE_USB_DEVICE;
361 else
362 return -EINVAL;
363
364 /* is_b_device: true is B-Device. false is A-Device. */
365 is_b_device = rcar_gen3_check_id(ch);
366 cur_mode = rcar_gen3_get_phy_mode(ch);
367
368 /* If current and new mode is the same, this returns the error */
369 if (cur_mode == new_mode)
370 return -EINVAL;
371
372 if (new_mode == PHY_MODE_USB_HOST) { /* And is_host must be false */
373 if (!is_b_device) /* A-Peripheral */
374 rcar_gen3_init_from_a_peri_to_a_host(ch);
375 else /* B-Peripheral */
376 rcar_gen3_init_for_b_host(ch);
377 } else { /* And is_host must be true */
378 if (!is_b_device) /* A-Host */
379 rcar_gen3_init_for_a_peri(ch);
380 else /* B-Host */
381 rcar_gen3_init_for_peri(ch);
382 }
383
384 return count;
385 }
386
role_show(struct device * dev,struct device_attribute * attr,char * buf)387 static ssize_t role_show(struct device *dev, struct device_attribute *attr,
388 char *buf)
389 {
390 struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
391
392 if (!ch->is_otg_channel || !rcar_gen3_is_any_rphy_initialized(ch))
393 return -EIO;
394
395 return sprintf(buf, "%s\n", rcar_gen3_is_host(ch) ? "host" :
396 "peripheral");
397 }
398 static DEVICE_ATTR_RW(role);
399
rcar_gen3_init_otg(struct rcar_gen3_chan * ch)400 static void rcar_gen3_init_otg(struct rcar_gen3_chan *ch)
401 {
402 void __iomem *usb2_base = ch->base;
403 u32 val;
404
405 /* Should not use functions of read-modify-write a register */
406 val = readl(usb2_base + USB2_LINECTRL1);
407 val = (val & ~USB2_LINECTRL1_DP_RPD) | USB2_LINECTRL1_DPRPD_EN |
408 USB2_LINECTRL1_DMRPD_EN | USB2_LINECTRL1_DM_RPD;
409 writel(val, usb2_base + USB2_LINECTRL1);
410
411 if (!ch->soc_no_adp_ctrl) {
412 val = readl(usb2_base + USB2_VBCTRL);
413 val &= ~USB2_VBCTRL_OCCLREN;
414 writel(val | USB2_VBCTRL_DRVVBUSSEL, usb2_base + USB2_VBCTRL);
415 val = readl(usb2_base + USB2_ADPCTRL);
416 writel(val | USB2_ADPCTRL_IDPULLUP, usb2_base + USB2_ADPCTRL);
417 }
418 msleep(20);
419
420 writel(0xffffffff, usb2_base + USB2_OBINTSTA);
421 writel(ch->obint_enable_bits, usb2_base + USB2_OBINTEN);
422
423 rcar_gen3_device_recognition(ch);
424 }
425
rcar_gen3_phy_usb2_irq(int irq,void * _ch)426 static irqreturn_t rcar_gen3_phy_usb2_irq(int irq, void *_ch)
427 {
428 struct rcar_gen3_chan *ch = _ch;
429 void __iomem *usb2_base = ch->base;
430 u32 status = readl(usb2_base + USB2_OBINTSTA);
431 irqreturn_t ret = IRQ_NONE;
432
433 if (status & ch->obint_enable_bits) {
434 dev_vdbg(ch->dev, "%s: %08x\n", __func__, status);
435 writel(ch->obint_enable_bits, usb2_base + USB2_OBINTSTA);
436 rcar_gen3_device_recognition(ch);
437 ret = IRQ_HANDLED;
438 }
439
440 return ret;
441 }
442
rcar_gen3_phy_usb2_init(struct phy * p)443 static int rcar_gen3_phy_usb2_init(struct phy *p)
444 {
445 struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
446 struct rcar_gen3_chan *channel = rphy->ch;
447 void __iomem *usb2_base = channel->base;
448 u32 val;
449 int ret;
450
451 if (!rcar_gen3_is_any_rphy_initialized(channel) && channel->irq >= 0) {
452 INIT_WORK(&channel->work, rcar_gen3_phy_usb2_work);
453 ret = request_irq(channel->irq, rcar_gen3_phy_usb2_irq,
454 IRQF_SHARED, dev_name(channel->dev), channel);
455 if (ret < 0) {
456 dev_err(channel->dev, "No irq handler (%d)\n", channel->irq);
457 return ret;
458 }
459 }
460
461 /* Initialize USB2 part */
462 val = readl(usb2_base + USB2_INT_ENABLE);
463 val |= USB2_INT_ENABLE_UCOM_INTEN | rphy->int_enable_bits;
464 writel(val, usb2_base + USB2_INT_ENABLE);
465 writel(USB2_SPD_RSM_TIMSET_INIT, usb2_base + USB2_SPD_RSM_TIMSET);
466 writel(USB2_OC_TIMSET_INIT, usb2_base + USB2_OC_TIMSET);
467
468 /* Initialize otg part */
469 if (channel->is_otg_channel) {
470 if (rcar_gen3_needs_init_otg(channel))
471 rcar_gen3_init_otg(channel);
472 rphy->otg_initialized = true;
473 }
474
475 rphy->initialized = true;
476
477 return 0;
478 }
479
rcar_gen3_phy_usb2_exit(struct phy * p)480 static int rcar_gen3_phy_usb2_exit(struct phy *p)
481 {
482 struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
483 struct rcar_gen3_chan *channel = rphy->ch;
484 void __iomem *usb2_base = channel->base;
485 u32 val;
486
487 rphy->initialized = false;
488
489 if (channel->is_otg_channel)
490 rphy->otg_initialized = false;
491
492 val = readl(usb2_base + USB2_INT_ENABLE);
493 val &= ~rphy->int_enable_bits;
494 if (!rcar_gen3_is_any_rphy_initialized(channel))
495 val &= ~USB2_INT_ENABLE_UCOM_INTEN;
496 writel(val, usb2_base + USB2_INT_ENABLE);
497
498 if (channel->irq >= 0 && !rcar_gen3_is_any_rphy_initialized(channel))
499 free_irq(channel->irq, channel);
500
501 return 0;
502 }
503
rcar_gen3_phy_usb2_power_on(struct phy * p)504 static int rcar_gen3_phy_usb2_power_on(struct phy *p)
505 {
506 struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
507 struct rcar_gen3_chan *channel = rphy->ch;
508 void __iomem *usb2_base = channel->base;
509 u32 val;
510 int ret = 0;
511
512 mutex_lock(&channel->lock);
513 if (!rcar_gen3_are_all_rphys_power_off(channel))
514 goto out;
515
516 if (channel->vbus) {
517 ret = regulator_enable(channel->vbus);
518 if (ret)
519 goto out;
520 }
521
522 val = readl(usb2_base + USB2_USBCTR);
523 val |= USB2_USBCTR_PLL_RST;
524 writel(val, usb2_base + USB2_USBCTR);
525 val &= ~USB2_USBCTR_PLL_RST;
526 writel(val, usb2_base + USB2_USBCTR);
527
528 out:
529 /* The powered flag should be set for any other phys anyway */
530 rphy->powered = true;
531 mutex_unlock(&channel->lock);
532
533 return 0;
534 }
535
rcar_gen3_phy_usb2_power_off(struct phy * p)536 static int rcar_gen3_phy_usb2_power_off(struct phy *p)
537 {
538 struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
539 struct rcar_gen3_chan *channel = rphy->ch;
540 int ret = 0;
541
542 mutex_lock(&channel->lock);
543 rphy->powered = false;
544
545 if (!rcar_gen3_are_all_rphys_power_off(channel))
546 goto out;
547
548 if (channel->vbus)
549 ret = regulator_disable(channel->vbus);
550
551 out:
552 mutex_unlock(&channel->lock);
553
554 return ret;
555 }
556
557 static const struct phy_ops rcar_gen3_phy_usb2_ops = {
558 .init = rcar_gen3_phy_usb2_init,
559 .exit = rcar_gen3_phy_usb2_exit,
560 .power_on = rcar_gen3_phy_usb2_power_on,
561 .power_off = rcar_gen3_phy_usb2_power_off,
562 .owner = THIS_MODULE,
563 };
564
565 static const struct phy_ops rz_g1c_phy_usb2_ops = {
566 .init = rcar_gen3_phy_usb2_init,
567 .exit = rcar_gen3_phy_usb2_exit,
568 .owner = THIS_MODULE,
569 };
570
571 static const struct rcar_gen3_phy_drv_data rcar_gen3_phy_usb2_data = {
572 .phy_usb2_ops = &rcar_gen3_phy_usb2_ops,
573 .no_adp_ctrl = false,
574 };
575
576 static const struct rcar_gen3_phy_drv_data rz_g1c_phy_usb2_data = {
577 .phy_usb2_ops = &rz_g1c_phy_usb2_ops,
578 .no_adp_ctrl = false,
579 };
580
581 static const struct rcar_gen3_phy_drv_data rz_g2l_phy_usb2_data = {
582 .phy_usb2_ops = &rcar_gen3_phy_usb2_ops,
583 .no_adp_ctrl = true,
584 };
585
586 static const struct rcar_gen3_phy_drv_data rz_g3s_phy_usb2_data = {
587 .phy_usb2_ops = &rcar_gen3_phy_usb2_ops,
588 .no_adp_ctrl = true,
589 .init_bus = true,
590 };
591
592 static const struct of_device_id rcar_gen3_phy_usb2_match_table[] = {
593 {
594 .compatible = "renesas,usb2-phy-r8a77470",
595 .data = &rz_g1c_phy_usb2_data,
596 },
597 {
598 .compatible = "renesas,usb2-phy-r8a7795",
599 .data = &rcar_gen3_phy_usb2_data,
600 },
601 {
602 .compatible = "renesas,usb2-phy-r8a7796",
603 .data = &rcar_gen3_phy_usb2_data,
604 },
605 {
606 .compatible = "renesas,usb2-phy-r8a77965",
607 .data = &rcar_gen3_phy_usb2_data,
608 },
609 {
610 .compatible = "renesas,rzg2l-usb2-phy",
611 .data = &rz_g2l_phy_usb2_data,
612 },
613 {
614 .compatible = "renesas,usb2-phy-r9a08g045",
615 .data = &rz_g3s_phy_usb2_data,
616 },
617 {
618 .compatible = "renesas,rcar-gen3-usb2-phy",
619 .data = &rcar_gen3_phy_usb2_data,
620 },
621 { /* sentinel */ },
622 };
623 MODULE_DEVICE_TABLE(of, rcar_gen3_phy_usb2_match_table);
624
625 static const unsigned int rcar_gen3_phy_cable[] = {
626 EXTCON_USB,
627 EXTCON_USB_HOST,
628 EXTCON_NONE,
629 };
630
rcar_gen3_phy_usb2_xlate(struct device * dev,const struct of_phandle_args * args)631 static struct phy *rcar_gen3_phy_usb2_xlate(struct device *dev,
632 const struct of_phandle_args *args)
633 {
634 struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
635
636 if (args->args_count == 0) /* For old version dts */
637 return ch->rphys[PHY_INDEX_BOTH_HC].phy;
638 else if (args->args_count > 1) /* Prevent invalid args count */
639 return ERR_PTR(-ENODEV);
640
641 if (args->args[0] >= NUM_OF_PHYS)
642 return ERR_PTR(-ENODEV);
643
644 return ch->rphys[args->args[0]].phy;
645 }
646
rcar_gen3_get_dr_mode(struct device_node * np)647 static enum usb_dr_mode rcar_gen3_get_dr_mode(struct device_node *np)
648 {
649 enum usb_dr_mode candidate = USB_DR_MODE_UNKNOWN;
650 int i;
651
652 /*
653 * If one of device nodes has other dr_mode except UNKNOWN,
654 * this function returns UNKNOWN. To achieve backward compatibility,
655 * this loop starts the index as 0.
656 */
657 for (i = 0; i < NUM_OF_PHYS; i++) {
658 enum usb_dr_mode mode = of_usb_get_dr_mode_by_phy(np, i);
659
660 if (mode != USB_DR_MODE_UNKNOWN) {
661 if (candidate == USB_DR_MODE_UNKNOWN)
662 candidate = mode;
663 else if (candidate != mode)
664 return USB_DR_MODE_UNKNOWN;
665 }
666 }
667
668 return candidate;
669 }
670
rcar_gen3_phy_usb2_init_bus(struct rcar_gen3_chan * channel)671 static int rcar_gen3_phy_usb2_init_bus(struct rcar_gen3_chan *channel)
672 {
673 struct device *dev = channel->dev;
674 int ret;
675 u32 val;
676
677 channel->rstc = devm_reset_control_array_get_shared(dev);
678 if (IS_ERR(channel->rstc))
679 return PTR_ERR(channel->rstc);
680
681 ret = pm_runtime_resume_and_get(dev);
682 if (ret)
683 return ret;
684
685 ret = reset_control_deassert(channel->rstc);
686 if (ret)
687 goto rpm_put;
688
689 val = readl(channel->base + USB2_AHB_BUS_CTR);
690 val &= ~USB2_AHB_BUS_CTR_MBL_MASK;
691 val |= USB2_AHB_BUS_CTR_MBL_INCR4;
692 writel(val, channel->base + USB2_AHB_BUS_CTR);
693
694 rpm_put:
695 pm_runtime_put(dev);
696
697 return ret;
698 }
699
rcar_gen3_phy_usb2_probe(struct platform_device * pdev)700 static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
701 {
702 const struct rcar_gen3_phy_drv_data *phy_data;
703 struct device *dev = &pdev->dev;
704 struct rcar_gen3_chan *channel;
705 struct phy_provider *provider;
706 int ret = 0, i;
707
708 if (!dev->of_node) {
709 dev_err(dev, "This driver needs device tree\n");
710 return -EINVAL;
711 }
712
713 channel = devm_kzalloc(dev, sizeof(*channel), GFP_KERNEL);
714 if (!channel)
715 return -ENOMEM;
716
717 channel->base = devm_platform_ioremap_resource(pdev, 0);
718 if (IS_ERR(channel->base))
719 return PTR_ERR(channel->base);
720
721 channel->obint_enable_bits = USB2_OBINT_BITS;
722 /* get irq number here and request_irq for OTG in phy_init */
723 channel->irq = platform_get_irq_optional(pdev, 0);
724 channel->dr_mode = rcar_gen3_get_dr_mode(dev->of_node);
725 if (channel->dr_mode != USB_DR_MODE_UNKNOWN) {
726 channel->is_otg_channel = true;
727 channel->uses_otg_pins = !of_property_read_bool(dev->of_node,
728 "renesas,no-otg-pins");
729 channel->extcon = devm_extcon_dev_allocate(dev,
730 rcar_gen3_phy_cable);
731 if (IS_ERR(channel->extcon))
732 return PTR_ERR(channel->extcon);
733
734 ret = devm_extcon_dev_register(dev, channel->extcon);
735 if (ret < 0) {
736 dev_err(dev, "Failed to register extcon\n");
737 return ret;
738 }
739 }
740
741 /*
742 * devm_phy_create() will call pm_runtime_enable(&phy->dev);
743 * And then, phy-core will manage runtime pm for this device.
744 */
745 pm_runtime_enable(dev);
746
747 phy_data = of_device_get_match_data(dev);
748 if (!phy_data) {
749 ret = -EINVAL;
750 goto error;
751 }
752
753 platform_set_drvdata(pdev, channel);
754 channel->dev = dev;
755
756 if (phy_data->init_bus) {
757 ret = rcar_gen3_phy_usb2_init_bus(channel);
758 if (ret)
759 goto error;
760 }
761
762 channel->soc_no_adp_ctrl = phy_data->no_adp_ctrl;
763 if (phy_data->no_adp_ctrl)
764 channel->obint_enable_bits = USB2_OBINT_IDCHG_EN;
765
766 mutex_init(&channel->lock);
767 for (i = 0; i < NUM_OF_PHYS; i++) {
768 channel->rphys[i].phy = devm_phy_create(dev, NULL,
769 phy_data->phy_usb2_ops);
770 if (IS_ERR(channel->rphys[i].phy)) {
771 dev_err(dev, "Failed to create USB2 PHY\n");
772 ret = PTR_ERR(channel->rphys[i].phy);
773 goto error;
774 }
775 channel->rphys[i].ch = channel;
776 channel->rphys[i].int_enable_bits = rcar_gen3_int_enable[i];
777 phy_set_drvdata(channel->rphys[i].phy, &channel->rphys[i]);
778 }
779
780 if (channel->soc_no_adp_ctrl && channel->is_otg_channel)
781 channel->vbus = devm_regulator_get_exclusive(dev, "vbus");
782 else
783 channel->vbus = devm_regulator_get_optional(dev, "vbus");
784 if (IS_ERR(channel->vbus)) {
785 if (PTR_ERR(channel->vbus) == -EPROBE_DEFER) {
786 ret = PTR_ERR(channel->vbus);
787 goto error;
788 }
789 channel->vbus = NULL;
790 }
791
792 provider = devm_of_phy_provider_register(dev, rcar_gen3_phy_usb2_xlate);
793 if (IS_ERR(provider)) {
794 dev_err(dev, "Failed to register PHY provider\n");
795 ret = PTR_ERR(provider);
796 goto error;
797 } else if (channel->is_otg_channel) {
798 ret = device_create_file(dev, &dev_attr_role);
799 if (ret < 0)
800 goto error;
801 }
802
803 return 0;
804
805 error:
806 pm_runtime_disable(dev);
807
808 return ret;
809 }
810
rcar_gen3_phy_usb2_remove(struct platform_device * pdev)811 static void rcar_gen3_phy_usb2_remove(struct platform_device *pdev)
812 {
813 struct rcar_gen3_chan *channel = platform_get_drvdata(pdev);
814
815 if (channel->is_otg_channel)
816 device_remove_file(&pdev->dev, &dev_attr_role);
817
818 reset_control_assert(channel->rstc);
819 pm_runtime_disable(&pdev->dev);
820 };
821
822 static struct platform_driver rcar_gen3_phy_usb2_driver = {
823 .driver = {
824 .name = "phy_rcar_gen3_usb2",
825 .of_match_table = rcar_gen3_phy_usb2_match_table,
826 },
827 .probe = rcar_gen3_phy_usb2_probe,
828 .remove_new = rcar_gen3_phy_usb2_remove,
829 };
830 module_platform_driver(rcar_gen3_phy_usb2_driver);
831
832 MODULE_LICENSE("GPL v2");
833 MODULE_DESCRIPTION("Renesas R-Car Gen3 USB 2.0 PHY");
834 MODULE_AUTHOR("Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>");
835