xref: /linux/drivers/phy/qualcomm/phy-qcom-qmp-qserdes-txrx-v7.h (revision 6e7fd890f1d6ac83805409e9c346240de2705584)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright (c) 2023, Linaro Limited
4  */
5 
6 #ifndef QCOM_PHY_QMP_QSERDES_TXRX_V7_H_
7 #define QCOM_PHY_QMP_QSERDES_TXRX_V7_H_
8 
9 #define QSERDES_V7_TX_CLKBUF_ENABLE				0x08
10 #define QSERDES_V7_TX_RESET_TSYNC_EN				0x1c
11 #define QSERDES_V7_TX_PRE_STALL_LDO_BOOST_EN			0x20
12 #define QSERDES_V7_TX_TX_BAND					0x24
13 #define QSERDES_V7_TX_INTERFACE_SELECT				0x2c
14 #define QSERDES_V7_TX_RES_CODE_LANE_TX				0x34
15 #define QSERDES_V7_TX_RES_CODE_LANE_RX				0x38
16 #define QSERDES_V7_TX_RES_CODE_LANE_OFFSET_TX			0x3c
17 #define QSERDES_V7_TX_RES_CODE_LANE_OFFSET_RX			0x40
18 #define QSERDES_V7_TX_PARRATE_REC_DETECT_IDLE_EN		0x60
19 #define QSERDES_V7_TX_BIST_PATTERN7				0x7c
20 #define QSERDES_V7_TX_LANE_MODE_1				0x84
21 #define QSERDES_V7_TX_LANE_MODE_2				0x88
22 #define QSERDES_V7_TX_LANE_MODE_3				0x8c
23 #define QSERDES_V7_TX_LANE_MODE_4				0x90
24 #define QSERDES_V7_TX_LANE_MODE_5				0x94
25 #define QSERDES_V7_TX_RCV_DETECT_LVL_2				0xa4
26 #define QSERDES_V7_TX_TRAN_DRVR_EMP_EN				0xc0
27 #define QSERDES_V7_TX_TX_INTERFACE_MODE				0xc4
28 #define QSERDES_V7_TX_VMODE_CTRL1				0xc8
29 #define QSERDES_V7_TX_PI_QEC_CTRL				0xe4
30 
31 #define QSERDES_V7_RX_UCDR_FO_GAIN				0x08
32 #define QSERDES_V7_RX_UCDR_SO_GAIN				0x14
33 #define QSERDES_V7_RX_UCDR_FASTLOCK_FO_GAIN			0x30
34 #define QSERDES_V7_RX_UCDR_SO_SATURATION_AND_ENABLE		0x34
35 #define QSERDES_V7_RX_UCDR_FASTLOCK_COUNT_LOW			0x3c
36 #define QSERDES_V7_RX_UCDR_FASTLOCK_COUNT_HIGH			0x40
37 #define QSERDES_V7_RX_UCDR_PI_CONTROLS				0x44
38 #define QSERDES_V7_RX_UCDR_SB2_THRESH1				0x4c
39 #define QSERDES_V7_RX_UCDR_SB2_THRESH2				0x50
40 #define QSERDES_V7_RX_UCDR_SB2_GAIN1				0x54
41 #define QSERDES_V7_RX_UCDR_SB2_GAIN2				0x58
42 #define QSERDES_V7_RX_AUX_DATA_TCOARSE_TFINE			0x60
43 #define QSERDES_V7_RX_TX_ADAPT_POST_THRESH			0xcc
44 #define QSERDES_V7_RX_VGA_CAL_CNTRL1				0xd4
45 #define QSERDES_V7_RX_VGA_CAL_CNTRL2				0xd8
46 #define QSERDES_V7_RX_GM_CAL					0xdc
47 #define QSERDES_V7_RX_RX_EQU_ADAPTOR_CNTRL2			0xec
48 #define QSERDES_V7_RX_RX_EQU_ADAPTOR_CNTRL3			0xf0
49 #define QSERDES_V7_RX_RX_EQU_ADAPTOR_CNTRL4			0xf4
50 #define QSERDES_V7_RX_RX_IDAC_TSETTLE_LOW			0xf8
51 #define QSERDES_V7_RX_RX_IDAC_TSETTLE_HIGH			0xfc
52 #define QSERDES_V7_RX_RX_EQ_OFFSET_ADAPTOR_CNTRL1		0x110
53 #define QSERDES_V7_RX_SIDGET_ENABLES				0x118
54 #define QSERDES_V7_RX_SIGDET_CNTRL				0x11c
55 #define QSERDES_V7_RX_SIGDET_DEGLITCH_CNTRL			0x124
56 #define QSERDES_V7_RX_RX_MODE_00_LOW				0x15c
57 #define QSERDES_V7_RX_RX_MODE_00_HIGH				0x160
58 #define QSERDES_V7_RX_RX_MODE_00_HIGH2				0x164
59 #define QSERDES_V7_RX_RX_MODE_00_HIGH3				0x168
60 #define QSERDES_V7_RX_RX_MODE_00_HIGH4				0x16c
61 #define QSERDES_V7_RX_RX_MODE_01_LOW				0x170
62 #define QSERDES_V7_RX_RX_MODE_01_HIGH				0x174
63 #define QSERDES_V7_RX_RX_MODE_01_HIGH2				0x178
64 #define QSERDES_V7_RX_RX_MODE_01_HIGH3				0x17c
65 #define QSERDES_V7_RX_RX_MODE_01_HIGH4				0x180
66 #define QSERDES_V7_RX_RX_MODE_10_LOW				0x184
67 #define QSERDES_V7_RX_RX_MODE_10_HIGH				0x188
68 #define QSERDES_V7_RX_RX_MODE_10_HIGH2				0x18c
69 #define QSERDES_V7_RX_RX_MODE_10_HIGH3				0x190
70 #define QSERDES_V7_RX_RX_MODE_10_HIGH4				0x194
71 #define QSERDES_V7_RX_DFE_EN_TIMER				0x1a0
72 #define QSERDES_V7_RX_DFE_CTLE_POST_CAL_OFFSET			0x1a4
73 #define QSERDES_V7_RX_DCC_CTRL1					0x1a8
74 #define QSERDES_V7_RX_VTH_CODE					0x1b0
75 #define QSERDES_V7_RX_SIGDET_CAL_CTRL1				0x1e4
76 #define QSERDES_V7_RX_SIGDET_CAL_TRIM				0x1f8
77 
78 #endif
79