1c9736600SAbel Vesa /* SPDX-License-Identifier: GPL-2.0 */ 2c9736600SAbel Vesa /* 3c9736600SAbel Vesa * Copyright (c) 2023, Linaro Limited 4c9736600SAbel Vesa */ 5c9736600SAbel Vesa 6c9736600SAbel Vesa #ifndef QCOM_PHY_QMP_QSERDES_TXRX_UFS_V6_H_ 7c9736600SAbel Vesa #define QCOM_PHY_QMP_QSERDES_TXRX_UFS_V6_H_ 8c9736600SAbel Vesa 9c9736600SAbel Vesa #define QSERDES_UFS_V6_TX_RES_CODE_LANE_TX 0x28 10c9736600SAbel Vesa #define QSERDES_UFS_V6_TX_RES_CODE_LANE_RX 0x2c 11c9736600SAbel Vesa #define QSERDES_UFS_V6_TX_RES_CODE_LANE_OFFSET_TX 0x30 12c9736600SAbel Vesa #define QSERDES_UFS_V6_TX_RES_CODE_LANE_OFFSET_RX 0x34 137c4bf8cbSNeil Armstrong #define QSERDES_UFS_V6_TX_LANE_MODE_1 0x7c 145301b7a0SCan Guo #define QSERDES_UFS_V6_TX_FR_DCC_CTRL 0x108 15c9736600SAbel Vesa 16c9736600SAbel Vesa #define QSERDES_UFS_V6_RX_UCDR_FASTLOCK_FO_GAIN_RATE2 0x08 17c9736600SAbel Vesa #define QSERDES_UFS_V6_RX_UCDR_FASTLOCK_FO_GAIN_RATE4 0x10 18b34ae859SCan Guo #define QSERDES_UFS_V6_RX_UCDR_FASTLOCK_SO_GAIN_RATE4 0x24 197c4bf8cbSNeil Armstrong #define QSERDES_UFS_V6_RX_UCDR_SO_SATURATION 0x28 20b34ae859SCan Guo #define QSERDES_UFS_V6_RX_UCDR_FASTLOCK_COUNT_HIGH_RATE4 0x54 217c4bf8cbSNeil Armstrong #define QSERDES_UFS_V6_RX_UCDR_PI_CTRL1 0x58 227c4bf8cbSNeil Armstrong #define QSERDES_UFS_V6_RX_RX_TERM_BW_CTRL0 0xc4 237c4bf8cbSNeil Armstrong #define QSERDES_UFS_V6_RX_UCDR_FO_GAIN_RATE2 0xd4 247c4bf8cbSNeil Armstrong #define QSERDES_UFS_V6_RX_UCDR_FO_GAIN_RATE4 0xdc 25b34ae859SCan Guo #define QSERDES_UFS_V6_RX_UCDR_SO_GAIN_RATE4 0xf0 26b34ae859SCan Guo #define QSERDES_UFS_V6_RX_UCDR_PI_CONTROLS 0xf4 27c9736600SAbel Vesa #define QSERDES_UFS_V6_RX_VGA_CAL_MAN_VAL 0x178 28*b9251e64SNeil Armstrong #define QSERDES_UFS_V6_RX_RX_EQU_ADAPTOR_CNTRL4 0x1ac 29b34ae859SCan Guo #define QSERDES_UFS_V6_RX_EQ_OFFSET_ADAPTOR_CNTRL1 0x1bc 307c4bf8cbSNeil Armstrong #define QSERDES_UFS_V6_RX_INTERFACE_MODE 0x1e0 31b34ae859SCan Guo #define QSERDES_UFS_V6_RX_OFFSET_ADAPTOR_CNTRL3 0x1c4 32c9736600SAbel Vesa #define QSERDES_UFS_V6_RX_MODE_RATE_0_1_B0 0x208 33c9736600SAbel Vesa #define QSERDES_UFS_V6_RX_MODE_RATE_0_1_B1 0x20c 34*b9251e64SNeil Armstrong #define QSERDES_UFS_V6_RX_MODE_RATE_0_1_B2 0x210 35c9736600SAbel Vesa #define QSERDES_UFS_V6_RX_MODE_RATE_0_1_B3 0x214 36*b9251e64SNeil Armstrong #define QSERDES_UFS_V6_RX_MODE_RATE_0_1_B4 0x218 37c9736600SAbel Vesa #define QSERDES_UFS_V6_RX_MODE_RATE_0_1_B6 0x220 38c9736600SAbel Vesa #define QSERDES_UFS_V6_RX_MODE_RATE2_B3 0x238 39c9736600SAbel Vesa #define QSERDES_UFS_V6_RX_MODE_RATE2_B6 0x244 40c9736600SAbel Vesa #define QSERDES_UFS_V6_RX_MODE_RATE3_B3 0x25c 41c9736600SAbel Vesa #define QSERDES_UFS_V6_RX_MODE_RATE3_B4 0x260 42c9736600SAbel Vesa #define QSERDES_UFS_V6_RX_MODE_RATE3_B5 0x264 43c9736600SAbel Vesa #define QSERDES_UFS_V6_RX_MODE_RATE3_B8 0x270 44*b9251e64SNeil Armstrong #define QSERDES_UFS_V6_RX_MODE_RATE4_B0 0x274 45*b9251e64SNeil Armstrong #define QSERDES_UFS_V6_RX_MODE_RATE4_B1 0x278 46*b9251e64SNeil Armstrong #define QSERDES_UFS_V6_RX_MODE_RATE4_B2 0x27c 47c9736600SAbel Vesa #define QSERDES_UFS_V6_RX_MODE_RATE4_B3 0x280 48b34ae859SCan Guo #define QSERDES_UFS_V6_RX_MODE_RATE4_B4 0x284 49c9736600SAbel Vesa #define QSERDES_UFS_V6_RX_MODE_RATE4_B6 0x28c 50b34ae859SCan Guo #define QSERDES_UFS_V6_RX_DLL0_FTUNE_CTRL 0x2f8 51c9736600SAbel Vesa 52c9736600SAbel Vesa #endif 53