1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) 2024 Qualcomm Innovation Center. All rights reserved. 4 */ 5 6 #ifndef QCOM_PHY_QMP_PCS_V6_30_H_ 7 #define QCOM_PHY_QMP_PCS_V6_30_H_ 8 9 /* Only for QMP V6_30 PHY - PCIe PCS registers */ 10 #define QPHY_V6_30_PCS_LOCK_DETECT_CONFIG2 0x0cc 11 #define QPHY_V6_30_PCS_G3S2_PRE_GAIN 0x17c 12 #define QPHY_V6_30_PCS_RX_SIGDET_LVL 0x194 13 #define QPHY_V6_30_PCS_ALIGN_DETECT_CONFIG7 0x1dc 14 #define QPHY_V6_30_PCS_TX_RX_CONFIG 0x1e0 15 #define QPHY_V6_30_PCS_TX_RX_CONFIG2 0x1e4 16 #define QPHY_V6_30_PCS_EQ_CONFIG4 0x1fc 17 #define QPHY_V6_30_PCS_EQ_CONFIG5 0x200 18 19 #endif 20