xref: /linux/drivers/phy/qualcomm/phy-qcom-qmp-pcs-ufs-v4.h (revision 4f2c0a4acffbec01079c28f839422e64ddeff004)
1*41ad371fSDmitry Baryshkov /* SPDX-License-Identifier: GPL-2.0 */
2*41ad371fSDmitry Baryshkov /*
3*41ad371fSDmitry Baryshkov  * Copyright (c) 2017, The Linux Foundation. All rights reserved.
4*41ad371fSDmitry Baryshkov  */
5*41ad371fSDmitry Baryshkov 
6*41ad371fSDmitry Baryshkov #ifndef QCOM_PHY_QMP_PCS_UFS_V4_H_
7*41ad371fSDmitry Baryshkov #define QCOM_PHY_QMP_PCS_UFS_V4_H_
8*41ad371fSDmitry Baryshkov 
9*41ad371fSDmitry Baryshkov /* Only for QMP V4 PHY - UFS PCS registers */
10*41ad371fSDmitry Baryshkov #define QPHY_V4_PCS_UFS_PHY_START			0x000
11*41ad371fSDmitry Baryshkov #define QPHY_V4_PCS_UFS_POWER_DOWN_CONTROL		0x004
12*41ad371fSDmitry Baryshkov #define QPHY_V4_PCS_UFS_SW_RESET			0x008
13*41ad371fSDmitry Baryshkov #define QPHY_V4_PCS_UFS_TIMER_20US_CORECLK_STEPS_MSB	0x00c
14*41ad371fSDmitry Baryshkov #define QPHY_V4_PCS_UFS_TIMER_20US_CORECLK_STEPS_LSB	0x010
15*41ad371fSDmitry Baryshkov #define QPHY_V4_PCS_UFS_PLL_CNTL			0x02c
16*41ad371fSDmitry Baryshkov #define QPHY_V4_PCS_UFS_TX_LARGE_AMP_DRV_LVL		0x030
17*41ad371fSDmitry Baryshkov #define QPHY_V4_PCS_UFS_TX_SMALL_AMP_DRV_LVL		0x038
18*41ad371fSDmitry Baryshkov #define QPHY_V4_PCS_UFS_BIST_FIXED_PAT_CTRL		0x060
19*41ad371fSDmitry Baryshkov #define QPHY_V4_PCS_UFS_TX_HSGEAR_CAPABILITY		0x074
20*41ad371fSDmitry Baryshkov #define QPHY_V4_PCS_UFS_RX_HSGEAR_CAPABILITY		0x0b4
21*41ad371fSDmitry Baryshkov #define QPHY_V4_PCS_UFS_DEBUG_BUS_CLKSEL		0x124
22*41ad371fSDmitry Baryshkov #define QPHY_V4_PCS_UFS_LINECFG_DISABLE			0x148
23*41ad371fSDmitry Baryshkov #define QPHY_V4_PCS_UFS_RX_MIN_HIBERN8_TIME		0x150
24*41ad371fSDmitry Baryshkov #define QPHY_V4_PCS_UFS_RX_SIGDET_CTRL2			0x158
25*41ad371fSDmitry Baryshkov #define QPHY_V4_PCS_UFS_TX_PWM_GEAR_BAND		0x160
26*41ad371fSDmitry Baryshkov #define QPHY_V4_PCS_UFS_TX_HS_GEAR_BAND			0x168
27*41ad371fSDmitry Baryshkov #define QPHY_V4_PCS_UFS_READY_STATUS			0x180
28*41ad371fSDmitry Baryshkov #define QPHY_V4_PCS_UFS_TX_MID_TERM_CTRL1		0x1d8
29*41ad371fSDmitry Baryshkov #define QPHY_V4_PCS_UFS_MULTI_LANE_CTRL1		0x1e0
30*41ad371fSDmitry Baryshkov 
31*41ad371fSDmitry Baryshkov #endif
32