1*d10736dbSAbel Vesa /* SPDX-License-Identifier: GPL-2.0 */ 2*d10736dbSAbel Vesa /* 3*d10736dbSAbel Vesa * Copyright (C) 2025 Linaro Ltd. 4*d10736dbSAbel Vesa */ 5*d10736dbSAbel Vesa 6*d10736dbSAbel Vesa #ifndef QCOM_PHY_QMP_DP_QSERDES_COM_V8_H_ 7*d10736dbSAbel Vesa #define QCOM_PHY_QMP_DP_QSERDES_COM_V8_H_ 8*d10736dbSAbel Vesa 9*d10736dbSAbel Vesa /* Only for DP QMP V8 PHY - QSERDES COM registers */ 10*d10736dbSAbel Vesa #define DP_QSERDES_V8_COM_HSCLK_SEL_1 0x03c 11*d10736dbSAbel Vesa #define DP_QSERDES_V8_COM_BIN_VCOCAL_CMP_CODE1_MODE0 0x058 12*d10736dbSAbel Vesa #define DP_QSERDES_V8_COM_BIN_VCOCAL_CMP_CODE2_MODE0 0x05c 13*d10736dbSAbel Vesa #define DP_QSERDES_V8_COM_SSC_STEP_SIZE1_MODE0 0x060 14*d10736dbSAbel Vesa #define DP_QSERDES_V8_COM_SSC_STEP_SIZE2_MODE0 0x064 15*d10736dbSAbel Vesa #define DP_QSERDES_V8_COM_CP_CTRL_MODE0 0x070 16*d10736dbSAbel Vesa #define DP_QSERDES_V8_COM_PLL_RCTRL_MODE0 0x074 17*d10736dbSAbel Vesa #define DP_QSERDES_V8_COM_PLL_CCTRL_MODE0 0x078 18*d10736dbSAbel Vesa #define DP_QSERDES_V8_COM_CORECLK_DIV_MODE0 0x07c 19*d10736dbSAbel Vesa #define DP_QSERDES_V8_COM_LOCK_CMP1_MODE0 0x080 20*d10736dbSAbel Vesa #define DP_QSERDES_V8_COM_LOCK_CMP2_MODE0 0x084 21*d10736dbSAbel Vesa #define DP_QSERDES_V8_COM_DEC_START_MODE0 0x088 22*d10736dbSAbel Vesa #define DP_QSERDES_V8_COM_DIV_FRAC_START1_MODE0 0x090 23*d10736dbSAbel Vesa #define DP_QSERDES_V8_COM_DIV_FRAC_START2_MODE0 0x094 24*d10736dbSAbel Vesa #define DP_QSERDES_V8_COM_DIV_FRAC_START3_MODE0 0x098 25*d10736dbSAbel Vesa #define DP_QSERDES_V8_COM_INTEGLOOP_GAIN0_MODE0 0x0a0 26*d10736dbSAbel Vesa #define DP_QSERDES_V8_COM_VCO_TUNE1_MODE0 0x0a8 27*d10736dbSAbel Vesa #define DP_QSERDES_V8_COM_INTEGLOOP_GAIN1_MODE0 0x0a4 28*d10736dbSAbel Vesa #define DP_QSERDES_V8_COM_VCO_TUNE2_MODE0 0x0ac 29*d10736dbSAbel Vesa #define DP_QSERDES_V8_COM_BG_TIMER 0x0bc 30*d10736dbSAbel Vesa #define DP_QSERDES_V8_COM_SSC_EN_CENTER 0x0c0 31*d10736dbSAbel Vesa #define DP_QSERDES_V8_COM_SSC_ADJ_PER1 0x0c4 32*d10736dbSAbel Vesa #define DP_QSERDES_V8_COM_SSC_PER1 0x0cc 33*d10736dbSAbel Vesa #define DP_QSERDES_V8_COM_SSC_PER2 0x0d0 34*d10736dbSAbel Vesa #define DP_QSERDES_V8_COM_BIAS_EN_CLKBUFLR_EN 0x0dc 35*d10736dbSAbel Vesa #define DP_QSERDES_V8_COM_CLK_ENABLE1 0x0e0 36*d10736dbSAbel Vesa #define DP_QSERDES_V8_COM_SYS_CLK_CTRL 0x0e4 37*d10736dbSAbel Vesa #define DP_QSERDES_V8_COM_SYSCLK_BUF_ENABLE 0x0e8 38*d10736dbSAbel Vesa #define DP_QSERDES_V8_COM_PLL_IVCO 0x0f4 39*d10736dbSAbel Vesa #define DP_QSERDES_V8_COM_SYSCLK_EN_SEL 0x110 40*d10736dbSAbel Vesa #define DP_QSERDES_V8_COM_RESETSM_CNTRL 0x118 41*d10736dbSAbel Vesa #define DP_QSERDES_V8_COM_LOCK_CMP_EN 0x120 42*d10736dbSAbel Vesa #define DP_QSERDES_V8_COM_VCO_TUNE_CTRL 0x13c 43*d10736dbSAbel Vesa #define DP_QSERDES_V8_COM_VCO_TUNE_MAP 0x140 44*d10736dbSAbel Vesa #define DP_QSERDES_V8_COM_CLK_SELECT 0x164 45*d10736dbSAbel Vesa #define DP_QSERDES_V8_COM_CORE_CLK_EN 0x170 46*d10736dbSAbel Vesa #define DP_QSERDES_V8_COM_CMN_CONFIG_1 0x174 47*d10736dbSAbel Vesa #define DP_QSERDES_V8_COM_SVS_MODE_CLK_SEL 0x180 48*d10736dbSAbel Vesa #define DP_QSERDES_V8_COM_CLK_FWD_CONFIG_1 0x2f4 49*d10736dbSAbel Vesa #define DP_QSERDES_V8_COM_CMN_STATUS 0x314 50*d10736dbSAbel Vesa #define DP_QSERDES_V8_COM_C_READY_STATUS 0x33c 51*d10736dbSAbel Vesa 52*d10736dbSAbel Vesa #endif 53