1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) 2017, The Linux Foundation. All rights reserved. 4 */ 5 6 #ifndef QCOM_PHY_QMP_COMMON_H_ 7 #define QCOM_PHY_QMP_COMMON_H_ 8 9 struct qmp_phy_init_tbl { 10 unsigned int offset; 11 unsigned int val; 12 /* 13 * mask of lanes for which this register is written 14 * for cases when second lane needs different values 15 */ 16 u8 lane_mask; 17 }; 18 19 #define QMP_PHY_INIT_CFG(o, v) \ 20 { \ 21 .offset = o, \ 22 .val = v, \ 23 .lane_mask = 0xff, \ 24 } 25 26 #define QMP_PHY_INIT_CFG_LANE(o, v, l) \ 27 { \ 28 .offset = o, \ 29 .val = v, \ 30 .lane_mask = l, \ 31 } 32 33 static inline void qmp_configure_lane(void __iomem *base, 34 const struct qmp_phy_init_tbl tbl[], 35 int num, 36 u8 lane_mask) 37 { 38 int i; 39 const struct qmp_phy_init_tbl *t = tbl; 40 41 if (!t) 42 return; 43 44 for (i = 0; i < num; i++, t++) { 45 if (!(t->lane_mask & lane_mask)) 46 continue; 47 48 writel(t->val, base + t->offset); 49 } 50 } 51 52 static inline void qmp_configure(void __iomem *base, 53 const struct qmp_phy_init_tbl tbl[], 54 int num) 55 { 56 qmp_configure_lane(base, tbl, num, 0xff); 57 } 58 59 #endif 60