1 /* 2 * Regular cardbus driver ("yenta_socket") 3 * 4 * (C) Copyright 1999, 2000 Linus Torvalds 5 * 6 * Changelog: 7 * Aug 2002: Manfred Spraul <manfred@colorfullife.com> 8 * Dynamically adjust the size of the bridge resource 9 * 10 * May 2003: Dominik Brodowski <linux@brodo.de> 11 * Merge pci_socket.c and yenta.c into one file 12 */ 13 #include <linux/init.h> 14 #include <linux/pci.h> 15 #include <linux/workqueue.h> 16 #include <linux/interrupt.h> 17 #include <linux/delay.h> 18 #include <linux/module.h> 19 #include <linux/io.h> 20 21 #include <pcmcia/cs_types.h> 22 #include <pcmcia/ss.h> 23 #include <pcmcia/cs.h> 24 25 #include "yenta_socket.h" 26 #include "i82365.h" 27 28 static int disable_clkrun; 29 module_param(disable_clkrun, bool, 0444); 30 MODULE_PARM_DESC(disable_clkrun, "If PC card doesn't function properly, please try this option"); 31 32 static int isa_probe = 1; 33 module_param(isa_probe, bool, 0444); 34 MODULE_PARM_DESC(isa_probe, "If set ISA interrupts are probed (default). Set to N to disable probing"); 35 36 static int pwr_irqs_off; 37 module_param(pwr_irqs_off, bool, 0644); 38 MODULE_PARM_DESC(pwr_irqs_off, "Force IRQs off during power-on of slot. Use only when seeing IRQ storms!"); 39 40 static char o2_speedup[] = "default"; 41 module_param_string(o2_speedup, o2_speedup, sizeof(o2_speedup), 0444); 42 MODULE_PARM_DESC(o2_speedup, "Use prefetch/burst for O2-bridges: 'on', 'off' " 43 "or 'default' (uses recommended behaviour for the detected bridge)"); 44 45 #define debug(x, s, args...) dev_dbg(&s->dev->dev, x, ##args) 46 47 /* Don't ask.. */ 48 #define to_cycles(ns) ((ns)/120) 49 #define to_ns(cycles) ((cycles)*120) 50 51 /* 52 * yenta PCI irq probing. 53 * currently only used in the TI/EnE initialization code 54 */ 55 #ifdef CONFIG_YENTA_TI 56 static int yenta_probe_cb_irq(struct yenta_socket *socket); 57 #endif 58 59 60 static unsigned int override_bios; 61 module_param(override_bios, uint, 0000); 62 MODULE_PARM_DESC(override_bios, "yenta ignore bios resource allocation"); 63 64 /* 65 * Generate easy-to-use ways of reading a cardbus sockets 66 * regular memory space ("cb_xxx"), configuration space 67 * ("config_xxx") and compatibility space ("exca_xxxx") 68 */ 69 static inline u32 cb_readl(struct yenta_socket *socket, unsigned reg) 70 { 71 u32 val = readl(socket->base + reg); 72 debug("%04x %08x\n", socket, reg, val); 73 return val; 74 } 75 76 static inline void cb_writel(struct yenta_socket *socket, unsigned reg, u32 val) 77 { 78 debug("%04x %08x\n", socket, reg, val); 79 writel(val, socket->base + reg); 80 readl(socket->base + reg); /* avoid problems with PCI write posting */ 81 } 82 83 static inline u8 config_readb(struct yenta_socket *socket, unsigned offset) 84 { 85 u8 val; 86 pci_read_config_byte(socket->dev, offset, &val); 87 debug("%04x %02x\n", socket, offset, val); 88 return val; 89 } 90 91 static inline u16 config_readw(struct yenta_socket *socket, unsigned offset) 92 { 93 u16 val; 94 pci_read_config_word(socket->dev, offset, &val); 95 debug("%04x %04x\n", socket, offset, val); 96 return val; 97 } 98 99 static inline u32 config_readl(struct yenta_socket *socket, unsigned offset) 100 { 101 u32 val; 102 pci_read_config_dword(socket->dev, offset, &val); 103 debug("%04x %08x\n", socket, offset, val); 104 return val; 105 } 106 107 static inline void config_writeb(struct yenta_socket *socket, unsigned offset, u8 val) 108 { 109 debug("%04x %02x\n", socket, offset, val); 110 pci_write_config_byte(socket->dev, offset, val); 111 } 112 113 static inline void config_writew(struct yenta_socket *socket, unsigned offset, u16 val) 114 { 115 debug("%04x %04x\n", socket, offset, val); 116 pci_write_config_word(socket->dev, offset, val); 117 } 118 119 static inline void config_writel(struct yenta_socket *socket, unsigned offset, u32 val) 120 { 121 debug("%04x %08x\n", socket, offset, val); 122 pci_write_config_dword(socket->dev, offset, val); 123 } 124 125 static inline u8 exca_readb(struct yenta_socket *socket, unsigned reg) 126 { 127 u8 val = readb(socket->base + 0x800 + reg); 128 debug("%04x %02x\n", socket, reg, val); 129 return val; 130 } 131 132 static inline u8 exca_readw(struct yenta_socket *socket, unsigned reg) 133 { 134 u16 val; 135 val = readb(socket->base + 0x800 + reg); 136 val |= readb(socket->base + 0x800 + reg + 1) << 8; 137 debug("%04x %04x\n", socket, reg, val); 138 return val; 139 } 140 141 static inline void exca_writeb(struct yenta_socket *socket, unsigned reg, u8 val) 142 { 143 debug("%04x %02x\n", socket, reg, val); 144 writeb(val, socket->base + 0x800 + reg); 145 readb(socket->base + 0x800 + reg); /* PCI write posting... */ 146 } 147 148 static void exca_writew(struct yenta_socket *socket, unsigned reg, u16 val) 149 { 150 debug("%04x %04x\n", socket, reg, val); 151 writeb(val, socket->base + 0x800 + reg); 152 writeb(val >> 8, socket->base + 0x800 + reg + 1); 153 154 /* PCI write posting... */ 155 readb(socket->base + 0x800 + reg); 156 readb(socket->base + 0x800 + reg + 1); 157 } 158 159 static ssize_t show_yenta_registers(struct device *yentadev, struct device_attribute *attr, char *buf) 160 { 161 struct pci_dev *dev = to_pci_dev(yentadev); 162 struct yenta_socket *socket = pci_get_drvdata(dev); 163 int offset = 0, i; 164 165 offset = snprintf(buf, PAGE_SIZE, "CB registers:"); 166 for (i = 0; i < 0x24; i += 4) { 167 unsigned val; 168 if (!(i & 15)) 169 offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n%02x:", i); 170 val = cb_readl(socket, i); 171 offset += snprintf(buf + offset, PAGE_SIZE - offset, " %08x", val); 172 } 173 174 offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n\nExCA registers:"); 175 for (i = 0; i < 0x45; i++) { 176 unsigned char val; 177 if (!(i & 7)) { 178 if (i & 8) { 179 memcpy(buf + offset, " -", 2); 180 offset += 2; 181 } else 182 offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n%02x:", i); 183 } 184 val = exca_readb(socket, i); 185 offset += snprintf(buf + offset, PAGE_SIZE - offset, " %02x", val); 186 } 187 buf[offset++] = '\n'; 188 return offset; 189 } 190 191 static DEVICE_ATTR(yenta_registers, S_IRUSR, show_yenta_registers, NULL); 192 193 /* 194 * Ugh, mixed-mode cardbus and 16-bit pccard state: things depend 195 * on what kind of card is inserted.. 196 */ 197 static int yenta_get_status(struct pcmcia_socket *sock, unsigned int *value) 198 { 199 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); 200 unsigned int val; 201 u32 state = cb_readl(socket, CB_SOCKET_STATE); 202 203 val = (state & CB_3VCARD) ? SS_3VCARD : 0; 204 val |= (state & CB_XVCARD) ? SS_XVCARD : 0; 205 val |= (state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) ? 0 : SS_PENDING; 206 val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? SS_PENDING : 0; 207 208 209 if (state & CB_CBCARD) { 210 val |= SS_CARDBUS; 211 val |= (state & CB_CARDSTS) ? SS_STSCHG : 0; 212 val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? 0 : SS_DETECT; 213 val |= (state & CB_PWRCYCLE) ? SS_POWERON | SS_READY : 0; 214 } else if (state & CB_16BITCARD) { 215 u8 status = exca_readb(socket, I365_STATUS); 216 val |= ((status & I365_CS_DETECT) == I365_CS_DETECT) ? SS_DETECT : 0; 217 if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) { 218 val |= (status & I365_CS_STSCHG) ? 0 : SS_STSCHG; 219 } else { 220 val |= (status & I365_CS_BVD1) ? 0 : SS_BATDEAD; 221 val |= (status & I365_CS_BVD2) ? 0 : SS_BATWARN; 222 } 223 val |= (status & I365_CS_WRPROT) ? SS_WRPROT : 0; 224 val |= (status & I365_CS_READY) ? SS_READY : 0; 225 val |= (status & I365_CS_POWERON) ? SS_POWERON : 0; 226 } 227 228 *value = val; 229 return 0; 230 } 231 232 static void yenta_set_power(struct yenta_socket *socket, socket_state_t *state) 233 { 234 /* some birdges require to use the ExCA registers to power 16bit cards */ 235 if (!(cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) && 236 (socket->flags & YENTA_16BIT_POWER_EXCA)) { 237 u8 reg, old; 238 reg = old = exca_readb(socket, I365_POWER); 239 reg &= ~(I365_VCC_MASK | I365_VPP1_MASK | I365_VPP2_MASK); 240 241 /* i82365SL-DF style */ 242 if (socket->flags & YENTA_16BIT_POWER_DF) { 243 switch (state->Vcc) { 244 case 33: 245 reg |= I365_VCC_3V; 246 break; 247 case 50: 248 reg |= I365_VCC_5V; 249 break; 250 default: 251 reg = 0; 252 break; 253 } 254 switch (state->Vpp) { 255 case 33: 256 case 50: 257 reg |= I365_VPP1_5V; 258 break; 259 case 120: 260 reg |= I365_VPP1_12V; 261 break; 262 } 263 } else { 264 /* i82365SL-B style */ 265 switch (state->Vcc) { 266 case 50: 267 reg |= I365_VCC_5V; 268 break; 269 default: 270 reg = 0; 271 break; 272 } 273 switch (state->Vpp) { 274 case 50: 275 reg |= I365_VPP1_5V | I365_VPP2_5V; 276 break; 277 case 120: 278 reg |= I365_VPP1_12V | I365_VPP2_12V; 279 break; 280 } 281 } 282 283 if (reg != old) 284 exca_writeb(socket, I365_POWER, reg); 285 } else { 286 u32 reg = 0; /* CB_SC_STPCLK? */ 287 switch (state->Vcc) { 288 case 33: 289 reg = CB_SC_VCC_3V; 290 break; 291 case 50: 292 reg = CB_SC_VCC_5V; 293 break; 294 default: 295 reg = 0; 296 break; 297 } 298 switch (state->Vpp) { 299 case 33: 300 reg |= CB_SC_VPP_3V; 301 break; 302 case 50: 303 reg |= CB_SC_VPP_5V; 304 break; 305 case 120: 306 reg |= CB_SC_VPP_12V; 307 break; 308 } 309 if (reg != cb_readl(socket, CB_SOCKET_CONTROL)) 310 cb_writel(socket, CB_SOCKET_CONTROL, reg); 311 } 312 } 313 314 static int yenta_set_socket(struct pcmcia_socket *sock, socket_state_t *state) 315 { 316 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); 317 u16 bridge; 318 319 /* if powering down: do it immediately */ 320 if (state->Vcc == 0) 321 yenta_set_power(socket, state); 322 323 socket->io_irq = state->io_irq; 324 bridge = config_readw(socket, CB_BRIDGE_CONTROL) & ~(CB_BRIDGE_CRST | CB_BRIDGE_INTR); 325 if (cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) { 326 u8 intr; 327 bridge |= (state->flags & SS_RESET) ? CB_BRIDGE_CRST : 0; 328 329 /* ISA interrupt control? */ 330 intr = exca_readb(socket, I365_INTCTL); 331 intr = (intr & ~0xf); 332 if (!socket->cb_irq) { 333 intr |= state->io_irq; 334 bridge |= CB_BRIDGE_INTR; 335 } 336 exca_writeb(socket, I365_INTCTL, intr); 337 } else { 338 u8 reg; 339 340 reg = exca_readb(socket, I365_INTCTL) & (I365_RING_ENA | I365_INTR_ENA); 341 reg |= (state->flags & SS_RESET) ? 0 : I365_PC_RESET; 342 reg |= (state->flags & SS_IOCARD) ? I365_PC_IOCARD : 0; 343 if (state->io_irq != socket->cb_irq) { 344 reg |= state->io_irq; 345 bridge |= CB_BRIDGE_INTR; 346 } 347 exca_writeb(socket, I365_INTCTL, reg); 348 349 reg = exca_readb(socket, I365_POWER) & (I365_VCC_MASK|I365_VPP1_MASK); 350 reg |= I365_PWR_NORESET; 351 if (state->flags & SS_PWR_AUTO) 352 reg |= I365_PWR_AUTO; 353 if (state->flags & SS_OUTPUT_ENA) 354 reg |= I365_PWR_OUT; 355 if (exca_readb(socket, I365_POWER) != reg) 356 exca_writeb(socket, I365_POWER, reg); 357 358 /* CSC interrupt: no ISA irq for CSC */ 359 reg = I365_CSC_DETECT; 360 if (state->flags & SS_IOCARD) { 361 if (state->csc_mask & SS_STSCHG) 362 reg |= I365_CSC_STSCHG; 363 } else { 364 if (state->csc_mask & SS_BATDEAD) 365 reg |= I365_CSC_BVD1; 366 if (state->csc_mask & SS_BATWARN) 367 reg |= I365_CSC_BVD2; 368 if (state->csc_mask & SS_READY) 369 reg |= I365_CSC_READY; 370 } 371 exca_writeb(socket, I365_CSCINT, reg); 372 exca_readb(socket, I365_CSC); 373 if (sock->zoom_video) 374 sock->zoom_video(sock, state->flags & SS_ZVCARD); 375 } 376 config_writew(socket, CB_BRIDGE_CONTROL, bridge); 377 /* Socket event mask: get card insert/remove events.. */ 378 cb_writel(socket, CB_SOCKET_EVENT, -1); 379 cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK); 380 381 /* if powering up: do it as the last step when the socket is configured */ 382 if (state->Vcc != 0) 383 yenta_set_power(socket, state); 384 return 0; 385 } 386 387 static int yenta_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io) 388 { 389 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); 390 int map; 391 unsigned char ioctl, addr, enable; 392 393 map = io->map; 394 395 if (map > 1) 396 return -EINVAL; 397 398 enable = I365_ENA_IO(map); 399 addr = exca_readb(socket, I365_ADDRWIN); 400 401 /* Disable the window before changing it.. */ 402 if (addr & enable) { 403 addr &= ~enable; 404 exca_writeb(socket, I365_ADDRWIN, addr); 405 } 406 407 exca_writew(socket, I365_IO(map)+I365_W_START, io->start); 408 exca_writew(socket, I365_IO(map)+I365_W_STOP, io->stop); 409 410 ioctl = exca_readb(socket, I365_IOCTL) & ~I365_IOCTL_MASK(map); 411 if (io->flags & MAP_0WS) 412 ioctl |= I365_IOCTL_0WS(map); 413 if (io->flags & MAP_16BIT) 414 ioctl |= I365_IOCTL_16BIT(map); 415 if (io->flags & MAP_AUTOSZ) 416 ioctl |= I365_IOCTL_IOCS16(map); 417 exca_writeb(socket, I365_IOCTL, ioctl); 418 419 if (io->flags & MAP_ACTIVE) 420 exca_writeb(socket, I365_ADDRWIN, addr | enable); 421 return 0; 422 } 423 424 static int yenta_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *mem) 425 { 426 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); 427 struct pci_bus_region region; 428 int map; 429 unsigned char addr, enable; 430 unsigned int start, stop, card_start; 431 unsigned short word; 432 433 pcibios_resource_to_bus(socket->dev, ®ion, mem->res); 434 435 map = mem->map; 436 start = region.start; 437 stop = region.end; 438 card_start = mem->card_start; 439 440 if (map > 4 || start > stop || ((start ^ stop) >> 24) || 441 (card_start >> 26) || mem->speed > 1000) 442 return -EINVAL; 443 444 enable = I365_ENA_MEM(map); 445 addr = exca_readb(socket, I365_ADDRWIN); 446 if (addr & enable) { 447 addr &= ~enable; 448 exca_writeb(socket, I365_ADDRWIN, addr); 449 } 450 451 exca_writeb(socket, CB_MEM_PAGE(map), start >> 24); 452 453 word = (start >> 12) & 0x0fff; 454 if (mem->flags & MAP_16BIT) 455 word |= I365_MEM_16BIT; 456 if (mem->flags & MAP_0WS) 457 word |= I365_MEM_0WS; 458 exca_writew(socket, I365_MEM(map) + I365_W_START, word); 459 460 word = (stop >> 12) & 0x0fff; 461 switch (to_cycles(mem->speed)) { 462 case 0: 463 break; 464 case 1: 465 word |= I365_MEM_WS0; 466 break; 467 case 2: 468 word |= I365_MEM_WS1; 469 break; 470 default: 471 word |= I365_MEM_WS1 | I365_MEM_WS0; 472 break; 473 } 474 exca_writew(socket, I365_MEM(map) + I365_W_STOP, word); 475 476 word = ((card_start - start) >> 12) & 0x3fff; 477 if (mem->flags & MAP_WRPROT) 478 word |= I365_MEM_WRPROT; 479 if (mem->flags & MAP_ATTRIB) 480 word |= I365_MEM_REG; 481 exca_writew(socket, I365_MEM(map) + I365_W_OFF, word); 482 483 if (mem->flags & MAP_ACTIVE) 484 exca_writeb(socket, I365_ADDRWIN, addr | enable); 485 return 0; 486 } 487 488 489 490 static irqreturn_t yenta_interrupt(int irq, void *dev_id) 491 { 492 unsigned int events; 493 struct yenta_socket *socket = (struct yenta_socket *) dev_id; 494 u8 csc; 495 u32 cb_event; 496 497 /* Clear interrupt status for the event */ 498 cb_event = cb_readl(socket, CB_SOCKET_EVENT); 499 cb_writel(socket, CB_SOCKET_EVENT, cb_event); 500 501 csc = exca_readb(socket, I365_CSC); 502 503 if (!(cb_event || csc)) 504 return IRQ_NONE; 505 506 events = (cb_event & (CB_CD1EVENT | CB_CD2EVENT)) ? SS_DETECT : 0 ; 507 events |= (csc & I365_CSC_DETECT) ? SS_DETECT : 0; 508 if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) { 509 events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0; 510 } else { 511 events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0; 512 events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0; 513 events |= (csc & I365_CSC_READY) ? SS_READY : 0; 514 } 515 516 if (events) 517 pcmcia_parse_events(&socket->socket, events); 518 519 return IRQ_HANDLED; 520 } 521 522 static void yenta_interrupt_wrapper(unsigned long data) 523 { 524 struct yenta_socket *socket = (struct yenta_socket *) data; 525 526 yenta_interrupt(0, (void *)socket); 527 socket->poll_timer.expires = jiffies + HZ; 528 add_timer(&socket->poll_timer); 529 } 530 531 static void yenta_clear_maps(struct yenta_socket *socket) 532 { 533 int i; 534 struct resource res = { .start = 0, .end = 0x0fff }; 535 pccard_io_map io = { 0, 0, 0, 0, 1 }; 536 pccard_mem_map mem = { .res = &res, }; 537 538 yenta_set_socket(&socket->socket, &dead_socket); 539 for (i = 0; i < 2; i++) { 540 io.map = i; 541 yenta_set_io_map(&socket->socket, &io); 542 } 543 for (i = 0; i < 5; i++) { 544 mem.map = i; 545 yenta_set_mem_map(&socket->socket, &mem); 546 } 547 } 548 549 /* redoes voltage interrogation if required */ 550 static void yenta_interrogate(struct yenta_socket *socket) 551 { 552 u32 state; 553 554 state = cb_readl(socket, CB_SOCKET_STATE); 555 if (!(state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) || 556 (state & (CB_CDETECT1 | CB_CDETECT2 | CB_NOTACARD | CB_BADVCCREQ)) || 557 ((state & (CB_16BITCARD | CB_CBCARD)) == (CB_16BITCARD | CB_CBCARD))) 558 cb_writel(socket, CB_SOCKET_FORCE, CB_CVSTEST); 559 } 560 561 /* Called at resume and initialization events */ 562 static int yenta_sock_init(struct pcmcia_socket *sock) 563 { 564 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); 565 566 exca_writeb(socket, I365_GBLCTL, 0x00); 567 exca_writeb(socket, I365_GENCTL, 0x00); 568 569 /* Redo card voltage interrogation */ 570 yenta_interrogate(socket); 571 572 yenta_clear_maps(socket); 573 574 if (socket->type && socket->type->sock_init) 575 socket->type->sock_init(socket); 576 577 /* Re-enable CSC interrupts */ 578 cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK); 579 580 return 0; 581 } 582 583 static int yenta_sock_suspend(struct pcmcia_socket *sock) 584 { 585 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); 586 587 /* Disable CSC interrupts */ 588 cb_writel(socket, CB_SOCKET_MASK, 0x0); 589 590 return 0; 591 } 592 593 /* 594 * Use an adaptive allocation for the memory resource, 595 * sometimes the memory behind pci bridges is limited: 596 * 1/8 of the size of the io window of the parent. 597 * max 4 MB, min 16 kB. We try very hard to not get below 598 * the "ACC" values, though. 599 */ 600 #define BRIDGE_MEM_MAX (4*1024*1024) 601 #define BRIDGE_MEM_ACC (128*1024) 602 #define BRIDGE_MEM_MIN (16*1024) 603 604 #define BRIDGE_IO_MAX 512 605 #define BRIDGE_IO_ACC 256 606 #define BRIDGE_IO_MIN 32 607 608 #ifndef PCIBIOS_MIN_CARDBUS_IO 609 #define PCIBIOS_MIN_CARDBUS_IO PCIBIOS_MIN_IO 610 #endif 611 612 static int yenta_search_one_res(struct resource *root, struct resource *res, 613 u32 min) 614 { 615 u32 align, size, start, end; 616 617 if (res->flags & IORESOURCE_IO) { 618 align = 1024; 619 size = BRIDGE_IO_MAX; 620 start = PCIBIOS_MIN_CARDBUS_IO; 621 end = ~0U; 622 } else { 623 unsigned long avail = root->end - root->start; 624 int i; 625 size = BRIDGE_MEM_MAX; 626 if (size > avail/8) { 627 size = (avail+1)/8; 628 /* round size down to next power of 2 */ 629 i = 0; 630 while ((size /= 2) != 0) 631 i++; 632 size = 1 << i; 633 } 634 if (size < min) 635 size = min; 636 align = size; 637 start = PCIBIOS_MIN_MEM; 638 end = ~0U; 639 } 640 641 do { 642 if (allocate_resource(root, res, size, start, end, align, 643 NULL, NULL) == 0) { 644 return 1; 645 } 646 size = size/2; 647 align = size; 648 } while (size >= min); 649 650 return 0; 651 } 652 653 654 static int yenta_search_res(struct yenta_socket *socket, struct resource *res, 655 u32 min) 656 { 657 struct resource *root; 658 int i; 659 660 pci_bus_for_each_resource(socket->dev->bus, root, i) { 661 if (!root) 662 continue; 663 664 if ((res->flags ^ root->flags) & 665 (IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH)) 666 continue; /* Wrong type */ 667 668 if (yenta_search_one_res(root, res, min)) 669 return 1; 670 } 671 return 0; 672 } 673 674 static int yenta_allocate_res(struct yenta_socket *socket, int nr, unsigned type, int addr_start, int addr_end) 675 { 676 struct pci_dev *dev = socket->dev; 677 struct resource *res; 678 struct pci_bus_region region; 679 unsigned mask; 680 681 res = dev->resource + PCI_BRIDGE_RESOURCES + nr; 682 /* Already allocated? */ 683 if (res->parent) 684 return 0; 685 686 /* The granularity of the memory limit is 4kB, on IO it's 4 bytes */ 687 mask = ~0xfff; 688 if (type & IORESOURCE_IO) 689 mask = ~3; 690 691 res->name = dev->subordinate->name; 692 res->flags = type; 693 694 region.start = config_readl(socket, addr_start) & mask; 695 region.end = config_readl(socket, addr_end) | ~mask; 696 if (region.start && region.end > region.start && !override_bios) { 697 pcibios_bus_to_resource(dev, res, ®ion); 698 if (pci_claim_resource(dev, PCI_BRIDGE_RESOURCES + nr) == 0) 699 return 0; 700 dev_printk(KERN_INFO, &dev->dev, 701 "Preassigned resource %d busy or not available, " 702 "reconfiguring...\n", 703 nr); 704 } 705 706 if (type & IORESOURCE_IO) { 707 if ((yenta_search_res(socket, res, BRIDGE_IO_MAX)) || 708 (yenta_search_res(socket, res, BRIDGE_IO_ACC)) || 709 (yenta_search_res(socket, res, BRIDGE_IO_MIN))) 710 return 1; 711 } else { 712 if (type & IORESOURCE_PREFETCH) { 713 if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) || 714 (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) || 715 (yenta_search_res(socket, res, BRIDGE_MEM_MIN))) 716 return 1; 717 /* Approximating prefetchable by non-prefetchable */ 718 res->flags = IORESOURCE_MEM; 719 } 720 if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) || 721 (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) || 722 (yenta_search_res(socket, res, BRIDGE_MEM_MIN))) 723 return 1; 724 } 725 726 dev_printk(KERN_INFO, &dev->dev, 727 "no resource of type %x available, trying to continue...\n", 728 type); 729 res->start = res->end = res->flags = 0; 730 return 0; 731 } 732 733 /* 734 * Allocate the bridge mappings for the device.. 735 */ 736 static void yenta_allocate_resources(struct yenta_socket *socket) 737 { 738 int program = 0; 739 program += yenta_allocate_res(socket, 0, IORESOURCE_IO, 740 PCI_CB_IO_BASE_0, PCI_CB_IO_LIMIT_0); 741 program += yenta_allocate_res(socket, 1, IORESOURCE_IO, 742 PCI_CB_IO_BASE_1, PCI_CB_IO_LIMIT_1); 743 program += yenta_allocate_res(socket, 2, IORESOURCE_MEM|IORESOURCE_PREFETCH, 744 PCI_CB_MEMORY_BASE_0, PCI_CB_MEMORY_LIMIT_0); 745 program += yenta_allocate_res(socket, 3, IORESOURCE_MEM, 746 PCI_CB_MEMORY_BASE_1, PCI_CB_MEMORY_LIMIT_1); 747 if (program) 748 pci_setup_cardbus(socket->dev->subordinate); 749 } 750 751 752 /* 753 * Free the bridge mappings for the device.. 754 */ 755 static void yenta_free_resources(struct yenta_socket *socket) 756 { 757 int i; 758 for (i = 0; i < 4; i++) { 759 struct resource *res; 760 res = socket->dev->resource + PCI_BRIDGE_RESOURCES + i; 761 if (res->start != 0 && res->end != 0) 762 release_resource(res); 763 res->start = res->end = res->flags = 0; 764 } 765 } 766 767 768 /* 769 * Close it down - release our resources and go home.. 770 */ 771 static void __devexit yenta_close(struct pci_dev *dev) 772 { 773 struct yenta_socket *sock = pci_get_drvdata(dev); 774 775 /* Remove the register attributes */ 776 device_remove_file(&dev->dev, &dev_attr_yenta_registers); 777 778 /* we don't want a dying socket registered */ 779 pcmcia_unregister_socket(&sock->socket); 780 781 /* Disable all events so we don't die in an IRQ storm */ 782 cb_writel(sock, CB_SOCKET_MASK, 0x0); 783 exca_writeb(sock, I365_CSCINT, 0); 784 785 if (sock->cb_irq) 786 free_irq(sock->cb_irq, sock); 787 else 788 del_timer_sync(&sock->poll_timer); 789 790 if (sock->base) 791 iounmap(sock->base); 792 yenta_free_resources(sock); 793 794 pci_release_regions(dev); 795 pci_disable_device(dev); 796 pci_set_drvdata(dev, NULL); 797 } 798 799 800 static struct pccard_operations yenta_socket_operations = { 801 .init = yenta_sock_init, 802 .suspend = yenta_sock_suspend, 803 .get_status = yenta_get_status, 804 .set_socket = yenta_set_socket, 805 .set_io_map = yenta_set_io_map, 806 .set_mem_map = yenta_set_mem_map, 807 }; 808 809 810 #ifdef CONFIG_YENTA_TI 811 #include "ti113x.h" 812 #endif 813 #ifdef CONFIG_YENTA_RICOH 814 #include "ricoh.h" 815 #endif 816 #ifdef CONFIG_YENTA_TOSHIBA 817 #include "topic.h" 818 #endif 819 #ifdef CONFIG_YENTA_O2 820 #include "o2micro.h" 821 #endif 822 823 enum { 824 CARDBUS_TYPE_DEFAULT = -1, 825 CARDBUS_TYPE_TI, 826 CARDBUS_TYPE_TI113X, 827 CARDBUS_TYPE_TI12XX, 828 CARDBUS_TYPE_TI1250, 829 CARDBUS_TYPE_RICOH, 830 CARDBUS_TYPE_TOPIC95, 831 CARDBUS_TYPE_TOPIC97, 832 CARDBUS_TYPE_O2MICRO, 833 CARDBUS_TYPE_ENE, 834 }; 835 836 /* 837 * Different cardbus controllers have slightly different 838 * initialization sequences etc details. List them here.. 839 */ 840 static struct cardbus_type cardbus_type[] = { 841 #ifdef CONFIG_YENTA_TI 842 [CARDBUS_TYPE_TI] = { 843 .override = ti_override, 844 .save_state = ti_save_state, 845 .restore_state = ti_restore_state, 846 .sock_init = ti_init, 847 }, 848 [CARDBUS_TYPE_TI113X] = { 849 .override = ti113x_override, 850 .save_state = ti_save_state, 851 .restore_state = ti_restore_state, 852 .sock_init = ti_init, 853 }, 854 [CARDBUS_TYPE_TI12XX] = { 855 .override = ti12xx_override, 856 .save_state = ti_save_state, 857 .restore_state = ti_restore_state, 858 .sock_init = ti_init, 859 }, 860 [CARDBUS_TYPE_TI1250] = { 861 .override = ti1250_override, 862 .save_state = ti_save_state, 863 .restore_state = ti_restore_state, 864 .sock_init = ti_init, 865 }, 866 #endif 867 #ifdef CONFIG_YENTA_RICOH 868 [CARDBUS_TYPE_RICOH] = { 869 .override = ricoh_override, 870 .save_state = ricoh_save_state, 871 .restore_state = ricoh_restore_state, 872 }, 873 #endif 874 #ifdef CONFIG_YENTA_TOSHIBA 875 [CARDBUS_TYPE_TOPIC95] = { 876 .override = topic95_override, 877 }, 878 [CARDBUS_TYPE_TOPIC97] = { 879 .override = topic97_override, 880 }, 881 #endif 882 #ifdef CONFIG_YENTA_O2 883 [CARDBUS_TYPE_O2MICRO] = { 884 .override = o2micro_override, 885 .restore_state = o2micro_restore_state, 886 }, 887 #endif 888 #ifdef CONFIG_YENTA_TI 889 [CARDBUS_TYPE_ENE] = { 890 .override = ene_override, 891 .save_state = ti_save_state, 892 .restore_state = ti_restore_state, 893 .sock_init = ti_init, 894 }, 895 #endif 896 }; 897 898 899 /* 900 * Only probe "regular" interrupts, don't 901 * touch dangerous spots like the mouse irq, 902 * because there are mice that apparently 903 * get really confused if they get fondled 904 * too intimately. 905 * 906 * Default to 11, 10, 9, 7, 6, 5, 4, 3. 907 */ 908 static u32 isa_interrupts = 0x0ef8; 909 910 static unsigned int yenta_probe_irq(struct yenta_socket *socket, u32 isa_irq_mask) 911 { 912 int i; 913 unsigned long val; 914 u32 mask; 915 916 /* 917 * Probe for usable interrupts using the force 918 * register to generate bogus card status events. 919 */ 920 cb_writel(socket, CB_SOCKET_EVENT, -1); 921 cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK); 922 exca_writeb(socket, I365_CSCINT, 0); 923 val = probe_irq_on() & isa_irq_mask; 924 for (i = 1; i < 16; i++) { 925 if (!((val >> i) & 1)) 926 continue; 927 exca_writeb(socket, I365_CSCINT, I365_CSC_STSCHG | (i << 4)); 928 cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS); 929 udelay(100); 930 cb_writel(socket, CB_SOCKET_EVENT, -1); 931 } 932 cb_writel(socket, CB_SOCKET_MASK, 0); 933 exca_writeb(socket, I365_CSCINT, 0); 934 935 mask = probe_irq_mask(val) & 0xffff; 936 937 return mask; 938 } 939 940 941 /* 942 * yenta PCI irq probing. 943 * currently only used in the TI/EnE initialization code 944 */ 945 #ifdef CONFIG_YENTA_TI 946 947 /* interrupt handler, only used during probing */ 948 static irqreturn_t yenta_probe_handler(int irq, void *dev_id) 949 { 950 struct yenta_socket *socket = (struct yenta_socket *) dev_id; 951 u8 csc; 952 u32 cb_event; 953 954 /* Clear interrupt status for the event */ 955 cb_event = cb_readl(socket, CB_SOCKET_EVENT); 956 cb_writel(socket, CB_SOCKET_EVENT, -1); 957 csc = exca_readb(socket, I365_CSC); 958 959 if (cb_event || csc) { 960 socket->probe_status = 1; 961 return IRQ_HANDLED; 962 } 963 964 return IRQ_NONE; 965 } 966 967 /* probes the PCI interrupt, use only on override functions */ 968 static int yenta_probe_cb_irq(struct yenta_socket *socket) 969 { 970 if (!socket->cb_irq) 971 return -1; 972 973 socket->probe_status = 0; 974 975 if (request_irq(socket->cb_irq, yenta_probe_handler, IRQF_SHARED, "yenta", socket)) { 976 dev_printk(KERN_WARNING, &socket->dev->dev, 977 "request_irq() in yenta_probe_cb_irq() failed!\n"); 978 return -1; 979 } 980 981 /* generate interrupt, wait */ 982 exca_writeb(socket, I365_CSCINT, I365_CSC_STSCHG); 983 cb_writel(socket, CB_SOCKET_EVENT, -1); 984 cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK); 985 cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS); 986 987 msleep(100); 988 989 /* disable interrupts */ 990 cb_writel(socket, CB_SOCKET_MASK, 0); 991 exca_writeb(socket, I365_CSCINT, 0); 992 cb_writel(socket, CB_SOCKET_EVENT, -1); 993 exca_readb(socket, I365_CSC); 994 995 free_irq(socket->cb_irq, socket); 996 997 return (int) socket->probe_status; 998 } 999 1000 #endif /* CONFIG_YENTA_TI */ 1001 1002 1003 /* 1004 * Set static data that doesn't need re-initializing.. 1005 */ 1006 static void yenta_get_socket_capabilities(struct yenta_socket *socket, u32 isa_irq_mask) 1007 { 1008 socket->socket.pci_irq = socket->cb_irq; 1009 if (isa_probe) 1010 socket->socket.irq_mask = yenta_probe_irq(socket, isa_irq_mask); 1011 else 1012 socket->socket.irq_mask = 0; 1013 1014 dev_printk(KERN_INFO, &socket->dev->dev, 1015 "ISA IRQ mask 0x%04x, PCI irq %d\n", 1016 socket->socket.irq_mask, socket->cb_irq); 1017 } 1018 1019 /* 1020 * Initialize the standard cardbus registers 1021 */ 1022 static void yenta_config_init(struct yenta_socket *socket) 1023 { 1024 u16 bridge; 1025 struct pci_dev *dev = socket->dev; 1026 struct pci_bus_region region; 1027 1028 pcibios_resource_to_bus(socket->dev, ®ion, &dev->resource[0]); 1029 1030 config_writel(socket, CB_LEGACY_MODE_BASE, 0); 1031 config_writel(socket, PCI_BASE_ADDRESS_0, region.start); 1032 config_writew(socket, PCI_COMMAND, 1033 PCI_COMMAND_IO | 1034 PCI_COMMAND_MEMORY | 1035 PCI_COMMAND_MASTER | 1036 PCI_COMMAND_WAIT); 1037 1038 /* MAGIC NUMBERS! Fixme */ 1039 config_writeb(socket, PCI_CACHE_LINE_SIZE, L1_CACHE_BYTES / 4); 1040 config_writeb(socket, PCI_LATENCY_TIMER, 168); 1041 config_writel(socket, PCI_PRIMARY_BUS, 1042 (176 << 24) | /* sec. latency timer */ 1043 (dev->subordinate->subordinate << 16) | /* subordinate bus */ 1044 (dev->subordinate->secondary << 8) | /* secondary bus */ 1045 dev->subordinate->primary); /* primary bus */ 1046 1047 /* 1048 * Set up the bridging state: 1049 * - enable write posting. 1050 * - memory window 0 prefetchable, window 1 non-prefetchable 1051 * - PCI interrupts enabled if a PCI interrupt exists.. 1052 */ 1053 bridge = config_readw(socket, CB_BRIDGE_CONTROL); 1054 bridge &= ~(CB_BRIDGE_CRST | CB_BRIDGE_PREFETCH1 | CB_BRIDGE_ISAEN | CB_BRIDGE_VGAEN); 1055 bridge |= CB_BRIDGE_PREFETCH0 | CB_BRIDGE_POSTEN; 1056 config_writew(socket, CB_BRIDGE_CONTROL, bridge); 1057 } 1058 1059 /** 1060 * yenta_fixup_parent_bridge - Fix subordinate bus# of the parent bridge 1061 * @cardbus_bridge: The PCI bus which the CardBus bridge bridges to 1062 * 1063 * Checks if devices on the bus which the CardBus bridge bridges to would be 1064 * invisible during PCI scans because of a misconfigured subordinate number 1065 * of the parent brige - some BIOSes seem to be too lazy to set it right. 1066 * Does the fixup carefully by checking how far it can go without conflicts. 1067 * See http\://bugzilla.kernel.org/show_bug.cgi?id=2944 for more information. 1068 */ 1069 static void yenta_fixup_parent_bridge(struct pci_bus *cardbus_bridge) 1070 { 1071 struct list_head *tmp; 1072 unsigned char upper_limit; 1073 /* 1074 * We only check and fix the parent bridge: All systems which need 1075 * this fixup that have been reviewed are laptops and the only bridge 1076 * which needed fixing was the parent bridge of the CardBus bridge: 1077 */ 1078 struct pci_bus *bridge_to_fix = cardbus_bridge->parent; 1079 1080 /* Check bus numbers are already set up correctly: */ 1081 if (bridge_to_fix->subordinate >= cardbus_bridge->subordinate) 1082 return; /* The subordinate number is ok, nothing to do */ 1083 1084 if (!bridge_to_fix->parent) 1085 return; /* Root bridges are ok */ 1086 1087 /* stay within the limits of the bus range of the parent: */ 1088 upper_limit = bridge_to_fix->parent->subordinate; 1089 1090 /* check the bus ranges of all silbling bridges to prevent overlap */ 1091 list_for_each(tmp, &bridge_to_fix->parent->children) { 1092 struct pci_bus *silbling = pci_bus_b(tmp); 1093 /* 1094 * If the silbling has a higher secondary bus number 1095 * and it's secondary is equal or smaller than our 1096 * current upper limit, set the new upper limit to 1097 * the bus number below the silbling's range: 1098 */ 1099 if (silbling->secondary > bridge_to_fix->subordinate 1100 && silbling->secondary <= upper_limit) 1101 upper_limit = silbling->secondary - 1; 1102 } 1103 1104 /* Show that the wanted subordinate number is not possible: */ 1105 if (cardbus_bridge->subordinate > upper_limit) 1106 dev_printk(KERN_WARNING, &cardbus_bridge->dev, 1107 "Upper limit for fixing this " 1108 "bridge's parent bridge: #%02x\n", upper_limit); 1109 1110 /* If we have room to increase the bridge's subordinate number, */ 1111 if (bridge_to_fix->subordinate < upper_limit) { 1112 1113 /* use the highest number of the hidden bus, within limits */ 1114 unsigned char subordinate_to_assign = 1115 min(cardbus_bridge->subordinate, upper_limit); 1116 1117 dev_printk(KERN_INFO, &bridge_to_fix->dev, 1118 "Raising subordinate bus# of parent " 1119 "bus (#%02x) from #%02x to #%02x\n", 1120 bridge_to_fix->number, 1121 bridge_to_fix->subordinate, subordinate_to_assign); 1122 1123 /* Save the new subordinate in the bus struct of the bridge */ 1124 bridge_to_fix->subordinate = subordinate_to_assign; 1125 1126 /* and update the PCI config space with the new subordinate */ 1127 pci_write_config_byte(bridge_to_fix->self, 1128 PCI_SUBORDINATE_BUS, bridge_to_fix->subordinate); 1129 } 1130 } 1131 1132 /* 1133 * Initialize a cardbus controller. Make sure we have a usable 1134 * interrupt, and that we can map the cardbus area. Fill in the 1135 * socket information structure.. 1136 */ 1137 static int __devinit yenta_probe(struct pci_dev *dev, const struct pci_device_id *id) 1138 { 1139 struct yenta_socket *socket; 1140 int ret; 1141 1142 /* 1143 * If we failed to assign proper bus numbers for this cardbus 1144 * controller during PCI probe, its subordinate pci_bus is NULL. 1145 * Bail out if so. 1146 */ 1147 if (!dev->subordinate) { 1148 dev_printk(KERN_ERR, &dev->dev, "no bus associated! " 1149 "(try 'pci=assign-busses')\n"); 1150 return -ENODEV; 1151 } 1152 1153 socket = kzalloc(sizeof(struct yenta_socket), GFP_KERNEL); 1154 if (!socket) 1155 return -ENOMEM; 1156 1157 /* prepare pcmcia_socket */ 1158 socket->socket.ops = ¥ta_socket_operations; 1159 socket->socket.resource_ops = &pccard_nonstatic_ops; 1160 socket->socket.dev.parent = &dev->dev; 1161 socket->socket.driver_data = socket; 1162 socket->socket.owner = THIS_MODULE; 1163 socket->socket.features = SS_CAP_PAGE_REGS | SS_CAP_PCCARD; 1164 socket->socket.map_size = 0x1000; 1165 socket->socket.cb_dev = dev; 1166 1167 /* prepare struct yenta_socket */ 1168 socket->dev = dev; 1169 pci_set_drvdata(dev, socket); 1170 1171 /* 1172 * Do some basic sanity checking.. 1173 */ 1174 if (pci_enable_device(dev)) { 1175 ret = -EBUSY; 1176 goto free; 1177 } 1178 1179 ret = pci_request_regions(dev, "yenta_socket"); 1180 if (ret) 1181 goto disable; 1182 1183 if (!pci_resource_start(dev, 0)) { 1184 dev_printk(KERN_ERR, &dev->dev, "No cardbus resource!\n"); 1185 ret = -ENODEV; 1186 goto release; 1187 } 1188 1189 /* 1190 * Ok, start setup.. Map the cardbus registers, 1191 * and request the IRQ. 1192 */ 1193 socket->base = ioremap(pci_resource_start(dev, 0), 0x1000); 1194 if (!socket->base) { 1195 ret = -ENOMEM; 1196 goto release; 1197 } 1198 1199 /* 1200 * report the subsystem vendor and device for help debugging 1201 * the irq stuff... 1202 */ 1203 dev_printk(KERN_INFO, &dev->dev, "CardBus bridge found [%04x:%04x]\n", 1204 dev->subsystem_vendor, dev->subsystem_device); 1205 1206 yenta_config_init(socket); 1207 1208 /* Disable all events */ 1209 cb_writel(socket, CB_SOCKET_MASK, 0x0); 1210 1211 /* Set up the bridge regions.. */ 1212 yenta_allocate_resources(socket); 1213 1214 socket->cb_irq = dev->irq; 1215 1216 /* Do we have special options for the device? */ 1217 if (id->driver_data != CARDBUS_TYPE_DEFAULT && 1218 id->driver_data < ARRAY_SIZE(cardbus_type)) { 1219 socket->type = &cardbus_type[id->driver_data]; 1220 1221 ret = socket->type->override(socket); 1222 if (ret < 0) 1223 goto unmap; 1224 } 1225 1226 /* We must finish initialization here */ 1227 1228 if (!socket->cb_irq || request_irq(socket->cb_irq, yenta_interrupt, IRQF_SHARED, "yenta", socket)) { 1229 /* No IRQ or request_irq failed. Poll */ 1230 socket->cb_irq = 0; /* But zero is a valid IRQ number. */ 1231 init_timer(&socket->poll_timer); 1232 socket->poll_timer.function = yenta_interrupt_wrapper; 1233 socket->poll_timer.data = (unsigned long)socket; 1234 socket->poll_timer.expires = jiffies + HZ; 1235 add_timer(&socket->poll_timer); 1236 dev_printk(KERN_INFO, &dev->dev, 1237 "no PCI IRQ, CardBus support disabled for this " 1238 "socket.\n"); 1239 dev_printk(KERN_INFO, &dev->dev, 1240 "check your BIOS CardBus, BIOS IRQ or ACPI " 1241 "settings.\n"); 1242 } else { 1243 socket->socket.features |= SS_CAP_CARDBUS; 1244 } 1245 1246 /* Figure out what the dang thing can do for the PCMCIA layer... */ 1247 yenta_interrogate(socket); 1248 yenta_get_socket_capabilities(socket, isa_interrupts); 1249 dev_printk(KERN_INFO, &dev->dev, 1250 "Socket status: %08x\n", cb_readl(socket, CB_SOCKET_STATE)); 1251 1252 yenta_fixup_parent_bridge(dev->subordinate); 1253 1254 /* Register it with the pcmcia layer.. */ 1255 ret = pcmcia_register_socket(&socket->socket); 1256 if (ret == 0) { 1257 /* Add the yenta register attributes */ 1258 ret = device_create_file(&dev->dev, &dev_attr_yenta_registers); 1259 if (ret == 0) 1260 goto out; 1261 1262 /* error path... */ 1263 pcmcia_unregister_socket(&socket->socket); 1264 } 1265 1266 unmap: 1267 iounmap(socket->base); 1268 release: 1269 pci_release_regions(dev); 1270 disable: 1271 pci_disable_device(dev); 1272 free: 1273 kfree(socket); 1274 out: 1275 return ret; 1276 } 1277 1278 #ifdef CONFIG_PM 1279 static int yenta_dev_suspend_noirq(struct device *dev) 1280 { 1281 struct pci_dev *pdev = to_pci_dev(dev); 1282 struct yenta_socket *socket = pci_get_drvdata(pdev); 1283 int ret; 1284 1285 ret = pcmcia_socket_dev_suspend(dev); 1286 1287 if (!socket) 1288 return ret; 1289 1290 if (socket->type && socket->type->save_state) 1291 socket->type->save_state(socket); 1292 1293 pci_save_state(pdev); 1294 pci_read_config_dword(pdev, 16*4, &socket->saved_state[0]); 1295 pci_read_config_dword(pdev, 17*4, &socket->saved_state[1]); 1296 pci_disable_device(pdev); 1297 1298 /* 1299 * Some laptops (IBM T22) do not like us putting the Cardbus 1300 * bridge into D3. At a guess, some other laptop will 1301 * probably require this, so leave it commented out for now. 1302 */ 1303 /* pci_set_power_state(dev, 3); */ 1304 1305 return ret; 1306 } 1307 1308 static int yenta_dev_resume_noirq(struct device *dev) 1309 { 1310 struct pci_dev *pdev = to_pci_dev(dev); 1311 struct yenta_socket *socket = pci_get_drvdata(pdev); 1312 int ret; 1313 1314 if (!socket) 1315 return 0; 1316 1317 pci_write_config_dword(pdev, 16*4, socket->saved_state[0]); 1318 pci_write_config_dword(pdev, 17*4, socket->saved_state[1]); 1319 1320 ret = pci_enable_device(pdev); 1321 if (ret) 1322 return ret; 1323 1324 pci_set_master(pdev); 1325 1326 if (socket->type && socket->type->restore_state) 1327 socket->type->restore_state(socket); 1328 1329 pcmcia_socket_dev_early_resume(dev); 1330 return 0; 1331 } 1332 1333 static int yenta_dev_resume(struct device *dev) 1334 { 1335 pcmcia_socket_dev_late_resume(dev); 1336 return 0; 1337 } 1338 1339 static const struct dev_pm_ops yenta_pm_ops = { 1340 .suspend_noirq = yenta_dev_suspend_noirq, 1341 .resume_noirq = yenta_dev_resume_noirq, 1342 .resume = yenta_dev_resume, 1343 .freeze_noirq = yenta_dev_suspend_noirq, 1344 .thaw_noirq = yenta_dev_resume_noirq, 1345 .thaw = yenta_dev_resume, 1346 .poweroff_noirq = yenta_dev_suspend_noirq, 1347 .restore_noirq = yenta_dev_resume_noirq, 1348 .restore = yenta_dev_resume, 1349 }; 1350 1351 #define YENTA_PM_OPS (¥ta_pm_ops) 1352 #else 1353 #define YENTA_PM_OPS NULL 1354 #endif 1355 1356 #define CB_ID(vend, dev, type) \ 1357 { \ 1358 .vendor = vend, \ 1359 .device = dev, \ 1360 .subvendor = PCI_ANY_ID, \ 1361 .subdevice = PCI_ANY_ID, \ 1362 .class = PCI_CLASS_BRIDGE_CARDBUS << 8, \ 1363 .class_mask = ~0, \ 1364 .driver_data = CARDBUS_TYPE_##type, \ 1365 } 1366 1367 static struct pci_device_id yenta_table[] = { 1368 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1031, TI), 1369 1370 /* 1371 * TBD: Check if these TI variants can use more 1372 * advanced overrides instead. (I can't get the 1373 * data sheets for these devices. --rmk) 1374 */ 1375 #ifdef CONFIG_YENTA_TI 1376 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1210, TI), 1377 1378 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1130, TI113X), 1379 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1131, TI113X), 1380 1381 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1211, TI12XX), 1382 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1220, TI12XX), 1383 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1221, TI12XX), 1384 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1225, TI12XX), 1385 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251A, TI12XX), 1386 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251B, TI12XX), 1387 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1420, TI12XX), 1388 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1450, TI12XX), 1389 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1451A, TI12XX), 1390 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1510, TI12XX), 1391 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520, TI12XX), 1392 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1620, TI12XX), 1393 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4410, TI12XX), 1394 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4450, TI12XX), 1395 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4451, TI12XX), 1396 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4510, TI12XX), 1397 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4520, TI12XX), 1398 1399 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1250, TI1250), 1400 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1410, TI1250), 1401 1402 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XX21_XX11, TI12XX), 1403 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X515, TI12XX), 1404 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XX12, TI12XX), 1405 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X420, TI12XX), 1406 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X620, TI12XX), 1407 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7410, TI12XX), 1408 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7510, TI12XX), 1409 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7610, TI12XX), 1410 1411 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_710, TI12XX), 1412 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_712, TI12XX), 1413 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_720, TI12XX), 1414 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_722, TI12XX), 1415 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1211, ENE), 1416 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1225, ENE), 1417 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1410, ENE), 1418 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1420, ENE), 1419 #endif /* CONFIG_YENTA_TI */ 1420 1421 #ifdef CONFIG_YENTA_RICOH 1422 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C465, RICOH), 1423 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C466, RICOH), 1424 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C475, RICOH), 1425 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476, RICOH), 1426 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C478, RICOH), 1427 #endif 1428 1429 #ifdef CONFIG_YENTA_TOSHIBA 1430 CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC95, TOPIC95), 1431 CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC97, TOPIC97), 1432 CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC100, TOPIC97), 1433 #endif 1434 1435 #ifdef CONFIG_YENTA_O2 1436 CB_ID(PCI_VENDOR_ID_O2, PCI_ANY_ID, O2MICRO), 1437 #endif 1438 1439 /* match any cardbus bridge */ 1440 CB_ID(PCI_ANY_ID, PCI_ANY_ID, DEFAULT), 1441 { /* all zeroes */ } 1442 }; 1443 MODULE_DEVICE_TABLE(pci, yenta_table); 1444 1445 1446 static struct pci_driver yenta_cardbus_driver = { 1447 .name = "yenta_cardbus", 1448 .id_table = yenta_table, 1449 .probe = yenta_probe, 1450 .remove = __devexit_p(yenta_close), 1451 .driver.pm = YENTA_PM_OPS, 1452 }; 1453 1454 1455 static int __init yenta_socket_init(void) 1456 { 1457 return pci_register_driver(¥ta_cardbus_driver); 1458 } 1459 1460 1461 static void __exit yenta_socket_exit(void) 1462 { 1463 pci_unregister_driver(¥ta_cardbus_driver); 1464 } 1465 1466 1467 module_init(yenta_socket_init); 1468 module_exit(yenta_socket_exit); 1469 1470 MODULE_LICENSE("GPL"); 1471