1 /* 2 * Regular cardbus driver ("yenta_socket") 3 * 4 * (C) Copyright 1999, 2000 Linus Torvalds 5 * 6 * Changelog: 7 * Aug 2002: Manfred Spraul <manfred@colorfullife.com> 8 * Dynamically adjust the size of the bridge resource 9 * 10 * May 2003: Dominik Brodowski <linux@brodo.de> 11 * Merge pci_socket.c and yenta.c into one file 12 */ 13 #include <linux/init.h> 14 #include <linux/pci.h> 15 #include <linux/sched.h> 16 #include <linux/workqueue.h> 17 #include <linux/interrupt.h> 18 #include <linux/delay.h> 19 #include <linux/module.h> 20 21 #include <pcmcia/cs_types.h> 22 #include <pcmcia/ss.h> 23 #include <pcmcia/cs.h> 24 25 #include <asm/io.h> 26 27 #include "yenta_socket.h" 28 #include "i82365.h" 29 30 static int disable_clkrun; 31 module_param(disable_clkrun, bool, 0444); 32 MODULE_PARM_DESC(disable_clkrun, "If PC card doesn't function properly, please try this option"); 33 34 static int isa_probe = 1; 35 module_param(isa_probe, bool, 0444); 36 MODULE_PARM_DESC(isa_probe, "If set ISA interrupts are probed (default). Set to N to disable probing"); 37 38 static int pwr_irqs_off; 39 module_param(pwr_irqs_off, bool, 0644); 40 MODULE_PARM_DESC(pwr_irqs_off, "Force IRQs off during power-on of slot. Use only when seeing IRQ storms!"); 41 42 #if 0 43 #define debug(x,args...) printk(KERN_DEBUG "%s: " x, __func__ , ##args) 44 #else 45 #define debug(x,args...) 46 #endif 47 48 /* Don't ask.. */ 49 #define to_cycles(ns) ((ns)/120) 50 #define to_ns(cycles) ((cycles)*120) 51 52 static int yenta_probe_cb_irq(struct yenta_socket *socket); 53 54 55 static unsigned int override_bios; 56 module_param(override_bios, uint, 0000); 57 MODULE_PARM_DESC (override_bios, "yenta ignore bios resource allocation"); 58 59 /* 60 * Generate easy-to-use ways of reading a cardbus sockets 61 * regular memory space ("cb_xxx"), configuration space 62 * ("config_xxx") and compatibility space ("exca_xxxx") 63 */ 64 static inline u32 cb_readl(struct yenta_socket *socket, unsigned reg) 65 { 66 u32 val = readl(socket->base + reg); 67 debug("%p %04x %08x\n", socket, reg, val); 68 return val; 69 } 70 71 static inline void cb_writel(struct yenta_socket *socket, unsigned reg, u32 val) 72 { 73 debug("%p %04x %08x\n", socket, reg, val); 74 writel(val, socket->base + reg); 75 readl(socket->base + reg); /* avoid problems with PCI write posting */ 76 } 77 78 static inline u8 config_readb(struct yenta_socket *socket, unsigned offset) 79 { 80 u8 val; 81 pci_read_config_byte(socket->dev, offset, &val); 82 debug("%p %04x %02x\n", socket, offset, val); 83 return val; 84 } 85 86 static inline u16 config_readw(struct yenta_socket *socket, unsigned offset) 87 { 88 u16 val; 89 pci_read_config_word(socket->dev, offset, &val); 90 debug("%p %04x %04x\n", socket, offset, val); 91 return val; 92 } 93 94 static inline u32 config_readl(struct yenta_socket *socket, unsigned offset) 95 { 96 u32 val; 97 pci_read_config_dword(socket->dev, offset, &val); 98 debug("%p %04x %08x\n", socket, offset, val); 99 return val; 100 } 101 102 static inline void config_writeb(struct yenta_socket *socket, unsigned offset, u8 val) 103 { 104 debug("%p %04x %02x\n", socket, offset, val); 105 pci_write_config_byte(socket->dev, offset, val); 106 } 107 108 static inline void config_writew(struct yenta_socket *socket, unsigned offset, u16 val) 109 { 110 debug("%p %04x %04x\n", socket, offset, val); 111 pci_write_config_word(socket->dev, offset, val); 112 } 113 114 static inline void config_writel(struct yenta_socket *socket, unsigned offset, u32 val) 115 { 116 debug("%p %04x %08x\n", socket, offset, val); 117 pci_write_config_dword(socket->dev, offset, val); 118 } 119 120 static inline u8 exca_readb(struct yenta_socket *socket, unsigned reg) 121 { 122 u8 val = readb(socket->base + 0x800 + reg); 123 debug("%p %04x %02x\n", socket, reg, val); 124 return val; 125 } 126 127 static inline u8 exca_readw(struct yenta_socket *socket, unsigned reg) 128 { 129 u16 val; 130 val = readb(socket->base + 0x800 + reg); 131 val |= readb(socket->base + 0x800 + reg + 1) << 8; 132 debug("%p %04x %04x\n", socket, reg, val); 133 return val; 134 } 135 136 static inline void exca_writeb(struct yenta_socket *socket, unsigned reg, u8 val) 137 { 138 debug("%p %04x %02x\n", socket, reg, val); 139 writeb(val, socket->base + 0x800 + reg); 140 readb(socket->base + 0x800 + reg); /* PCI write posting... */ 141 } 142 143 static void exca_writew(struct yenta_socket *socket, unsigned reg, u16 val) 144 { 145 debug("%p %04x %04x\n", socket, reg, val); 146 writeb(val, socket->base + 0x800 + reg); 147 writeb(val >> 8, socket->base + 0x800 + reg + 1); 148 149 /* PCI write posting... */ 150 readb(socket->base + 0x800 + reg); 151 readb(socket->base + 0x800 + reg + 1); 152 } 153 154 static ssize_t show_yenta_registers(struct device *yentadev, struct device_attribute *attr, char *buf) 155 { 156 struct pci_dev *dev = to_pci_dev(yentadev); 157 struct yenta_socket *socket = pci_get_drvdata(dev); 158 int offset = 0, i; 159 160 offset = snprintf(buf, PAGE_SIZE, "CB registers:"); 161 for (i = 0; i < 0x24; i += 4) { 162 unsigned val; 163 if (!(i & 15)) 164 offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n%02x:", i); 165 val = cb_readl(socket, i); 166 offset += snprintf(buf + offset, PAGE_SIZE - offset, " %08x", val); 167 } 168 169 offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n\nExCA registers:"); 170 for (i = 0; i < 0x45; i++) { 171 unsigned char val; 172 if (!(i & 7)) { 173 if (i & 8) { 174 memcpy(buf + offset, " -", 2); 175 offset += 2; 176 } else 177 offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n%02x:", i); 178 } 179 val = exca_readb(socket, i); 180 offset += snprintf(buf + offset, PAGE_SIZE - offset, " %02x", val); 181 } 182 buf[offset++] = '\n'; 183 return offset; 184 } 185 186 static DEVICE_ATTR(yenta_registers, S_IRUSR, show_yenta_registers, NULL); 187 188 /* 189 * Ugh, mixed-mode cardbus and 16-bit pccard state: things depend 190 * on what kind of card is inserted.. 191 */ 192 static int yenta_get_status(struct pcmcia_socket *sock, unsigned int *value) 193 { 194 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); 195 unsigned int val; 196 u32 state = cb_readl(socket, CB_SOCKET_STATE); 197 198 val = (state & CB_3VCARD) ? SS_3VCARD : 0; 199 val |= (state & CB_XVCARD) ? SS_XVCARD : 0; 200 val |= (state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) ? 0 : SS_PENDING; 201 val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? SS_PENDING : 0; 202 203 204 if (state & CB_CBCARD) { 205 val |= SS_CARDBUS; 206 val |= (state & CB_CARDSTS) ? SS_STSCHG : 0; 207 val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? 0 : SS_DETECT; 208 val |= (state & CB_PWRCYCLE) ? SS_POWERON | SS_READY : 0; 209 } else if (state & CB_16BITCARD) { 210 u8 status = exca_readb(socket, I365_STATUS); 211 val |= ((status & I365_CS_DETECT) == I365_CS_DETECT) ? SS_DETECT : 0; 212 if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) { 213 val |= (status & I365_CS_STSCHG) ? 0 : SS_STSCHG; 214 } else { 215 val |= (status & I365_CS_BVD1) ? 0 : SS_BATDEAD; 216 val |= (status & I365_CS_BVD2) ? 0 : SS_BATWARN; 217 } 218 val |= (status & I365_CS_WRPROT) ? SS_WRPROT : 0; 219 val |= (status & I365_CS_READY) ? SS_READY : 0; 220 val |= (status & I365_CS_POWERON) ? SS_POWERON : 0; 221 } 222 223 *value = val; 224 return 0; 225 } 226 227 static void yenta_get_power(struct yenta_socket *socket, socket_state_t *state) 228 { 229 if (!(cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) && 230 (socket->flags & YENTA_16BIT_POWER_EXCA)) { 231 u8 reg, vcc, vpp; 232 233 reg = exca_readb(socket, I365_POWER); 234 vcc = reg & I365_VCC_MASK; 235 vpp = reg & I365_VPP1_MASK; 236 state->Vcc = state->Vpp = 0; 237 238 if (socket->flags & YENTA_16BIT_POWER_DF) { 239 if (vcc == I365_VCC_3V) 240 state->Vcc = 33; 241 if (vcc == I365_VCC_5V) 242 state->Vcc = 50; 243 if (vpp == I365_VPP1_5V) 244 state->Vpp = state->Vcc; 245 if (vpp == I365_VPP1_12V) 246 state->Vpp = 120; 247 } else { 248 if (reg & I365_VCC_5V) { 249 state->Vcc = 50; 250 if (vpp == I365_VPP1_5V) 251 state->Vpp = 50; 252 if (vpp == I365_VPP1_12V) 253 state->Vpp = 120; 254 } 255 } 256 } else { 257 u32 control; 258 259 control = cb_readl(socket, CB_SOCKET_CONTROL); 260 261 switch (control & CB_SC_VCC_MASK) { 262 case CB_SC_VCC_5V: state->Vcc = 50; break; 263 case CB_SC_VCC_3V: state->Vcc = 33; break; 264 default: state->Vcc = 0; 265 } 266 267 switch (control & CB_SC_VPP_MASK) { 268 case CB_SC_VPP_12V: state->Vpp = 120; break; 269 case CB_SC_VPP_5V: state->Vpp = 50; break; 270 case CB_SC_VPP_3V: state->Vpp = 33; break; 271 default: state->Vpp = 0; 272 } 273 } 274 } 275 276 static int yenta_get_socket(struct pcmcia_socket *sock, socket_state_t *state) 277 { 278 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); 279 u8 reg; 280 u32 control; 281 282 control = cb_readl(socket, CB_SOCKET_CONTROL); 283 284 yenta_get_power(socket, state); 285 state->io_irq = socket->io_irq; 286 287 if (cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) { 288 u16 bridge = config_readw(socket, CB_BRIDGE_CONTROL); 289 if (bridge & CB_BRIDGE_CRST) 290 state->flags |= SS_RESET; 291 return 0; 292 } 293 294 /* 16-bit card state.. */ 295 reg = exca_readb(socket, I365_POWER); 296 state->flags = (reg & I365_PWR_AUTO) ? SS_PWR_AUTO : 0; 297 state->flags |= (reg & I365_PWR_OUT) ? SS_OUTPUT_ENA : 0; 298 299 reg = exca_readb(socket, I365_INTCTL); 300 state->flags |= (reg & I365_PC_RESET) ? 0 : SS_RESET; 301 state->flags |= (reg & I365_PC_IOCARD) ? SS_IOCARD : 0; 302 303 reg = exca_readb(socket, I365_CSCINT); 304 state->csc_mask = (reg & I365_CSC_DETECT) ? SS_DETECT : 0; 305 if (state->flags & SS_IOCARD) { 306 state->csc_mask |= (reg & I365_CSC_STSCHG) ? SS_STSCHG : 0; 307 } else { 308 state->csc_mask |= (reg & I365_CSC_BVD1) ? SS_BATDEAD : 0; 309 state->csc_mask |= (reg & I365_CSC_BVD2) ? SS_BATWARN : 0; 310 state->csc_mask |= (reg & I365_CSC_READY) ? SS_READY : 0; 311 } 312 313 return 0; 314 } 315 316 static void yenta_set_power(struct yenta_socket *socket, socket_state_t *state) 317 { 318 /* some birdges require to use the ExCA registers to power 16bit cards */ 319 if (!(cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) && 320 (socket->flags & YENTA_16BIT_POWER_EXCA)) { 321 u8 reg, old; 322 reg = old = exca_readb(socket, I365_POWER); 323 reg &= ~(I365_VCC_MASK | I365_VPP1_MASK | I365_VPP2_MASK); 324 325 /* i82365SL-DF style */ 326 if (socket->flags & YENTA_16BIT_POWER_DF) { 327 switch (state->Vcc) { 328 case 33: reg |= I365_VCC_3V; break; 329 case 50: reg |= I365_VCC_5V; break; 330 default: reg = 0; break; 331 } 332 switch (state->Vpp) { 333 case 33: 334 case 50: reg |= I365_VPP1_5V; break; 335 case 120: reg |= I365_VPP1_12V; break; 336 } 337 } else { 338 /* i82365SL-B style */ 339 switch (state->Vcc) { 340 case 50: reg |= I365_VCC_5V; break; 341 default: reg = 0; break; 342 } 343 switch (state->Vpp) { 344 case 50: reg |= I365_VPP1_5V | I365_VPP2_5V; break; 345 case 120: reg |= I365_VPP1_12V | I365_VPP2_12V; break; 346 } 347 } 348 349 if (reg != old) 350 exca_writeb(socket, I365_POWER, reg); 351 } else { 352 u32 reg = 0; /* CB_SC_STPCLK? */ 353 switch (state->Vcc) { 354 case 33: reg = CB_SC_VCC_3V; break; 355 case 50: reg = CB_SC_VCC_5V; break; 356 default: reg = 0; break; 357 } 358 switch (state->Vpp) { 359 case 33: reg |= CB_SC_VPP_3V; break; 360 case 50: reg |= CB_SC_VPP_5V; break; 361 case 120: reg |= CB_SC_VPP_12V; break; 362 } 363 if (reg != cb_readl(socket, CB_SOCKET_CONTROL)) 364 cb_writel(socket, CB_SOCKET_CONTROL, reg); 365 } 366 } 367 368 static int yenta_set_socket(struct pcmcia_socket *sock, socket_state_t *state) 369 { 370 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); 371 u16 bridge; 372 373 yenta_set_power(socket, state); 374 socket->io_irq = state->io_irq; 375 bridge = config_readw(socket, CB_BRIDGE_CONTROL) & ~(CB_BRIDGE_CRST | CB_BRIDGE_INTR); 376 if (cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) { 377 u8 intr; 378 bridge |= (state->flags & SS_RESET) ? CB_BRIDGE_CRST : 0; 379 380 /* ISA interrupt control? */ 381 intr = exca_readb(socket, I365_INTCTL); 382 intr = (intr & ~0xf); 383 if (!socket->cb_irq) { 384 intr |= state->io_irq; 385 bridge |= CB_BRIDGE_INTR; 386 } 387 exca_writeb(socket, I365_INTCTL, intr); 388 } else { 389 u8 reg; 390 391 reg = exca_readb(socket, I365_INTCTL) & (I365_RING_ENA | I365_INTR_ENA); 392 reg |= (state->flags & SS_RESET) ? 0 : I365_PC_RESET; 393 reg |= (state->flags & SS_IOCARD) ? I365_PC_IOCARD : 0; 394 if (state->io_irq != socket->cb_irq) { 395 reg |= state->io_irq; 396 bridge |= CB_BRIDGE_INTR; 397 } 398 exca_writeb(socket, I365_INTCTL, reg); 399 400 reg = exca_readb(socket, I365_POWER) & (I365_VCC_MASK|I365_VPP1_MASK); 401 reg |= I365_PWR_NORESET; 402 if (state->flags & SS_PWR_AUTO) reg |= I365_PWR_AUTO; 403 if (state->flags & SS_OUTPUT_ENA) reg |= I365_PWR_OUT; 404 if (exca_readb(socket, I365_POWER) != reg) 405 exca_writeb(socket, I365_POWER, reg); 406 407 /* CSC interrupt: no ISA irq for CSC */ 408 reg = I365_CSC_DETECT; 409 if (state->flags & SS_IOCARD) { 410 if (state->csc_mask & SS_STSCHG) reg |= I365_CSC_STSCHG; 411 } else { 412 if (state->csc_mask & SS_BATDEAD) reg |= I365_CSC_BVD1; 413 if (state->csc_mask & SS_BATWARN) reg |= I365_CSC_BVD2; 414 if (state->csc_mask & SS_READY) reg |= I365_CSC_READY; 415 } 416 exca_writeb(socket, I365_CSCINT, reg); 417 exca_readb(socket, I365_CSC); 418 if(sock->zoom_video) 419 sock->zoom_video(sock, state->flags & SS_ZVCARD); 420 } 421 config_writew(socket, CB_BRIDGE_CONTROL, bridge); 422 /* Socket event mask: get card insert/remove events.. */ 423 cb_writel(socket, CB_SOCKET_EVENT, -1); 424 cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK); 425 return 0; 426 } 427 428 static int yenta_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io) 429 { 430 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); 431 int map; 432 unsigned char ioctl, addr, enable; 433 434 map = io->map; 435 436 if (map > 1) 437 return -EINVAL; 438 439 enable = I365_ENA_IO(map); 440 addr = exca_readb(socket, I365_ADDRWIN); 441 442 /* Disable the window before changing it.. */ 443 if (addr & enable) { 444 addr &= ~enable; 445 exca_writeb(socket, I365_ADDRWIN, addr); 446 } 447 448 exca_writew(socket, I365_IO(map)+I365_W_START, io->start); 449 exca_writew(socket, I365_IO(map)+I365_W_STOP, io->stop); 450 451 ioctl = exca_readb(socket, I365_IOCTL) & ~I365_IOCTL_MASK(map); 452 if (io->flags & MAP_0WS) ioctl |= I365_IOCTL_0WS(map); 453 if (io->flags & MAP_16BIT) ioctl |= I365_IOCTL_16BIT(map); 454 if (io->flags & MAP_AUTOSZ) ioctl |= I365_IOCTL_IOCS16(map); 455 exca_writeb(socket, I365_IOCTL, ioctl); 456 457 if (io->flags & MAP_ACTIVE) 458 exca_writeb(socket, I365_ADDRWIN, addr | enable); 459 return 0; 460 } 461 462 static int yenta_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *mem) 463 { 464 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); 465 struct pci_bus_region region; 466 int map; 467 unsigned char addr, enable; 468 unsigned int start, stop, card_start; 469 unsigned short word; 470 471 pcibios_resource_to_bus(socket->dev, ®ion, mem->res); 472 473 map = mem->map; 474 start = region.start; 475 stop = region.end; 476 card_start = mem->card_start; 477 478 if (map > 4 || start > stop || ((start ^ stop) >> 24) || 479 (card_start >> 26) || mem->speed > 1000) 480 return -EINVAL; 481 482 enable = I365_ENA_MEM(map); 483 addr = exca_readb(socket, I365_ADDRWIN); 484 if (addr & enable) { 485 addr &= ~enable; 486 exca_writeb(socket, I365_ADDRWIN, addr); 487 } 488 489 exca_writeb(socket, CB_MEM_PAGE(map), start >> 24); 490 491 word = (start >> 12) & 0x0fff; 492 if (mem->flags & MAP_16BIT) 493 word |= I365_MEM_16BIT; 494 if (mem->flags & MAP_0WS) 495 word |= I365_MEM_0WS; 496 exca_writew(socket, I365_MEM(map) + I365_W_START, word); 497 498 word = (stop >> 12) & 0x0fff; 499 switch (to_cycles(mem->speed)) { 500 case 0: break; 501 case 1: word |= I365_MEM_WS0; break; 502 case 2: word |= I365_MEM_WS1; break; 503 default: word |= I365_MEM_WS1 | I365_MEM_WS0; break; 504 } 505 exca_writew(socket, I365_MEM(map) + I365_W_STOP, word); 506 507 word = ((card_start - start) >> 12) & 0x3fff; 508 if (mem->flags & MAP_WRPROT) 509 word |= I365_MEM_WRPROT; 510 if (mem->flags & MAP_ATTRIB) 511 word |= I365_MEM_REG; 512 exca_writew(socket, I365_MEM(map) + I365_W_OFF, word); 513 514 if (mem->flags & MAP_ACTIVE) 515 exca_writeb(socket, I365_ADDRWIN, addr | enable); 516 return 0; 517 } 518 519 520 521 static irqreturn_t yenta_interrupt(int irq, void *dev_id, struct pt_regs *regs) 522 { 523 unsigned int events; 524 struct yenta_socket *socket = (struct yenta_socket *) dev_id; 525 u8 csc; 526 u32 cb_event; 527 528 /* Clear interrupt status for the event */ 529 cb_event = cb_readl(socket, CB_SOCKET_EVENT); 530 cb_writel(socket, CB_SOCKET_EVENT, cb_event); 531 532 csc = exca_readb(socket, I365_CSC); 533 534 events = (cb_event & (CB_CD1EVENT | CB_CD2EVENT)) ? SS_DETECT : 0 ; 535 events |= (csc & I365_CSC_DETECT) ? SS_DETECT : 0; 536 if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) { 537 events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0; 538 } else { 539 events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0; 540 events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0; 541 events |= (csc & I365_CSC_READY) ? SS_READY : 0; 542 } 543 544 if (events) 545 pcmcia_parse_events(&socket->socket, events); 546 547 if (cb_event || csc) 548 return IRQ_HANDLED; 549 550 return IRQ_NONE; 551 } 552 553 static void yenta_interrupt_wrapper(unsigned long data) 554 { 555 struct yenta_socket *socket = (struct yenta_socket *) data; 556 557 yenta_interrupt(0, (void *)socket, NULL); 558 socket->poll_timer.expires = jiffies + HZ; 559 add_timer(&socket->poll_timer); 560 } 561 562 static void yenta_clear_maps(struct yenta_socket *socket) 563 { 564 int i; 565 struct resource res = { .start = 0, .end = 0x0fff }; 566 pccard_io_map io = { 0, 0, 0, 0, 1 }; 567 pccard_mem_map mem = { .res = &res, }; 568 569 yenta_set_socket(&socket->socket, &dead_socket); 570 for (i = 0; i < 2; i++) { 571 io.map = i; 572 yenta_set_io_map(&socket->socket, &io); 573 } 574 for (i = 0; i < 5; i++) { 575 mem.map = i; 576 yenta_set_mem_map(&socket->socket, &mem); 577 } 578 } 579 580 /* redoes voltage interrogation if required */ 581 static void yenta_interrogate(struct yenta_socket *socket) 582 { 583 u32 state; 584 585 state = cb_readl(socket, CB_SOCKET_STATE); 586 if (!(state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) || 587 (state & (CB_CDETECT1 | CB_CDETECT2 | CB_NOTACARD | CB_BADVCCREQ)) || 588 ((state & (CB_16BITCARD | CB_CBCARD)) == (CB_16BITCARD | CB_CBCARD))) 589 cb_writel(socket, CB_SOCKET_FORCE, CB_CVSTEST); 590 } 591 592 /* Called at resume and initialization events */ 593 static int yenta_sock_init(struct pcmcia_socket *sock) 594 { 595 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); 596 597 exca_writeb(socket, I365_GBLCTL, 0x00); 598 exca_writeb(socket, I365_GENCTL, 0x00); 599 600 /* Redo card voltage interrogation */ 601 yenta_interrogate(socket); 602 603 yenta_clear_maps(socket); 604 605 if (socket->type && socket->type->sock_init) 606 socket->type->sock_init(socket); 607 608 /* Re-enable CSC interrupts */ 609 cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK); 610 611 return 0; 612 } 613 614 static int yenta_sock_suspend(struct pcmcia_socket *sock) 615 { 616 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); 617 618 /* Disable CSC interrupts */ 619 cb_writel(socket, CB_SOCKET_MASK, 0x0); 620 621 return 0; 622 } 623 624 /* 625 * Use an adaptive allocation for the memory resource, 626 * sometimes the memory behind pci bridges is limited: 627 * 1/8 of the size of the io window of the parent. 628 * max 4 MB, min 16 kB. We try very hard to not get below 629 * the "ACC" values, though. 630 */ 631 #define BRIDGE_MEM_MAX 4*1024*1024 632 #define BRIDGE_MEM_ACC 128*1024 633 #define BRIDGE_MEM_MIN 16*1024 634 635 #define BRIDGE_IO_MAX 512 636 #define BRIDGE_IO_ACC 256 637 #define BRIDGE_IO_MIN 32 638 639 #ifndef PCIBIOS_MIN_CARDBUS_IO 640 #define PCIBIOS_MIN_CARDBUS_IO PCIBIOS_MIN_IO 641 #endif 642 643 static int yenta_search_one_res(struct resource *root, struct resource *res, 644 u32 min) 645 { 646 u32 align, size, start, end; 647 648 if (res->flags & IORESOURCE_IO) { 649 align = 1024; 650 size = BRIDGE_IO_MAX; 651 start = PCIBIOS_MIN_CARDBUS_IO; 652 end = ~0U; 653 } else { 654 unsigned long avail = root->end - root->start; 655 int i; 656 size = BRIDGE_MEM_MAX; 657 if (size > avail/8) { 658 size=(avail+1)/8; 659 /* round size down to next power of 2 */ 660 i = 0; 661 while ((size /= 2) != 0) 662 i++; 663 size = 1 << i; 664 } 665 if (size < min) 666 size = min; 667 align = size; 668 start = PCIBIOS_MIN_MEM; 669 end = ~0U; 670 } 671 672 do { 673 if (allocate_resource(root, res, size, start, end, align, 674 NULL, NULL)==0) { 675 return 1; 676 } 677 size = size/2; 678 align = size; 679 } while (size >= min); 680 681 return 0; 682 } 683 684 685 static int yenta_search_res(struct yenta_socket *socket, struct resource *res, 686 u32 min) 687 { 688 int i; 689 for (i=0; i<PCI_BUS_NUM_RESOURCES; i++) { 690 struct resource * root = socket->dev->bus->resource[i]; 691 if (!root) 692 continue; 693 694 if ((res->flags ^ root->flags) & 695 (IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH)) 696 continue; /* Wrong type */ 697 698 if (yenta_search_one_res(root, res, min)) 699 return 1; 700 } 701 return 0; 702 } 703 704 static int yenta_allocate_res(struct yenta_socket *socket, int nr, unsigned type, int addr_start, int addr_end) 705 { 706 struct resource *root, *res; 707 struct pci_bus_region region; 708 unsigned mask; 709 710 res = socket->dev->resource + PCI_BRIDGE_RESOURCES + nr; 711 /* Already allocated? */ 712 if (res->parent) 713 return 0; 714 715 /* The granularity of the memory limit is 4kB, on IO it's 4 bytes */ 716 mask = ~0xfff; 717 if (type & IORESOURCE_IO) 718 mask = ~3; 719 720 res->name = socket->dev->subordinate->name; 721 res->flags = type; 722 723 region.start = config_readl(socket, addr_start) & mask; 724 region.end = config_readl(socket, addr_end) | ~mask; 725 if (region.start && region.end > region.start && !override_bios) { 726 pcibios_bus_to_resource(socket->dev, res, ®ion); 727 root = pci_find_parent_resource(socket->dev, res); 728 if (root && (request_resource(root, res) == 0)) 729 return 0; 730 printk(KERN_INFO "yenta %s: Preassigned resource %d busy or not available, reconfiguring...\n", 731 pci_name(socket->dev), nr); 732 } 733 734 if (type & IORESOURCE_IO) { 735 if ((yenta_search_res(socket, res, BRIDGE_IO_MAX)) || 736 (yenta_search_res(socket, res, BRIDGE_IO_ACC)) || 737 (yenta_search_res(socket, res, BRIDGE_IO_MIN))) 738 return 1; 739 } else { 740 if (type & IORESOURCE_PREFETCH) { 741 if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) || 742 (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) || 743 (yenta_search_res(socket, res, BRIDGE_MEM_MIN))) 744 return 1; 745 /* Approximating prefetchable by non-prefetchable */ 746 res->flags = IORESOURCE_MEM; 747 } 748 if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) || 749 (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) || 750 (yenta_search_res(socket, res, BRIDGE_MEM_MIN))) 751 return 1; 752 } 753 754 printk(KERN_INFO "yenta %s: no resource of type %x available, trying to continue...\n", 755 pci_name(socket->dev), type); 756 res->start = res->end = res->flags = 0; 757 return 0; 758 } 759 760 /* 761 * Allocate the bridge mappings for the device.. 762 */ 763 static void yenta_allocate_resources(struct yenta_socket *socket) 764 { 765 int program = 0; 766 program += yenta_allocate_res(socket, 0, IORESOURCE_IO, 767 PCI_CB_IO_BASE_0, PCI_CB_IO_LIMIT_0); 768 program += yenta_allocate_res(socket, 1, IORESOURCE_IO, 769 PCI_CB_IO_BASE_1, PCI_CB_IO_LIMIT_1); 770 program += yenta_allocate_res(socket, 2, IORESOURCE_MEM|IORESOURCE_PREFETCH, 771 PCI_CB_MEMORY_BASE_0, PCI_CB_MEMORY_LIMIT_0); 772 program += yenta_allocate_res(socket, 3, IORESOURCE_MEM, 773 PCI_CB_MEMORY_BASE_1, PCI_CB_MEMORY_LIMIT_1); 774 if (program) 775 pci_setup_cardbus(socket->dev->subordinate); 776 } 777 778 779 /* 780 * Free the bridge mappings for the device.. 781 */ 782 static void yenta_free_resources(struct yenta_socket *socket) 783 { 784 int i; 785 for (i=0;i<4;i++) { 786 struct resource *res; 787 res = socket->dev->resource + PCI_BRIDGE_RESOURCES + i; 788 if (res->start != 0 && res->end != 0) 789 release_resource(res); 790 res->start = res->end = res->flags = 0; 791 } 792 } 793 794 795 /* 796 * Close it down - release our resources and go home.. 797 */ 798 static void yenta_close(struct pci_dev *dev) 799 { 800 struct yenta_socket *sock = pci_get_drvdata(dev); 801 802 /* Remove the register attributes */ 803 device_remove_file(&dev->dev, &dev_attr_yenta_registers); 804 805 /* we don't want a dying socket registered */ 806 pcmcia_unregister_socket(&sock->socket); 807 808 /* Disable all events so we don't die in an IRQ storm */ 809 cb_writel(sock, CB_SOCKET_MASK, 0x0); 810 exca_writeb(sock, I365_CSCINT, 0); 811 812 if (sock->cb_irq) 813 free_irq(sock->cb_irq, sock); 814 else 815 del_timer_sync(&sock->poll_timer); 816 817 if (sock->base) 818 iounmap(sock->base); 819 yenta_free_resources(sock); 820 821 pci_release_regions(dev); 822 pci_disable_device(dev); 823 pci_set_drvdata(dev, NULL); 824 } 825 826 827 static struct pccard_operations yenta_socket_operations = { 828 .init = yenta_sock_init, 829 .suspend = yenta_sock_suspend, 830 .get_status = yenta_get_status, 831 .get_socket = yenta_get_socket, 832 .set_socket = yenta_set_socket, 833 .set_io_map = yenta_set_io_map, 834 .set_mem_map = yenta_set_mem_map, 835 }; 836 837 838 #include "ti113x.h" 839 #include "ricoh.h" 840 #include "topic.h" 841 #include "o2micro.h" 842 843 enum { 844 CARDBUS_TYPE_DEFAULT = -1, 845 CARDBUS_TYPE_TI, 846 CARDBUS_TYPE_TI113X, 847 CARDBUS_TYPE_TI12XX, 848 CARDBUS_TYPE_TI1250, 849 CARDBUS_TYPE_RICOH, 850 CARDBUS_TYPE_TOPIC95, 851 CARDBUS_TYPE_TOPIC97, 852 CARDBUS_TYPE_O2MICRO, 853 CARDBUS_TYPE_ENE, 854 }; 855 856 /* 857 * Different cardbus controllers have slightly different 858 * initialization sequences etc details. List them here.. 859 */ 860 static struct cardbus_type cardbus_type[] = { 861 [CARDBUS_TYPE_TI] = { 862 .override = ti_override, 863 .save_state = ti_save_state, 864 .restore_state = ti_restore_state, 865 .sock_init = ti_init, 866 }, 867 [CARDBUS_TYPE_TI113X] = { 868 .override = ti113x_override, 869 .save_state = ti_save_state, 870 .restore_state = ti_restore_state, 871 .sock_init = ti_init, 872 }, 873 [CARDBUS_TYPE_TI12XX] = { 874 .override = ti12xx_override, 875 .save_state = ti_save_state, 876 .restore_state = ti_restore_state, 877 .sock_init = ti_init, 878 }, 879 [CARDBUS_TYPE_TI1250] = { 880 .override = ti1250_override, 881 .save_state = ti_save_state, 882 .restore_state = ti_restore_state, 883 .sock_init = ti_init, 884 }, 885 [CARDBUS_TYPE_RICOH] = { 886 .override = ricoh_override, 887 .save_state = ricoh_save_state, 888 .restore_state = ricoh_restore_state, 889 }, 890 [CARDBUS_TYPE_TOPIC95] = { 891 .override = topic95_override, 892 }, 893 [CARDBUS_TYPE_TOPIC97] = { 894 .override = topic97_override, 895 }, 896 [CARDBUS_TYPE_O2MICRO] = { 897 .override = o2micro_override, 898 .restore_state = o2micro_restore_state, 899 }, 900 [CARDBUS_TYPE_ENE] = { 901 .override = ene_override, 902 .save_state = ti_save_state, 903 .restore_state = ti_restore_state, 904 .sock_init = ti_init, 905 }, 906 }; 907 908 909 /* 910 * Only probe "regular" interrupts, don't 911 * touch dangerous spots like the mouse irq, 912 * because there are mice that apparently 913 * get really confused if they get fondled 914 * too intimately. 915 * 916 * Default to 11, 10, 9, 7, 6, 5, 4, 3. 917 */ 918 static u32 isa_interrupts = 0x0ef8; 919 920 static unsigned int yenta_probe_irq(struct yenta_socket *socket, u32 isa_irq_mask) 921 { 922 int i; 923 unsigned long val; 924 u32 mask; 925 926 /* 927 * Probe for usable interrupts using the force 928 * register to generate bogus card status events. 929 */ 930 cb_writel(socket, CB_SOCKET_EVENT, -1); 931 cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK); 932 exca_writeb(socket, I365_CSCINT, 0); 933 val = probe_irq_on() & isa_irq_mask; 934 for (i = 1; i < 16; i++) { 935 if (!((val >> i) & 1)) 936 continue; 937 exca_writeb(socket, I365_CSCINT, I365_CSC_STSCHG | (i << 4)); 938 cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS); 939 udelay(100); 940 cb_writel(socket, CB_SOCKET_EVENT, -1); 941 } 942 cb_writel(socket, CB_SOCKET_MASK, 0); 943 exca_writeb(socket, I365_CSCINT, 0); 944 945 mask = probe_irq_mask(val) & 0xffff; 946 947 return mask; 948 } 949 950 951 /* interrupt handler, only used during probing */ 952 static irqreturn_t yenta_probe_handler(int irq, void *dev_id, struct pt_regs *regs) 953 { 954 struct yenta_socket *socket = (struct yenta_socket *) dev_id; 955 u8 csc; 956 u32 cb_event; 957 958 /* Clear interrupt status for the event */ 959 cb_event = cb_readl(socket, CB_SOCKET_EVENT); 960 cb_writel(socket, CB_SOCKET_EVENT, -1); 961 csc = exca_readb(socket, I365_CSC); 962 963 if (cb_event || csc) { 964 socket->probe_status = 1; 965 return IRQ_HANDLED; 966 } 967 968 return IRQ_NONE; 969 } 970 971 /* probes the PCI interrupt, use only on override functions */ 972 static int yenta_probe_cb_irq(struct yenta_socket *socket) 973 { 974 if (!socket->cb_irq) 975 return -1; 976 977 socket->probe_status = 0; 978 979 if (request_irq(socket->cb_irq, yenta_probe_handler, SA_SHIRQ, "yenta", socket)) { 980 printk(KERN_WARNING "Yenta: request_irq() in yenta_probe_cb_irq() failed!\n"); 981 return -1; 982 } 983 984 /* generate interrupt, wait */ 985 exca_writeb(socket, I365_CSCINT, I365_CSC_STSCHG); 986 cb_writel(socket, CB_SOCKET_EVENT, -1); 987 cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK); 988 cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS); 989 990 msleep(100); 991 992 /* disable interrupts */ 993 cb_writel(socket, CB_SOCKET_MASK, 0); 994 exca_writeb(socket, I365_CSCINT, 0); 995 cb_writel(socket, CB_SOCKET_EVENT, -1); 996 exca_readb(socket, I365_CSC); 997 998 free_irq(socket->cb_irq, socket); 999 1000 return (int) socket->probe_status; 1001 } 1002 1003 1004 1005 /* 1006 * Set static data that doesn't need re-initializing.. 1007 */ 1008 static void yenta_get_socket_capabilities(struct yenta_socket *socket, u32 isa_irq_mask) 1009 { 1010 socket->socket.pci_irq = socket->cb_irq; 1011 if (isa_probe) 1012 socket->socket.irq_mask = yenta_probe_irq(socket, isa_irq_mask); 1013 else 1014 socket->socket.irq_mask = 0; 1015 1016 printk(KERN_INFO "Yenta: ISA IRQ mask 0x%04x, PCI irq %d\n", 1017 socket->socket.irq_mask, socket->cb_irq); 1018 } 1019 1020 /* 1021 * Initialize the standard cardbus registers 1022 */ 1023 static void yenta_config_init(struct yenta_socket *socket) 1024 { 1025 u16 bridge; 1026 struct pci_dev *dev = socket->dev; 1027 struct pci_bus_region region; 1028 1029 pcibios_resource_to_bus(socket->dev, ®ion, &dev->resource[0]); 1030 1031 config_writel(socket, CB_LEGACY_MODE_BASE, 0); 1032 config_writel(socket, PCI_BASE_ADDRESS_0, region.start); 1033 config_writew(socket, PCI_COMMAND, 1034 PCI_COMMAND_IO | 1035 PCI_COMMAND_MEMORY | 1036 PCI_COMMAND_MASTER | 1037 PCI_COMMAND_WAIT); 1038 1039 /* MAGIC NUMBERS! Fixme */ 1040 config_writeb(socket, PCI_CACHE_LINE_SIZE, L1_CACHE_BYTES / 4); 1041 config_writeb(socket, PCI_LATENCY_TIMER, 168); 1042 config_writel(socket, PCI_PRIMARY_BUS, 1043 (176 << 24) | /* sec. latency timer */ 1044 (dev->subordinate->subordinate << 16) | /* subordinate bus */ 1045 (dev->subordinate->secondary << 8) | /* secondary bus */ 1046 dev->subordinate->primary); /* primary bus */ 1047 1048 /* 1049 * Set up the bridging state: 1050 * - enable write posting. 1051 * - memory window 0 prefetchable, window 1 non-prefetchable 1052 * - PCI interrupts enabled if a PCI interrupt exists.. 1053 */ 1054 bridge = config_readw(socket, CB_BRIDGE_CONTROL); 1055 bridge &= ~(CB_BRIDGE_CRST | CB_BRIDGE_PREFETCH1 | CB_BRIDGE_ISAEN | CB_BRIDGE_VGAEN); 1056 bridge |= CB_BRIDGE_PREFETCH0 | CB_BRIDGE_POSTEN; 1057 config_writew(socket, CB_BRIDGE_CONTROL, bridge); 1058 } 1059 1060 /* 1061 * Initialize a cardbus controller. Make sure we have a usable 1062 * interrupt, and that we can map the cardbus area. Fill in the 1063 * socket information structure.. 1064 */ 1065 static int __devinit yenta_probe (struct pci_dev *dev, const struct pci_device_id *id) 1066 { 1067 struct yenta_socket *socket; 1068 int ret; 1069 1070 /* 1071 * If we failed to assign proper bus numbers for this cardbus 1072 * controller during PCI probe, its subordinate pci_bus is NULL. 1073 * Bail out if so. 1074 */ 1075 if (!dev->subordinate) { 1076 printk(KERN_ERR "Yenta: no bus associated with %s! " 1077 "(try 'pci=assign-busses')\n", pci_name(dev)); 1078 return -ENODEV; 1079 } 1080 1081 socket = kmalloc(sizeof(struct yenta_socket), GFP_KERNEL); 1082 if (!socket) 1083 return -ENOMEM; 1084 memset(socket, 0, sizeof(*socket)); 1085 1086 /* prepare pcmcia_socket */ 1087 socket->socket.ops = ¥ta_socket_operations; 1088 socket->socket.resource_ops = &pccard_nonstatic_ops; 1089 socket->socket.dev.dev = &dev->dev; 1090 socket->socket.driver_data = socket; 1091 socket->socket.owner = THIS_MODULE; 1092 socket->socket.features = SS_CAP_PAGE_REGS | SS_CAP_PCCARD; 1093 socket->socket.map_size = 0x1000; 1094 socket->socket.cb_dev = dev; 1095 1096 /* prepare struct yenta_socket */ 1097 socket->dev = dev; 1098 pci_set_drvdata(dev, socket); 1099 1100 /* 1101 * Do some basic sanity checking.. 1102 */ 1103 if (pci_enable_device(dev)) { 1104 ret = -EBUSY; 1105 goto free; 1106 } 1107 1108 ret = pci_request_regions(dev, "yenta_socket"); 1109 if (ret) 1110 goto disable; 1111 1112 if (!pci_resource_start(dev, 0)) { 1113 printk(KERN_ERR "No cardbus resource!\n"); 1114 ret = -ENODEV; 1115 goto release; 1116 } 1117 1118 /* 1119 * Ok, start setup.. Map the cardbus registers, 1120 * and request the IRQ. 1121 */ 1122 socket->base = ioremap(pci_resource_start(dev, 0), 0x1000); 1123 if (!socket->base) { 1124 ret = -ENOMEM; 1125 goto release; 1126 } 1127 1128 /* 1129 * report the subsystem vendor and device for help debugging 1130 * the irq stuff... 1131 */ 1132 printk(KERN_INFO "Yenta: CardBus bridge found at %s [%04x:%04x]\n", 1133 pci_name(dev), dev->subsystem_vendor, dev->subsystem_device); 1134 1135 yenta_config_init(socket); 1136 1137 /* Disable all events */ 1138 cb_writel(socket, CB_SOCKET_MASK, 0x0); 1139 1140 /* Set up the bridge regions.. */ 1141 yenta_allocate_resources(socket); 1142 1143 socket->cb_irq = dev->irq; 1144 1145 /* Do we have special options for the device? */ 1146 if (id->driver_data != CARDBUS_TYPE_DEFAULT && 1147 id->driver_data < ARRAY_SIZE(cardbus_type)) { 1148 socket->type = &cardbus_type[id->driver_data]; 1149 1150 ret = socket->type->override(socket); 1151 if (ret < 0) 1152 goto unmap; 1153 } 1154 1155 /* We must finish initialization here */ 1156 1157 if (!socket->cb_irq || request_irq(socket->cb_irq, yenta_interrupt, SA_SHIRQ, "yenta", socket)) { 1158 /* No IRQ or request_irq failed. Poll */ 1159 socket->cb_irq = 0; /* But zero is a valid IRQ number. */ 1160 init_timer(&socket->poll_timer); 1161 socket->poll_timer.function = yenta_interrupt_wrapper; 1162 socket->poll_timer.data = (unsigned long)socket; 1163 socket->poll_timer.expires = jiffies + HZ; 1164 add_timer(&socket->poll_timer); 1165 printk(KERN_INFO "Yenta: no PCI IRQ, CardBus support disabled for this socket.\n" 1166 KERN_INFO "Yenta: check your BIOS CardBus, BIOS IRQ or ACPI settings.\n"); 1167 } else { 1168 socket->socket.features |= SS_CAP_CARDBUS; 1169 } 1170 1171 /* Figure out what the dang thing can do for the PCMCIA layer... */ 1172 yenta_interrogate(socket); 1173 yenta_get_socket_capabilities(socket, isa_interrupts); 1174 printk(KERN_INFO "Socket status: %08x\n", cb_readl(socket, CB_SOCKET_STATE)); 1175 1176 /* Register it with the pcmcia layer.. */ 1177 ret = pcmcia_register_socket(&socket->socket); 1178 if (ret == 0) { 1179 /* Add the yenta register attributes */ 1180 device_create_file(&dev->dev, &dev_attr_yenta_registers); 1181 goto out; 1182 } 1183 1184 unmap: 1185 iounmap(socket->base); 1186 release: 1187 pci_release_regions(dev); 1188 disable: 1189 pci_disable_device(dev); 1190 free: 1191 kfree(socket); 1192 out: 1193 return ret; 1194 } 1195 1196 1197 static int yenta_dev_suspend (struct pci_dev *dev, pm_message_t state) 1198 { 1199 struct yenta_socket *socket = pci_get_drvdata(dev); 1200 int ret; 1201 1202 ret = pcmcia_socket_dev_suspend(&dev->dev, state); 1203 1204 if (socket) { 1205 if (socket->type && socket->type->save_state) 1206 socket->type->save_state(socket); 1207 1208 /* FIXME: pci_save_state needs to have a better interface */ 1209 pci_save_state(dev); 1210 pci_read_config_dword(dev, 16*4, &socket->saved_state[0]); 1211 pci_read_config_dword(dev, 17*4, &socket->saved_state[1]); 1212 pci_disable_device(dev); 1213 1214 /* 1215 * Some laptops (IBM T22) do not like us putting the Cardbus 1216 * bridge into D3. At a guess, some other laptop will 1217 * probably require this, so leave it commented out for now. 1218 */ 1219 /* pci_set_power_state(dev, 3); */ 1220 } 1221 1222 return ret; 1223 } 1224 1225 1226 static int yenta_dev_resume (struct pci_dev *dev) 1227 { 1228 struct yenta_socket *socket = pci_get_drvdata(dev); 1229 1230 if (socket) { 1231 pci_set_power_state(dev, 0); 1232 /* FIXME: pci_restore_state needs to have a better interface */ 1233 pci_restore_state(dev); 1234 pci_write_config_dword(dev, 16*4, socket->saved_state[0]); 1235 pci_write_config_dword(dev, 17*4, socket->saved_state[1]); 1236 pci_enable_device(dev); 1237 pci_set_master(dev); 1238 1239 if (socket->type && socket->type->restore_state) 1240 socket->type->restore_state(socket); 1241 } 1242 1243 return pcmcia_socket_dev_resume(&dev->dev); 1244 } 1245 1246 1247 #define CB_ID(vend,dev,type) \ 1248 { \ 1249 .vendor = vend, \ 1250 .device = dev, \ 1251 .subvendor = PCI_ANY_ID, \ 1252 .subdevice = PCI_ANY_ID, \ 1253 .class = PCI_CLASS_BRIDGE_CARDBUS << 8, \ 1254 .class_mask = ~0, \ 1255 .driver_data = CARDBUS_TYPE_##type, \ 1256 } 1257 1258 static struct pci_device_id yenta_table [] = { 1259 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1031, TI), 1260 1261 /* 1262 * TBD: Check if these TI variants can use more 1263 * advanced overrides instead. (I can't get the 1264 * data sheets for these devices. --rmk) 1265 */ 1266 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1210, TI), 1267 1268 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1130, TI113X), 1269 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1131, TI113X), 1270 1271 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1211, TI12XX), 1272 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1220, TI12XX), 1273 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1221, TI12XX), 1274 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1225, TI12XX), 1275 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251A, TI12XX), 1276 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251B, TI12XX), 1277 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1420, TI12XX), 1278 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1450, TI12XX), 1279 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1451A, TI12XX), 1280 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1510, TI12XX), 1281 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520, TI12XX), 1282 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1620, TI12XX), 1283 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4410, TI12XX), 1284 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4450, TI12XX), 1285 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4451, TI12XX), 1286 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4510, TI12XX), 1287 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4520, TI12XX), 1288 1289 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1250, TI1250), 1290 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1410, TI1250), 1291 1292 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XX21_XX11, TI12XX), 1293 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X515, TI12XX), 1294 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X420, TI12XX), 1295 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X620, TI12XX), 1296 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7410, TI12XX), 1297 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7510, TI12XX), 1298 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7610, TI12XX), 1299 1300 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_710, TI12XX), 1301 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_712, TI12XX), 1302 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_720, TI12XX), 1303 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_722, TI12XX), 1304 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1211, ENE), 1305 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1225, ENE), 1306 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1410, ENE), 1307 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1420, ENE), 1308 1309 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C465, RICOH), 1310 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C466, RICOH), 1311 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C475, RICOH), 1312 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476, RICOH), 1313 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C478, RICOH), 1314 1315 CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC95, TOPIC95), 1316 CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC97, TOPIC97), 1317 CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC100, TOPIC97), 1318 1319 CB_ID(PCI_VENDOR_ID_O2, PCI_ANY_ID, O2MICRO), 1320 1321 /* match any cardbus bridge */ 1322 CB_ID(PCI_ANY_ID, PCI_ANY_ID, DEFAULT), 1323 { /* all zeroes */ } 1324 }; 1325 MODULE_DEVICE_TABLE(pci, yenta_table); 1326 1327 1328 static struct pci_driver yenta_cardbus_driver = { 1329 .name = "yenta_cardbus", 1330 .id_table = yenta_table, 1331 .probe = yenta_probe, 1332 .remove = __devexit_p(yenta_close), 1333 .suspend = yenta_dev_suspend, 1334 .resume = yenta_dev_resume, 1335 }; 1336 1337 1338 static int __init yenta_socket_init(void) 1339 { 1340 return pci_register_driver (¥ta_cardbus_driver); 1341 } 1342 1343 1344 static void __exit yenta_socket_exit (void) 1345 { 1346 pci_unregister_driver (¥ta_cardbus_driver); 1347 } 1348 1349 1350 module_init(yenta_socket_init); 1351 module_exit(yenta_socket_exit); 1352 1353 MODULE_LICENSE("GPL"); 1354