xref: /linux/drivers/pcmcia/yenta_socket.c (revision 20d0021394c1b070bf04b22c5bc8fdb437edd4c5)
1 /*
2  * Regular cardbus driver ("yenta_socket")
3  *
4  * (C) Copyright 1999, 2000 Linus Torvalds
5  *
6  * Changelog:
7  * Aug 2002: Manfred Spraul <manfred@colorfullife.com>
8  * 	Dynamically adjust the size of the bridge resource
9  *
10  * May 2003: Dominik Brodowski <linux@brodo.de>
11  * 	Merge pci_socket.c and yenta.c into one file
12  */
13 #include <linux/init.h>
14 #include <linux/pci.h>
15 #include <linux/sched.h>
16 #include <linux/workqueue.h>
17 #include <linux/interrupt.h>
18 #include <linux/delay.h>
19 #include <linux/module.h>
20 
21 #include <pcmcia/cs_types.h>
22 #include <pcmcia/ss.h>
23 #include <pcmcia/cs.h>
24 
25 #include <asm/io.h>
26 
27 #include "yenta_socket.h"
28 #include "i82365.h"
29 
30 static int disable_clkrun;
31 module_param(disable_clkrun, bool, 0444);
32 MODULE_PARM_DESC(disable_clkrun, "If PC card doesn't function properly, please try this option");
33 
34 static int isa_probe = 1;
35 module_param(isa_probe, bool, 0444);
36 MODULE_PARM_DESC(isa_probe, "If set ISA interrupts are probed (default). Set to N to disable probing");
37 
38 static int pwr_irqs_off;
39 module_param(pwr_irqs_off, bool, 0644);
40 MODULE_PARM_DESC(pwr_irqs_off, "Force IRQs off during power-on of slot. Use only when seeing IRQ storms!");
41 
42 #if 0
43 #define debug(x,args...) printk(KERN_DEBUG "%s: " x, __func__ , ##args)
44 #else
45 #define debug(x,args...)
46 #endif
47 
48 /* Don't ask.. */
49 #define to_cycles(ns)	((ns)/120)
50 #define to_ns(cycles)	((cycles)*120)
51 
52 static int yenta_probe_cb_irq(struct yenta_socket *socket);
53 
54 
55 static unsigned int override_bios;
56 module_param(override_bios, uint, 0000);
57 MODULE_PARM_DESC (override_bios, "yenta ignore bios resource allocation");
58 
59 /*
60  * Generate easy-to-use ways of reading a cardbus sockets
61  * regular memory space ("cb_xxx"), configuration space
62  * ("config_xxx") and compatibility space ("exca_xxxx")
63  */
64 static inline u32 cb_readl(struct yenta_socket *socket, unsigned reg)
65 {
66 	u32 val = readl(socket->base + reg);
67 	debug("%p %04x %08x\n", socket, reg, val);
68 	return val;
69 }
70 
71 static inline void cb_writel(struct yenta_socket *socket, unsigned reg, u32 val)
72 {
73 	debug("%p %04x %08x\n", socket, reg, val);
74 	writel(val, socket->base + reg);
75 }
76 
77 static inline u8 config_readb(struct yenta_socket *socket, unsigned offset)
78 {
79 	u8 val;
80 	pci_read_config_byte(socket->dev, offset, &val);
81 	debug("%p %04x %02x\n", socket, offset, val);
82 	return val;
83 }
84 
85 static inline u16 config_readw(struct yenta_socket *socket, unsigned offset)
86 {
87 	u16 val;
88 	pci_read_config_word(socket->dev, offset, &val);
89 	debug("%p %04x %04x\n", socket, offset, val);
90 	return val;
91 }
92 
93 static inline u32 config_readl(struct yenta_socket *socket, unsigned offset)
94 {
95 	u32 val;
96 	pci_read_config_dword(socket->dev, offset, &val);
97 	debug("%p %04x %08x\n", socket, offset, val);
98 	return val;
99 }
100 
101 static inline void config_writeb(struct yenta_socket *socket, unsigned offset, u8 val)
102 {
103 	debug("%p %04x %02x\n", socket, offset, val);
104 	pci_write_config_byte(socket->dev, offset, val);
105 }
106 
107 static inline void config_writew(struct yenta_socket *socket, unsigned offset, u16 val)
108 {
109 	debug("%p %04x %04x\n", socket, offset, val);
110 	pci_write_config_word(socket->dev, offset, val);
111 }
112 
113 static inline void config_writel(struct yenta_socket *socket, unsigned offset, u32 val)
114 {
115 	debug("%p %04x %08x\n", socket, offset, val);
116 	pci_write_config_dword(socket->dev, offset, val);
117 }
118 
119 static inline u8 exca_readb(struct yenta_socket *socket, unsigned reg)
120 {
121 	u8 val = readb(socket->base + 0x800 + reg);
122 	debug("%p %04x %02x\n", socket, reg, val);
123 	return val;
124 }
125 
126 static inline u8 exca_readw(struct yenta_socket *socket, unsigned reg)
127 {
128 	u16 val;
129 	val = readb(socket->base + 0x800 + reg);
130 	val |= readb(socket->base + 0x800 + reg + 1) << 8;
131 	debug("%p %04x %04x\n", socket, reg, val);
132 	return val;
133 }
134 
135 static inline void exca_writeb(struct yenta_socket *socket, unsigned reg, u8 val)
136 {
137 	debug("%p %04x %02x\n", socket, reg, val);
138 	writeb(val, socket->base + 0x800 + reg);
139 }
140 
141 static void exca_writew(struct yenta_socket *socket, unsigned reg, u16 val)
142 {
143 	debug("%p %04x %04x\n", socket, reg, val);
144 	writeb(val, socket->base + 0x800 + reg);
145 	writeb(val >> 8, socket->base + 0x800 + reg + 1);
146 }
147 
148 /*
149  * Ugh, mixed-mode cardbus and 16-bit pccard state: things depend
150  * on what kind of card is inserted..
151  */
152 static int yenta_get_status(struct pcmcia_socket *sock, unsigned int *value)
153 {
154 	struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
155 	unsigned int val;
156 	u32 state = cb_readl(socket, CB_SOCKET_STATE);
157 
158 	val  = (state & CB_3VCARD) ? SS_3VCARD : 0;
159 	val |= (state & CB_XVCARD) ? SS_XVCARD : 0;
160 	val |= (state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) ? 0 : SS_PENDING;
161 	val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? SS_PENDING : 0;
162 
163 
164 	if (state & CB_CBCARD) {
165 		val |= SS_CARDBUS;
166 		val |= (state & CB_CARDSTS) ? SS_STSCHG : 0;
167 		val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? 0 : SS_DETECT;
168 		val |= (state & CB_PWRCYCLE) ? SS_POWERON | SS_READY : 0;
169 	} else if (state & CB_16BITCARD) {
170 		u8 status = exca_readb(socket, I365_STATUS);
171 		val |= ((status & I365_CS_DETECT) == I365_CS_DETECT) ? SS_DETECT : 0;
172 		if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) {
173 			val |= (status & I365_CS_STSCHG) ? 0 : SS_STSCHG;
174 		} else {
175 			val |= (status & I365_CS_BVD1) ? 0 : SS_BATDEAD;
176 			val |= (status & I365_CS_BVD2) ? 0 : SS_BATWARN;
177 		}
178 		val |= (status & I365_CS_WRPROT) ? SS_WRPROT : 0;
179 		val |= (status & I365_CS_READY) ? SS_READY : 0;
180 		val |= (status & I365_CS_POWERON) ? SS_POWERON : 0;
181 	}
182 
183 	*value = val;
184 	return 0;
185 }
186 
187 static int yenta_Vcc_power(u32 control)
188 {
189 	switch (control & CB_SC_VCC_MASK) {
190 	case CB_SC_VCC_5V: return 50;
191 	case CB_SC_VCC_3V: return 33;
192 	default: return 0;
193 	}
194 }
195 
196 static int yenta_Vpp_power(u32 control)
197 {
198 	switch (control & CB_SC_VPP_MASK) {
199 	case CB_SC_VPP_12V: return 120;
200 	case CB_SC_VPP_5V: return 50;
201 	case CB_SC_VPP_3V: return 33;
202 	default: return 0;
203 	}
204 }
205 
206 static int yenta_get_socket(struct pcmcia_socket *sock, socket_state_t *state)
207 {
208 	struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
209 	u8 reg;
210 	u32 control;
211 
212 	control = cb_readl(socket, CB_SOCKET_CONTROL);
213 
214 	state->Vcc = yenta_Vcc_power(control);
215 	state->Vpp = yenta_Vpp_power(control);
216 	state->io_irq = socket->io_irq;
217 
218 	if (cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) {
219 		u16 bridge = config_readw(socket, CB_BRIDGE_CONTROL);
220 		if (bridge & CB_BRIDGE_CRST)
221 			state->flags |= SS_RESET;
222 		return 0;
223 	}
224 
225 	/* 16-bit card state.. */
226 	reg = exca_readb(socket, I365_POWER);
227 	state->flags = (reg & I365_PWR_AUTO) ? SS_PWR_AUTO : 0;
228 	state->flags |= (reg & I365_PWR_OUT) ? SS_OUTPUT_ENA : 0;
229 
230 	reg = exca_readb(socket, I365_INTCTL);
231 	state->flags |= (reg & I365_PC_RESET) ? 0 : SS_RESET;
232 	state->flags |= (reg & I365_PC_IOCARD) ? SS_IOCARD : 0;
233 
234 	reg = exca_readb(socket, I365_CSCINT);
235 	state->csc_mask = (reg & I365_CSC_DETECT) ? SS_DETECT : 0;
236 	if (state->flags & SS_IOCARD) {
237 		state->csc_mask |= (reg & I365_CSC_STSCHG) ? SS_STSCHG : 0;
238 	} else {
239 		state->csc_mask |= (reg & I365_CSC_BVD1) ? SS_BATDEAD : 0;
240 		state->csc_mask |= (reg & I365_CSC_BVD2) ? SS_BATWARN : 0;
241 		state->csc_mask |= (reg & I365_CSC_READY) ? SS_READY : 0;
242 	}
243 
244 	return 0;
245 }
246 
247 static void yenta_set_power(struct yenta_socket *socket, socket_state_t *state)
248 {
249 	u32 reg = 0;	/* CB_SC_STPCLK? */
250 	switch (state->Vcc) {
251 	case 33: reg = CB_SC_VCC_3V; break;
252 	case 50: reg = CB_SC_VCC_5V; break;
253 	default: reg = 0; break;
254 	}
255 	switch (state->Vpp) {
256 	case 33:  reg |= CB_SC_VPP_3V; break;
257 	case 50:  reg |= CB_SC_VPP_5V; break;
258 	case 120: reg |= CB_SC_VPP_12V; break;
259 	}
260 	if (reg != cb_readl(socket, CB_SOCKET_CONTROL))
261 		cb_writel(socket, CB_SOCKET_CONTROL, reg);
262 }
263 
264 static int yenta_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
265 {
266 	struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
267 	u16 bridge;
268 
269 	yenta_set_power(socket, state);
270 	socket->io_irq = state->io_irq;
271 	bridge = config_readw(socket, CB_BRIDGE_CONTROL) & ~(CB_BRIDGE_CRST | CB_BRIDGE_INTR);
272 	if (cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) {
273 		u8 intr;
274 		bridge |= (state->flags & SS_RESET) ? CB_BRIDGE_CRST : 0;
275 
276 		/* ISA interrupt control? */
277 		intr = exca_readb(socket, I365_INTCTL);
278 		intr = (intr & ~0xf);
279 		if (!socket->cb_irq) {
280 			intr |= state->io_irq;
281 			bridge |= CB_BRIDGE_INTR;
282 		}
283 		exca_writeb(socket, I365_INTCTL, intr);
284 	}  else {
285 		u8 reg;
286 
287 		reg = exca_readb(socket, I365_INTCTL) & (I365_RING_ENA | I365_INTR_ENA);
288 		reg |= (state->flags & SS_RESET) ? 0 : I365_PC_RESET;
289 		reg |= (state->flags & SS_IOCARD) ? I365_PC_IOCARD : 0;
290 		if (state->io_irq != socket->cb_irq) {
291 			reg |= state->io_irq;
292 			bridge |= CB_BRIDGE_INTR;
293 		}
294 		exca_writeb(socket, I365_INTCTL, reg);
295 
296 		reg = exca_readb(socket, I365_POWER) & (I365_VCC_MASK|I365_VPP1_MASK);
297 		reg |= I365_PWR_NORESET;
298 		if (state->flags & SS_PWR_AUTO) reg |= I365_PWR_AUTO;
299 		if (state->flags & SS_OUTPUT_ENA) reg |= I365_PWR_OUT;
300 		if (exca_readb(socket, I365_POWER) != reg)
301 			exca_writeb(socket, I365_POWER, reg);
302 
303 		/* CSC interrupt: no ISA irq for CSC */
304 		reg = I365_CSC_DETECT;
305 		if (state->flags & SS_IOCARD) {
306 			if (state->csc_mask & SS_STSCHG) reg |= I365_CSC_STSCHG;
307 		} else {
308 			if (state->csc_mask & SS_BATDEAD) reg |= I365_CSC_BVD1;
309 			if (state->csc_mask & SS_BATWARN) reg |= I365_CSC_BVD2;
310 			if (state->csc_mask & SS_READY) reg |= I365_CSC_READY;
311 		}
312 		exca_writeb(socket, I365_CSCINT, reg);
313 		exca_readb(socket, I365_CSC);
314 		if(sock->zoom_video)
315 			sock->zoom_video(sock, state->flags & SS_ZVCARD);
316 	}
317 	config_writew(socket, CB_BRIDGE_CONTROL, bridge);
318 	/* Socket event mask: get card insert/remove events.. */
319 	cb_writel(socket, CB_SOCKET_EVENT, -1);
320 	cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK);
321 	return 0;
322 }
323 
324 static int yenta_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io)
325 {
326 	struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
327 	int map;
328 	unsigned char ioctl, addr, enable;
329 
330 	map = io->map;
331 
332 	if (map > 1)
333 		return -EINVAL;
334 
335 	enable = I365_ENA_IO(map);
336 	addr = exca_readb(socket, I365_ADDRWIN);
337 
338 	/* Disable the window before changing it.. */
339 	if (addr & enable) {
340 		addr &= ~enable;
341 		exca_writeb(socket, I365_ADDRWIN, addr);
342 	}
343 
344 	exca_writew(socket, I365_IO(map)+I365_W_START, io->start);
345 	exca_writew(socket, I365_IO(map)+I365_W_STOP, io->stop);
346 
347 	ioctl = exca_readb(socket, I365_IOCTL) & ~I365_IOCTL_MASK(map);
348 	if (io->flags & MAP_0WS) ioctl |= I365_IOCTL_0WS(map);
349 	if (io->flags & MAP_16BIT) ioctl |= I365_IOCTL_16BIT(map);
350 	if (io->flags & MAP_AUTOSZ) ioctl |= I365_IOCTL_IOCS16(map);
351 	exca_writeb(socket, I365_IOCTL, ioctl);
352 
353 	if (io->flags & MAP_ACTIVE)
354 		exca_writeb(socket, I365_ADDRWIN, addr | enable);
355 	return 0;
356 }
357 
358 static int yenta_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *mem)
359 {
360 	struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
361 	struct pci_bus_region region;
362 	int map;
363 	unsigned char addr, enable;
364 	unsigned int start, stop, card_start;
365 	unsigned short word;
366 
367 	pcibios_resource_to_bus(socket->dev, &region, mem->res);
368 
369 	map = mem->map;
370 	start = region.start;
371 	stop = region.end;
372 	card_start = mem->card_start;
373 
374 	if (map > 4 || start > stop || ((start ^ stop) >> 24) ||
375 	    (card_start >> 26) || mem->speed > 1000)
376 		return -EINVAL;
377 
378 	enable = I365_ENA_MEM(map);
379 	addr = exca_readb(socket, I365_ADDRWIN);
380 	if (addr & enable) {
381 		addr &= ~enable;
382 		exca_writeb(socket, I365_ADDRWIN, addr);
383 	}
384 
385 	exca_writeb(socket, CB_MEM_PAGE(map), start >> 24);
386 
387 	word = (start >> 12) & 0x0fff;
388 	if (mem->flags & MAP_16BIT)
389 		word |= I365_MEM_16BIT;
390 	if (mem->flags & MAP_0WS)
391 		word |= I365_MEM_0WS;
392 	exca_writew(socket, I365_MEM(map) + I365_W_START, word);
393 
394 	word = (stop >> 12) & 0x0fff;
395 	switch (to_cycles(mem->speed)) {
396 		case 0: break;
397 		case 1:  word |= I365_MEM_WS0; break;
398 		case 2:  word |= I365_MEM_WS1; break;
399 		default: word |= I365_MEM_WS1 | I365_MEM_WS0; break;
400 	}
401 	exca_writew(socket, I365_MEM(map) + I365_W_STOP, word);
402 
403 	word = ((card_start - start) >> 12) & 0x3fff;
404 	if (mem->flags & MAP_WRPROT)
405 		word |= I365_MEM_WRPROT;
406 	if (mem->flags & MAP_ATTRIB)
407 		word |= I365_MEM_REG;
408 	exca_writew(socket, I365_MEM(map) + I365_W_OFF, word);
409 
410 	if (mem->flags & MAP_ACTIVE)
411 		exca_writeb(socket, I365_ADDRWIN, addr | enable);
412 	return 0;
413 }
414 
415 
416 
417 static irqreturn_t yenta_interrupt(int irq, void *dev_id, struct pt_regs *regs)
418 {
419 	unsigned int events;
420 	struct yenta_socket *socket = (struct yenta_socket *) dev_id;
421 	u8 csc;
422 	u32 cb_event;
423 
424 	/* Clear interrupt status for the event */
425 	cb_event = cb_readl(socket, CB_SOCKET_EVENT);
426 	cb_writel(socket, CB_SOCKET_EVENT, cb_event);
427 
428 	csc = exca_readb(socket, I365_CSC);
429 
430 	events = (cb_event & (CB_CD1EVENT | CB_CD2EVENT)) ? SS_DETECT : 0 ;
431 	events |= (csc & I365_CSC_DETECT) ? SS_DETECT : 0;
432 	if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) {
433 		events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0;
434 	} else {
435 		events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0;
436 		events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0;
437 		events |= (csc & I365_CSC_READY) ? SS_READY : 0;
438 	}
439 
440 	if (events)
441 		pcmcia_parse_events(&socket->socket, events);
442 
443 	if (cb_event || csc)
444 		return IRQ_HANDLED;
445 
446 	return IRQ_NONE;
447 }
448 
449 static void yenta_interrupt_wrapper(unsigned long data)
450 {
451 	struct yenta_socket *socket = (struct yenta_socket *) data;
452 
453 	yenta_interrupt(0, (void *)socket, NULL);
454 	socket->poll_timer.expires = jiffies + HZ;
455 	add_timer(&socket->poll_timer);
456 }
457 
458 static void yenta_clear_maps(struct yenta_socket *socket)
459 {
460 	int i;
461 	struct resource res = { .start = 0, .end = 0x0fff };
462 	pccard_io_map io = { 0, 0, 0, 0, 1 };
463 	pccard_mem_map mem = { .res = &res, };
464 
465 	yenta_set_socket(&socket->socket, &dead_socket);
466 	for (i = 0; i < 2; i++) {
467 		io.map = i;
468 		yenta_set_io_map(&socket->socket, &io);
469 	}
470 	for (i = 0; i < 5; i++) {
471 		mem.map = i;
472 		yenta_set_mem_map(&socket->socket, &mem);
473 	}
474 }
475 
476 /* redoes voltage interrogation if required */
477 static void yenta_interrogate(struct yenta_socket *socket)
478 {
479 	u32 state;
480 
481 	state = cb_readl(socket, CB_SOCKET_STATE);
482 	if (!(state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) ||
483 	    (state & (CB_CDETECT1 | CB_CDETECT2 | CB_NOTACARD | CB_BADVCCREQ)) ||
484 	    ((state & (CB_16BITCARD | CB_CBCARD)) == (CB_16BITCARD | CB_CBCARD)))
485 		cb_writel(socket, CB_SOCKET_FORCE, CB_CVSTEST);
486 }
487 
488 /* Called at resume and initialization events */
489 static int yenta_sock_init(struct pcmcia_socket *sock)
490 {
491 	struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
492 	u16 bridge;
493 
494 	bridge = config_readw(socket, CB_BRIDGE_CONTROL) & ~CB_BRIDGE_INTR;
495 	if (!socket->cb_irq)
496 		bridge |= CB_BRIDGE_INTR;
497 	config_writew(socket, CB_BRIDGE_CONTROL, bridge);
498 
499 	exca_writeb(socket, I365_GBLCTL, 0x00);
500 	exca_writeb(socket, I365_GENCTL, 0x00);
501 
502 	/* Redo card voltage interrogation */
503 	yenta_interrogate(socket);
504 
505 	yenta_clear_maps(socket);
506 
507 	if (socket->type && socket->type->sock_init)
508 		socket->type->sock_init(socket);
509 
510 	/* Re-enable CSC interrupts */
511 	cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK);
512 
513 	return 0;
514 }
515 
516 static int yenta_sock_suspend(struct pcmcia_socket *sock)
517 {
518 	struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
519 
520 	/* Disable CSC interrupts */
521 	cb_writel(socket, CB_SOCKET_MASK, 0x0);
522 
523 	return 0;
524 }
525 
526 /*
527  * Use an adaptive allocation for the memory resource,
528  * sometimes the memory behind pci bridges is limited:
529  * 1/8 of the size of the io window of the parent.
530  * max 4 MB, min 16 kB. We try very hard to not get below
531  * the "ACC" values, though.
532  */
533 #define BRIDGE_MEM_MAX 4*1024*1024
534 #define BRIDGE_MEM_ACC 128*1024
535 #define BRIDGE_MEM_MIN 16*1024
536 
537 #define BRIDGE_IO_MAX 512
538 #define BRIDGE_IO_ACC 256
539 #define BRIDGE_IO_MIN 32
540 
541 #ifndef PCIBIOS_MIN_CARDBUS_IO
542 #define PCIBIOS_MIN_CARDBUS_IO PCIBIOS_MIN_IO
543 #endif
544 
545 static int yenta_search_one_res(struct resource *root, struct resource *res,
546 				u32 min)
547 {
548 	u32 align, size, start, end;
549 
550 	if (res->flags & IORESOURCE_IO) {
551 		align = 1024;
552 		size = BRIDGE_IO_MAX;
553 		start = PCIBIOS_MIN_CARDBUS_IO;
554 		end = ~0U;
555 	} else {
556 		unsigned long avail = root->end - root->start;
557 		int i;
558 		size = BRIDGE_MEM_MAX;
559 		if (size > avail/8) {
560 			size=(avail+1)/8;
561 			/* round size down to next power of 2 */
562 			i = 0;
563 			while ((size /= 2) != 0)
564 				i++;
565 			size = 1 << i;
566 		}
567 		if (size < min)
568 			size = min;
569 		align = size;
570 		start = PCIBIOS_MIN_MEM;
571 		end = ~0U;
572 	}
573 
574 	do {
575 		if (allocate_resource(root, res, size, start, end, align,
576 				      NULL, NULL)==0) {
577 			return 1;
578 		}
579 		size = size/2;
580 		align = size;
581 	} while (size >= min);
582 
583 	return 0;
584 }
585 
586 
587 static int yenta_search_res(struct yenta_socket *socket, struct resource *res,
588 			    u32 min)
589 {
590 	int i;
591 	for (i=0; i<PCI_BUS_NUM_RESOURCES; i++) {
592 		struct resource * root = socket->dev->bus->resource[i];
593 		if (!root)
594 			continue;
595 
596 		if ((res->flags ^ root->flags) &
597 		    (IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH))
598 			continue; /* Wrong type */
599 
600 		if (yenta_search_one_res(root, res, min))
601 			return 1;
602 	}
603 	return 0;
604 }
605 
606 static void yenta_allocate_res(struct yenta_socket *socket, int nr, unsigned type, int addr_start, int addr_end)
607 {
608 	struct pci_bus *bus;
609 	struct resource *root, *res;
610 	u32 start, end;
611 	unsigned mask;
612 
613 	res = socket->dev->resource + PCI_BRIDGE_RESOURCES + nr;
614 	/* Already allocated? */
615 	if (res->parent)
616 		return;
617 
618 	/* The granularity of the memory limit is 4kB, on IO it's 4 bytes */
619 	mask = ~0xfff;
620 	if (type & IORESOURCE_IO)
621 		mask = ~3;
622 
623 	bus = socket->dev->subordinate;
624 	res->name = bus->name;
625 	res->flags = type;
626 
627 	start = config_readl(socket, addr_start) & mask;
628 	end = config_readl(socket, addr_end) | ~mask;
629 	if (start && end > start && !override_bios) {
630 		res->start = start;
631 		res->end = end;
632 		root = pci_find_parent_resource(socket->dev, res);
633 		if (root && (request_resource(root, res) == 0))
634 			return;
635 		printk(KERN_INFO "yenta %s: Preassigned resource %d busy or not available, reconfiguring...\n",
636 				pci_name(socket->dev), nr);
637 	}
638 
639 	if (type & IORESOURCE_IO) {
640 		if ((yenta_search_res(socket, res, BRIDGE_IO_MAX)) ||
641 		    (yenta_search_res(socket, res, BRIDGE_IO_ACC)) ||
642 		    (yenta_search_res(socket, res, BRIDGE_IO_MIN))) {
643 			config_writel(socket, addr_start, res->start);
644 			config_writel(socket, addr_end, res->end);
645 		}
646 	} else {
647 		if (type & IORESOURCE_PREFETCH) {
648 			if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) ||
649 			    (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) ||
650 			    (yenta_search_res(socket, res, BRIDGE_MEM_MIN))) {
651 				config_writel(socket, addr_start, res->start);
652 				config_writel(socket, addr_end, res->end);
653 			}
654 			/* Approximating prefetchable by non-prefetchable */
655 			res->flags = IORESOURCE_MEM;
656 		}
657 		if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) ||
658 		    (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) ||
659 		    (yenta_search_res(socket, res, BRIDGE_MEM_MIN))) {
660 			config_writel(socket, addr_start, res->start);
661 			config_writel(socket, addr_end, res->end);
662 		}
663 	}
664 
665 	printk(KERN_INFO "yenta %s: no resource of type %x available, trying to continue...\n",
666 	       pci_name(socket->dev), type);
667 	res->start = res->end = res->flags = 0;
668 }
669 
670 /*
671  * Allocate the bridge mappings for the device..
672  */
673 static void yenta_allocate_resources(struct yenta_socket *socket)
674 {
675 	yenta_allocate_res(socket, 0, IORESOURCE_IO,
676 			   PCI_CB_IO_BASE_0, PCI_CB_IO_LIMIT_0);
677 	yenta_allocate_res(socket, 1, IORESOURCE_IO,
678 			   PCI_CB_IO_BASE_1, PCI_CB_IO_LIMIT_1);
679 	yenta_allocate_res(socket, 2, IORESOURCE_MEM|IORESOURCE_PREFETCH,
680 			   PCI_CB_MEMORY_BASE_0, PCI_CB_MEMORY_LIMIT_0);
681 	yenta_allocate_res(socket, 3, IORESOURCE_MEM,
682 			   PCI_CB_MEMORY_BASE_1, PCI_CB_MEMORY_LIMIT_1);
683 }
684 
685 
686 /*
687  * Free the bridge mappings for the device..
688  */
689 static void yenta_free_resources(struct yenta_socket *socket)
690 {
691 	int i;
692 	for (i=0;i<4;i++) {
693 		struct resource *res;
694 		res = socket->dev->resource + PCI_BRIDGE_RESOURCES + i;
695 		if (res->start != 0 && res->end != 0)
696 			release_resource(res);
697 		res->start = res->end = 0;
698 	}
699 }
700 
701 
702 /*
703  * Close it down - release our resources and go home..
704  */
705 static void yenta_close(struct pci_dev *dev)
706 {
707 	struct yenta_socket *sock = pci_get_drvdata(dev);
708 
709 	/* we don't want a dying socket registered */
710 	pcmcia_unregister_socket(&sock->socket);
711 
712 	/* Disable all events so we don't die in an IRQ storm */
713 	cb_writel(sock, CB_SOCKET_MASK, 0x0);
714 	exca_writeb(sock, I365_CSCINT, 0);
715 
716 	if (sock->cb_irq)
717 		free_irq(sock->cb_irq, sock);
718 	else
719 		del_timer_sync(&sock->poll_timer);
720 
721 	if (sock->base)
722 		iounmap(sock->base);
723 	yenta_free_resources(sock);
724 
725 	pci_release_regions(dev);
726 	pci_disable_device(dev);
727 	pci_set_drvdata(dev, NULL);
728 }
729 
730 
731 static struct pccard_operations yenta_socket_operations = {
732 	.init			= yenta_sock_init,
733 	.suspend		= yenta_sock_suspend,
734 	.get_status		= yenta_get_status,
735 	.get_socket		= yenta_get_socket,
736 	.set_socket		= yenta_set_socket,
737 	.set_io_map		= yenta_set_io_map,
738 	.set_mem_map		= yenta_set_mem_map,
739 };
740 
741 
742 #include "ti113x.h"
743 #include "ricoh.h"
744 #include "topic.h"
745 #include "o2micro.h"
746 
747 enum {
748 	CARDBUS_TYPE_DEFAULT = -1,
749 	CARDBUS_TYPE_TI,
750 	CARDBUS_TYPE_TI113X,
751 	CARDBUS_TYPE_TI12XX,
752 	CARDBUS_TYPE_TI1250,
753 	CARDBUS_TYPE_RICOH,
754 	CARDBUS_TYPE_TOPIC97,
755 	CARDBUS_TYPE_O2MICRO,
756 };
757 
758 /*
759  * Different cardbus controllers have slightly different
760  * initialization sequences etc details. List them here..
761  */
762 static struct cardbus_type cardbus_type[] = {
763 	[CARDBUS_TYPE_TI]	= {
764 		.override	= ti_override,
765 		.save_state	= ti_save_state,
766 		.restore_state	= ti_restore_state,
767 		.sock_init	= ti_init,
768 	},
769 	[CARDBUS_TYPE_TI113X]	= {
770 		.override	= ti113x_override,
771 		.save_state	= ti_save_state,
772 		.restore_state	= ti_restore_state,
773 		.sock_init	= ti_init,
774 	},
775 	[CARDBUS_TYPE_TI12XX]	= {
776 		.override	= ti12xx_override,
777 		.save_state	= ti_save_state,
778 		.restore_state	= ti_restore_state,
779 		.sock_init	= ti_init,
780 	},
781 	[CARDBUS_TYPE_TI1250]	= {
782 		.override	= ti1250_override,
783 		.save_state	= ti_save_state,
784 		.restore_state	= ti_restore_state,
785 		.sock_init	= ti_init,
786 	},
787 	[CARDBUS_TYPE_RICOH]	= {
788 		.override	= ricoh_override,
789 		.save_state	= ricoh_save_state,
790 		.restore_state	= ricoh_restore_state,
791 	},
792 	[CARDBUS_TYPE_TOPIC97]	= {
793 		.override	= topic97_override,
794 	},
795 	[CARDBUS_TYPE_O2MICRO]	= {
796 		.override	= o2micro_override,
797 		.restore_state	= o2micro_restore_state,
798 	},
799 };
800 
801 
802 /*
803  * Only probe "regular" interrupts, don't
804  * touch dangerous spots like the mouse irq,
805  * because there are mice that apparently
806  * get really confused if they get fondled
807  * too intimately.
808  *
809  * Default to 11, 10, 9, 7, 6, 5, 4, 3.
810  */
811 static u32 isa_interrupts = 0x0ef8;
812 
813 static unsigned int yenta_probe_irq(struct yenta_socket *socket, u32 isa_irq_mask)
814 {
815 	int i;
816 	unsigned long val;
817 	u16 bridge_ctrl;
818 	u32 mask;
819 
820 	/* Set up ISA irq routing to probe the ISA irqs.. */
821 	bridge_ctrl = config_readw(socket, CB_BRIDGE_CONTROL);
822 	if (!(bridge_ctrl & CB_BRIDGE_INTR)) {
823 		bridge_ctrl |= CB_BRIDGE_INTR;
824 		config_writew(socket, CB_BRIDGE_CONTROL, bridge_ctrl);
825 	}
826 
827 	/*
828 	 * Probe for usable interrupts using the force
829 	 * register to generate bogus card status events.
830 	 */
831 	cb_writel(socket, CB_SOCKET_EVENT, -1);
832 	cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
833 	exca_writeb(socket, I365_CSCINT, 0);
834 	val = probe_irq_on() & isa_irq_mask;
835 	for (i = 1; i < 16; i++) {
836 		if (!((val >> i) & 1))
837 			continue;
838 		exca_writeb(socket, I365_CSCINT, I365_CSC_STSCHG | (i << 4));
839 		cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS);
840 		udelay(100);
841 		cb_writel(socket, CB_SOCKET_EVENT, -1);
842 	}
843 	cb_writel(socket, CB_SOCKET_MASK, 0);
844 	exca_writeb(socket, I365_CSCINT, 0);
845 
846 	mask = probe_irq_mask(val) & 0xffff;
847 
848 	bridge_ctrl &= ~CB_BRIDGE_INTR;
849 	config_writew(socket, CB_BRIDGE_CONTROL, bridge_ctrl);
850 
851 	return mask;
852 }
853 
854 
855 /* interrupt handler, only used during probing */
856 static irqreturn_t yenta_probe_handler(int irq, void *dev_id, struct pt_regs *regs)
857 {
858 	struct yenta_socket *socket = (struct yenta_socket *) dev_id;
859 	u8 csc;
860         u32 cb_event;
861 
862 	/* Clear interrupt status for the event */
863 	cb_event = cb_readl(socket, CB_SOCKET_EVENT);
864 	cb_writel(socket, CB_SOCKET_EVENT, -1);
865 	csc = exca_readb(socket, I365_CSC);
866 
867 	if (cb_event || csc) {
868 		socket->probe_status = 1;
869 		return IRQ_HANDLED;
870 	}
871 
872 	return IRQ_NONE;
873 }
874 
875 /* probes the PCI interrupt, use only on override functions */
876 static int yenta_probe_cb_irq(struct yenta_socket *socket)
877 {
878 	u16 bridge_ctrl;
879 
880 	if (!socket->cb_irq)
881 		return -1;
882 
883 	socket->probe_status = 0;
884 
885 	/* disable ISA interrupts */
886 	bridge_ctrl = config_readw(socket, CB_BRIDGE_CONTROL);
887 	bridge_ctrl &= ~CB_BRIDGE_INTR;
888 	config_writew(socket, CB_BRIDGE_CONTROL, bridge_ctrl);
889 
890 	if (request_irq(socket->cb_irq, yenta_probe_handler, SA_SHIRQ, "yenta", socket)) {
891 		printk(KERN_WARNING "Yenta: request_irq() in yenta_probe_cb_irq() failed!\n");
892 		return -1;
893 	}
894 
895 	/* generate interrupt, wait */
896 	exca_writeb(socket, I365_CSCINT, I365_CSC_STSCHG);
897 	cb_writel(socket, CB_SOCKET_EVENT, -1);
898 	cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
899 	cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS);
900 
901 	msleep(100);
902 
903 	/* disable interrupts */
904 	cb_writel(socket, CB_SOCKET_MASK, 0);
905 	exca_writeb(socket, I365_CSCINT, 0);
906 	cb_writel(socket, CB_SOCKET_EVENT, -1);
907 	exca_readb(socket, I365_CSC);
908 
909 	free_irq(socket->cb_irq, socket);
910 
911 	return (int) socket->probe_status;
912 }
913 
914 
915 
916 /*
917  * Set static data that doesn't need re-initializing..
918  */
919 static void yenta_get_socket_capabilities(struct yenta_socket *socket, u32 isa_irq_mask)
920 {
921 	socket->socket.pci_irq = socket->cb_irq;
922 	if (isa_probe)
923 		socket->socket.irq_mask = yenta_probe_irq(socket, isa_irq_mask);
924 	else
925 		socket->socket.irq_mask = 0;
926 
927 	printk(KERN_INFO "Yenta: ISA IRQ mask 0x%04x, PCI irq %d\n",
928 	       socket->socket.irq_mask, socket->cb_irq);
929 }
930 
931 /*
932  * Initialize the standard cardbus registers
933  */
934 static void yenta_config_init(struct yenta_socket *socket)
935 {
936 	u16 bridge;
937 	struct pci_dev *dev = socket->dev;
938 
939 	pci_set_power_state(socket->dev, 0);
940 
941 	config_writel(socket, CB_LEGACY_MODE_BASE, 0);
942 	config_writel(socket, PCI_BASE_ADDRESS_0, dev->resource[0].start);
943 	config_writew(socket, PCI_COMMAND,
944 			PCI_COMMAND_IO |
945 			PCI_COMMAND_MEMORY |
946 			PCI_COMMAND_MASTER |
947 			PCI_COMMAND_WAIT);
948 
949 	/* MAGIC NUMBERS! Fixme */
950 	config_writeb(socket, PCI_CACHE_LINE_SIZE, L1_CACHE_BYTES / 4);
951 	config_writeb(socket, PCI_LATENCY_TIMER, 168);
952 	config_writel(socket, PCI_PRIMARY_BUS,
953 		(176 << 24) |			   /* sec. latency timer */
954 		(dev->subordinate->subordinate << 16) | /* subordinate bus */
955 		(dev->subordinate->secondary << 8) |  /* secondary bus */
956 		dev->subordinate->primary);		   /* primary bus */
957 
958 	/*
959 	 * Set up the bridging state:
960 	 *  - enable write posting.
961 	 *  - memory window 0 prefetchable, window 1 non-prefetchable
962 	 *  - PCI interrupts enabled if a PCI interrupt exists..
963 	 */
964 	bridge = config_readw(socket, CB_BRIDGE_CONTROL);
965 	bridge &= ~(CB_BRIDGE_CRST | CB_BRIDGE_PREFETCH1 | CB_BRIDGE_INTR | CB_BRIDGE_ISAEN | CB_BRIDGE_VGAEN);
966 	bridge |= CB_BRIDGE_PREFETCH0 | CB_BRIDGE_POSTEN | CB_BRIDGE_INTR;
967 	config_writew(socket, CB_BRIDGE_CONTROL, bridge);
968 }
969 
970 /*
971  * Initialize a cardbus controller. Make sure we have a usable
972  * interrupt, and that we can map the cardbus area. Fill in the
973  * socket information structure..
974  */
975 static int __devinit yenta_probe (struct pci_dev *dev, const struct pci_device_id *id)
976 {
977 	struct yenta_socket *socket;
978 	int ret;
979 
980 	socket = kmalloc(sizeof(struct yenta_socket), GFP_KERNEL);
981 	if (!socket)
982 		return -ENOMEM;
983 	memset(socket, 0, sizeof(*socket));
984 
985 	/* prepare pcmcia_socket */
986 	socket->socket.ops = &yenta_socket_operations;
987 	socket->socket.resource_ops = &pccard_nonstatic_ops;
988 	socket->socket.dev.dev = &dev->dev;
989 	socket->socket.driver_data = socket;
990 	socket->socket.owner = THIS_MODULE;
991 	socket->socket.features = SS_CAP_PAGE_REGS | SS_CAP_PCCARD;
992 	socket->socket.map_size = 0x1000;
993 	socket->socket.cb_dev = dev;
994 
995 	/* prepare struct yenta_socket */
996 	socket->dev = dev;
997 	pci_set_drvdata(dev, socket);
998 
999 	/*
1000 	 * Do some basic sanity checking..
1001 	 */
1002 	if (pci_enable_device(dev)) {
1003 		ret = -EBUSY;
1004 		goto free;
1005 	}
1006 
1007 	ret = pci_request_regions(dev, "yenta_socket");
1008 	if (ret)
1009 		goto disable;
1010 
1011 	if (!pci_resource_start(dev, 0)) {
1012 		printk(KERN_ERR "No cardbus resource!\n");
1013 		ret = -ENODEV;
1014 		goto release;
1015 	}
1016 
1017 	/*
1018 	 * Ok, start setup.. Map the cardbus registers,
1019 	 * and request the IRQ.
1020 	 */
1021 	socket->base = ioremap(pci_resource_start(dev, 0), 0x1000);
1022 	if (!socket->base) {
1023 		ret = -ENOMEM;
1024 		goto release;
1025 	}
1026 
1027 	/*
1028 	 * report the subsystem vendor and device for help debugging
1029 	 * the irq stuff...
1030 	 */
1031 	printk(KERN_INFO "Yenta: CardBus bridge found at %s [%04x:%04x]\n",
1032 		pci_name(dev), dev->subsystem_vendor, dev->subsystem_device);
1033 
1034 	yenta_config_init(socket);
1035 
1036 	/* Disable all events */
1037 	cb_writel(socket, CB_SOCKET_MASK, 0x0);
1038 
1039 	/* Set up the bridge regions.. */
1040 	yenta_allocate_resources(socket);
1041 
1042 	socket->cb_irq = dev->irq;
1043 
1044 	/* Do we have special options for the device? */
1045 	if (id->driver_data != CARDBUS_TYPE_DEFAULT &&
1046 	    id->driver_data < ARRAY_SIZE(cardbus_type)) {
1047 		socket->type = &cardbus_type[id->driver_data];
1048 
1049 		ret = socket->type->override(socket);
1050 		if (ret < 0)
1051 			goto unmap;
1052 	}
1053 
1054 	/* We must finish initialization here */
1055 
1056 	if (!socket->cb_irq || request_irq(socket->cb_irq, yenta_interrupt, SA_SHIRQ, "yenta", socket)) {
1057 		/* No IRQ or request_irq failed. Poll */
1058 		socket->cb_irq = 0; /* But zero is a valid IRQ number. */
1059 		init_timer(&socket->poll_timer);
1060 		socket->poll_timer.function = yenta_interrupt_wrapper;
1061 		socket->poll_timer.data = (unsigned long)socket;
1062 		socket->poll_timer.expires = jiffies + HZ;
1063 		add_timer(&socket->poll_timer);
1064 		printk(KERN_INFO "Yenta: no PCI IRQ, CardBus support disabled for this socket.\n"
1065 		       KERN_INFO "Yenta: check your BIOS CardBus, BIOS IRQ or ACPI settings.\n");
1066 	} else {
1067 		socket->socket.features |= SS_CAP_CARDBUS;
1068 	}
1069 
1070 	/* Figure out what the dang thing can do for the PCMCIA layer... */
1071 	yenta_interrogate(socket);
1072 	yenta_get_socket_capabilities(socket, isa_interrupts);
1073 	printk(KERN_INFO "Socket status: %08x\n", cb_readl(socket, CB_SOCKET_STATE));
1074 
1075 	/* Register it with the pcmcia layer.. */
1076 	ret = pcmcia_register_socket(&socket->socket);
1077 	if (ret == 0)
1078 		goto out;
1079 
1080  unmap:
1081 	iounmap(socket->base);
1082  release:
1083 	pci_release_regions(dev);
1084  disable:
1085 	pci_disable_device(dev);
1086  free:
1087 	kfree(socket);
1088  out:
1089 	return ret;
1090 }
1091 
1092 
1093 static int yenta_dev_suspend (struct pci_dev *dev, pm_message_t state)
1094 {
1095 	struct yenta_socket *socket = pci_get_drvdata(dev);
1096 	int ret;
1097 
1098 	ret = pcmcia_socket_dev_suspend(&dev->dev, state);
1099 
1100 	if (socket) {
1101 		if (socket->type && socket->type->save_state)
1102 			socket->type->save_state(socket);
1103 
1104 		/* FIXME: pci_save_state needs to have a better interface */
1105 		pci_save_state(dev);
1106 		pci_read_config_dword(dev, 16*4, &socket->saved_state[0]);
1107 		pci_read_config_dword(dev, 17*4, &socket->saved_state[1]);
1108 		pci_disable_device(dev);
1109 
1110 		/*
1111 		 * Some laptops (IBM T22) do not like us putting the Cardbus
1112 		 * bridge into D3.  At a guess, some other laptop will
1113 		 * probably require this, so leave it commented out for now.
1114 		 */
1115 		/* pci_set_power_state(dev, 3); */
1116 	}
1117 
1118 	return ret;
1119 }
1120 
1121 
1122 static int yenta_dev_resume (struct pci_dev *dev)
1123 {
1124 	struct yenta_socket *socket = pci_get_drvdata(dev);
1125 
1126 	if (socket) {
1127 		pci_set_power_state(dev, 0);
1128 		/* FIXME: pci_restore_state needs to have a better interface */
1129 		pci_restore_state(dev);
1130 		pci_write_config_dword(dev, 16*4, socket->saved_state[0]);
1131 		pci_write_config_dword(dev, 17*4, socket->saved_state[1]);
1132 		pci_enable_device(dev);
1133 		pci_set_master(dev);
1134 
1135 		if (socket->type && socket->type->restore_state)
1136 			socket->type->restore_state(socket);
1137 	}
1138 
1139 	return pcmcia_socket_dev_resume(&dev->dev);
1140 }
1141 
1142 
1143 #define CB_ID(vend,dev,type)				\
1144 	{						\
1145 		.vendor		= vend,			\
1146 		.device		= dev,			\
1147 		.subvendor	= PCI_ANY_ID,		\
1148 		.subdevice	= PCI_ANY_ID,		\
1149 		.class		= PCI_CLASS_BRIDGE_CARDBUS << 8, \
1150 		.class_mask	= ~0,			\
1151 		.driver_data	= CARDBUS_TYPE_##type,	\
1152 	}
1153 
1154 static struct pci_device_id yenta_table [] = {
1155 	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1031, TI),
1156 
1157 	/*
1158 	 * TBD: Check if these TI variants can use more
1159 	 * advanced overrides instead.  (I can't get the
1160 	 * data sheets for these devices. --rmk)
1161 	 */
1162 	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1210, TI),
1163 
1164 	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1130, TI113X),
1165 	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1131, TI113X),
1166 
1167 	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1211, TI12XX),
1168 	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1220, TI12XX),
1169 	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1221, TI12XX),
1170 	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1225, TI12XX),
1171 	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251A, TI12XX),
1172 	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251B, TI12XX),
1173 	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1420, TI12XX),
1174 	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1450, TI12XX),
1175 	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1451A, TI12XX),
1176 	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1510, TI12XX),
1177 	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520, TI12XX),
1178 	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1620, TI12XX),
1179 	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4410, TI12XX),
1180 	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4450, TI12XX),
1181 	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4451, TI12XX),
1182 	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4510, TI12XX),
1183 	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4520, TI12XX),
1184 
1185 	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1250, TI1250),
1186 	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1410, TI1250),
1187 
1188 	CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1211, TI12XX),
1189 	CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1225, TI12XX),
1190 	CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1410, TI1250),
1191 	CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1420, TI12XX),
1192 
1193 	CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C465, RICOH),
1194 	CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C466, RICOH),
1195 	CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C475, RICOH),
1196 	CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476, RICOH),
1197 	CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C478, RICOH),
1198 
1199 	CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC97, TOPIC97),
1200 	CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC100, TOPIC97),
1201 
1202 	CB_ID(PCI_VENDOR_ID_O2, PCI_ANY_ID, O2MICRO),
1203 
1204 	/* match any cardbus bridge */
1205 	CB_ID(PCI_ANY_ID, PCI_ANY_ID, DEFAULT),
1206 	{ /* all zeroes */ }
1207 };
1208 MODULE_DEVICE_TABLE(pci, yenta_table);
1209 
1210 
1211 static struct pci_driver yenta_cardbus_driver = {
1212 	.name		= "yenta_cardbus",
1213 	.id_table	= yenta_table,
1214 	.probe		= yenta_probe,
1215 	.remove		= __devexit_p(yenta_close),
1216 	.suspend	= yenta_dev_suspend,
1217 	.resume		= yenta_dev_resume,
1218 };
1219 
1220 
1221 static int __init yenta_socket_init(void)
1222 {
1223 	return pci_register_driver (&yenta_cardbus_driver);
1224 }
1225 
1226 
1227 static void __exit yenta_socket_exit (void)
1228 {
1229 	pci_unregister_driver (&yenta_cardbus_driver);
1230 }
1231 
1232 
1233 module_init(yenta_socket_init);
1234 module_exit(yenta_socket_exit);
1235 
1236 MODULE_LICENSE("GPL");
1237