xref: /linux/drivers/pcmcia/sa1111_neponset.c (revision e5c86679d5e864947a52fb31e45a425dea3e7fa9)
1 /*
2  * linux/drivers/pcmcia/sa1100_neponset.c
3  *
4  * Neponset PCMCIA specific routines
5  */
6 #include <linux/module.h>
7 #include <linux/kernel.h>
8 #include <linux/device.h>
9 #include <linux/errno.h>
10 #include <linux/init.h>
11 
12 #include <mach/hardware.h>
13 #include <asm/mach-types.h>
14 #include <mach/neponset.h>
15 #include <asm/hardware/sa1111.h>
16 
17 #include "sa1111_generic.h"
18 
19 /*
20  * Neponset uses the Maxim MAX1600, with the following connections:
21  *
22  *   MAX1600      Neponset
23  *
24  *    A0VCC        SA-1111 GPIO A<1>
25  *    A1VCC        SA-1111 GPIO A<0>
26  *    A0VPP        CPLD NCR A0VPP
27  *    A1VPP        CPLD NCR A1VPP
28  *    B0VCC        SA-1111 GPIO A<2>
29  *    B1VCC        SA-1111 GPIO A<3>
30  *    B0VPP        ground (slot B is CF)
31  *    B1VPP        ground (slot B is CF)
32  *
33  *     VX          VCC (5V)
34  *     VY          VCC3_3 (3.3V)
35  *     12INA       12V
36  *     12INB       ground (slot B is CF)
37  *
38  * The MAX1600 CODE pin is tied to ground, placing the device in
39  * "Standard Intel code" mode. Refer to the Maxim data sheet for
40  * the corresponding truth table.
41  */
42 
43 static int
44 neponset_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, const socket_state_t *state)
45 {
46 	struct sa1111_pcmcia_socket *s = to_skt(skt);
47 	unsigned int ncr_mask, ncr_set, pa_dwr_mask, pa_dwr_set;
48 	int ret;
49 
50 	switch (skt->nr) {
51 	case 0:
52 		pa_dwr_mask = GPIO_A0 | GPIO_A1;
53 		ncr_mask = NCR_A0VPP | NCR_A1VPP;
54 
55 		if (state->Vpp == 0)
56 			ncr_set = 0;
57 		else if (state->Vpp == 120)
58 			ncr_set = NCR_A1VPP;
59 		else if (state->Vpp == state->Vcc)
60 			ncr_set = NCR_A0VPP;
61 		else {
62 			printk(KERN_ERR "%s(): unrecognized VPP %u\n",
63 			       __func__, state->Vpp);
64 			return -1;
65 		}
66 		break;
67 
68 	case 1:
69 		pa_dwr_mask = GPIO_A2 | GPIO_A3;
70 		ncr_mask = 0;
71 		ncr_set = 0;
72 
73 		if (state->Vpp != state->Vcc && state->Vpp != 0) {
74 			printk(KERN_ERR "%s(): CF slot cannot support VPP %u\n",
75 			       __func__, state->Vpp);
76 			return -1;
77 		}
78 		break;
79 
80 	default:
81 		return -1;
82 	}
83 
84 	/*
85 	 * pa_dwr_set is the mask for selecting Vcc on both sockets.
86 	 * pa_dwr_mask selects which bits (and therefore socket) we change.
87 	 */
88 	switch (state->Vcc) {
89 	default:
90 	case 0:  pa_dwr_set = 0;		break;
91 	case 33: pa_dwr_set = GPIO_A1|GPIO_A2;	break;
92 	case 50: pa_dwr_set = GPIO_A0|GPIO_A3;	break;
93 	}
94 
95 	ret = sa1111_pcmcia_configure_socket(skt, state);
96 	if (ret == 0) {
97 		neponset_ncr_frob(ncr_mask, ncr_set);
98 		sa1111_set_io(s->dev, pa_dwr_mask, pa_dwr_set);
99 	}
100 
101 	return ret;
102 }
103 
104 static struct pcmcia_low_level neponset_pcmcia_ops = {
105 	.owner			= THIS_MODULE,
106 	.configure_socket	= neponset_pcmcia_configure_socket,
107 	.first			= 0,
108 	.nr			= 2,
109 };
110 
111 int pcmcia_neponset_init(struct sa1111_dev *sadev)
112 {
113 	/*
114 	 * Set GPIO_A<3:0> to be outputs for the MAX1600,
115 	 * and switch to standby mode.
116 	 */
117 	sa1111_set_io_dir(sadev, GPIO_A0|GPIO_A1|GPIO_A2|GPIO_A3, 0, 0);
118 	sa1111_set_io(sadev, GPIO_A0|GPIO_A1|GPIO_A2|GPIO_A3, 0);
119 	sa1111_set_sleep_io(sadev, GPIO_A0|GPIO_A1|GPIO_A2|GPIO_A3, 0);
120 	sa11xx_drv_pcmcia_ops(&neponset_pcmcia_ops);
121 	return sa1111_pcmcia_add(sadev, &neponset_pcmcia_ops,
122 				 sa11xx_drv_pcmcia_add_one);
123 }
124