1 /* 2 * omap_cf.c -- OMAP 16xx CompactFlash controller driver 3 * 4 * Copyright (c) 2005 David Brownell 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 */ 11 12 #include <linux/module.h> 13 #include <linux/kernel.h> 14 #include <linux/sched.h> 15 #include <linux/platform_device.h> 16 #include <linux/errno.h> 17 #include <linux/init.h> 18 #include <linux/delay.h> 19 #include <linux/interrupt.h> 20 21 #include <pcmcia/ss.h> 22 23 #include <asm/hardware.h> 24 #include <asm/io.h> 25 #include <asm/sizes.h> 26 27 #include <asm/arch/mux.h> 28 #include <asm/arch/tc.h> 29 30 31 /* NOTE: don't expect this to support many I/O cards. The 16xx chips have 32 * hard-wired timings to support Compact Flash memory cards; they won't work 33 * with various other devices (like WLAN adapters) without some external 34 * logic to help out. 35 * 36 * NOTE: CF controller docs disagree with address space docs as to where 37 * CF_BASE really lives; this is a doc erratum. 38 */ 39 #define CF_BASE 0xfffe2800 40 41 /* status; read after IRQ */ 42 #define CF_STATUS_REG __REG16(CF_BASE + 0x00) 43 # define CF_STATUS_BAD_READ (1 << 2) 44 # define CF_STATUS_BAD_WRITE (1 << 1) 45 # define CF_STATUS_CARD_DETECT (1 << 0) 46 47 /* which chipselect (CS0..CS3) is used for CF (active low) */ 48 #define CF_CFG_REG __REG16(CF_BASE + 0x02) 49 50 /* card reset */ 51 #define CF_CONTROL_REG __REG16(CF_BASE + 0x04) 52 # define CF_CONTROL_RESET (1 << 0) 53 54 #define omap_cf_present() (!(CF_STATUS_REG & CF_STATUS_CARD_DETECT)) 55 56 /*--------------------------------------------------------------------------*/ 57 58 static const char driver_name[] = "omap_cf"; 59 60 struct omap_cf_socket { 61 struct pcmcia_socket socket; 62 63 struct timer_list timer; 64 unsigned present:1; 65 unsigned active:1; 66 67 struct platform_device *pdev; 68 unsigned long phys_cf; 69 u_int irq; 70 }; 71 72 #define POLL_INTERVAL (2 * HZ) 73 74 #define SZ_2K (2 * SZ_1K) 75 76 /*--------------------------------------------------------------------------*/ 77 78 static int omap_cf_ss_init(struct pcmcia_socket *s) 79 { 80 return 0; 81 } 82 83 /* the timer is primarily to kick this socket's pccardd */ 84 static void omap_cf_timer(unsigned long _cf) 85 { 86 struct omap_cf_socket *cf = (void *) _cf; 87 unsigned present = omap_cf_present(); 88 89 if (present != cf->present) { 90 cf->present = present; 91 pr_debug("%s: card %s\n", driver_name, 92 present ? "present" : "gone"); 93 pcmcia_parse_events(&cf->socket, SS_DETECT); 94 } 95 96 if (cf->active) 97 mod_timer(&cf->timer, jiffies + POLL_INTERVAL); 98 } 99 100 /* This irq handler prevents "irqNNN: nobody cared" messages as drivers 101 * claim the card's IRQ. It may also detect some card insertions, but 102 * not removals; it can't always eliminate timer irqs. 103 */ 104 static irqreturn_t omap_cf_irq(int irq, void *_cf, struct pt_regs *r) 105 { 106 omap_cf_timer((unsigned long)_cf); 107 return IRQ_HANDLED; 108 } 109 110 static int omap_cf_get_status(struct pcmcia_socket *s, u_int *sp) 111 { 112 if (!sp) 113 return -EINVAL; 114 115 /* FIXME power management should probably be board-specific: 116 * - 3VCARD vs XVCARD (OSK only handles 3VCARD) 117 * - POWERON (switched on/off by set_socket) 118 */ 119 if (omap_cf_present()) { 120 struct omap_cf_socket *cf; 121 122 *sp = SS_READY | SS_DETECT | SS_POWERON | SS_3VCARD; 123 cf = container_of(s, struct omap_cf_socket, socket); 124 s->irq.AssignedIRQ = cf->irq; 125 } else 126 *sp = 0; 127 return 0; 128 } 129 130 static int 131 omap_cf_set_socket(struct pcmcia_socket *sock, struct socket_state_t *s) 132 { 133 u16 control; 134 135 /* FIXME some non-OSK boards will support power switching */ 136 switch (s->Vcc) { 137 case 0: 138 case 33: 139 break; 140 default: 141 return -EINVAL; 142 } 143 144 control = CF_CONTROL_REG; 145 if (s->flags & SS_RESET) 146 CF_CONTROL_REG = CF_CONTROL_RESET; 147 else 148 CF_CONTROL_REG = 0; 149 150 pr_debug("%s: Vcc %d, io_irq %d, flags %04x csc %04x\n", 151 driver_name, s->Vcc, s->io_irq, s->flags, s->csc_mask); 152 153 return 0; 154 } 155 156 static int omap_cf_ss_suspend(struct pcmcia_socket *s) 157 { 158 pr_debug("%s: %s\n", driver_name, __FUNCTION__); 159 return omap_cf_set_socket(s, &dead_socket); 160 } 161 162 /* regions are 2K each: mem, attrib, io (and reserved-for-ide) */ 163 164 static int 165 omap_cf_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io) 166 { 167 struct omap_cf_socket *cf; 168 169 cf = container_of(s, struct omap_cf_socket, socket); 170 io->flags &= MAP_ACTIVE|MAP_ATTRIB|MAP_16BIT; 171 io->start = cf->phys_cf + SZ_4K; 172 io->stop = io->start + SZ_2K - 1; 173 return 0; 174 } 175 176 static int 177 omap_cf_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *map) 178 { 179 struct omap_cf_socket *cf; 180 181 if (map->card_start) 182 return -EINVAL; 183 cf = container_of(s, struct omap_cf_socket, socket); 184 map->static_start = cf->phys_cf; 185 map->flags &= MAP_ACTIVE|MAP_ATTRIB|MAP_16BIT; 186 if (map->flags & MAP_ATTRIB) 187 map->static_start += SZ_2K; 188 return 0; 189 } 190 191 static struct pccard_operations omap_cf_ops = { 192 .init = omap_cf_ss_init, 193 .suspend = omap_cf_ss_suspend, 194 .get_status = omap_cf_get_status, 195 .set_socket = omap_cf_set_socket, 196 .set_io_map = omap_cf_set_io_map, 197 .set_mem_map = omap_cf_set_mem_map, 198 }; 199 200 /*--------------------------------------------------------------------------*/ 201 202 /* 203 * NOTE: right now the only board-specific platform_data is 204 * "what chipselect is used". Boards could want more. 205 */ 206 207 static int __init omap_cf_probe(struct device *dev) 208 { 209 unsigned seg; 210 struct omap_cf_socket *cf; 211 struct platform_device *pdev = to_platform_device(dev); 212 int irq; 213 int status; 214 215 seg = (int) dev->platform_data; 216 if (seg == 0 || seg > 3) 217 return -ENODEV; 218 219 /* either CFLASH.IREQ (INT_1610_CF) or some GPIO */ 220 irq = platform_get_irq(pdev, 0); 221 if (irq < 0) 222 return -EINVAL; 223 224 cf = kcalloc(1, sizeof *cf, GFP_KERNEL); 225 if (!cf) 226 return -ENOMEM; 227 init_timer(&cf->timer); 228 cf->timer.function = omap_cf_timer; 229 cf->timer.data = (unsigned long) cf; 230 231 cf->pdev = pdev; 232 dev_set_drvdata(dev, cf); 233 234 /* this primarily just shuts up irq handling noise */ 235 status = request_irq(irq, omap_cf_irq, IRQF_SHARED, 236 driver_name, cf); 237 if (status < 0) 238 goto fail0; 239 cf->irq = irq; 240 cf->socket.pci_irq = irq; 241 242 switch (seg) { 243 /* NOTE: CS0 could be configured too ... */ 244 case 1: 245 cf->phys_cf = OMAP_CS1_PHYS; 246 break; 247 case 2: 248 cf->phys_cf = OMAP_CS2_PHYS; 249 break; 250 case 3: 251 cf->phys_cf = omap_cs3_phys(); 252 break; 253 default: 254 goto fail1; 255 } 256 257 /* pcmcia layer only remaps "real" memory */ 258 cf->socket.io_offset = (unsigned long) 259 ioremap(cf->phys_cf + SZ_4K, SZ_2K); 260 if (!cf->socket.io_offset) 261 goto fail1; 262 263 if (!request_mem_region(cf->phys_cf, SZ_8K, driver_name)) 264 goto fail1; 265 266 /* NOTE: CF conflicts with MMC1 */ 267 omap_cfg_reg(W11_1610_CF_CD1); 268 omap_cfg_reg(P11_1610_CF_CD2); 269 omap_cfg_reg(R11_1610_CF_IOIS16); 270 omap_cfg_reg(V10_1610_CF_IREQ); 271 omap_cfg_reg(W10_1610_CF_RESET); 272 273 CF_CFG_REG = ~(1 << seg); 274 275 pr_info("%s: cs%d on irq %d\n", driver_name, seg, irq); 276 277 /* NOTE: better EMIFS setup might support more cards; but the 278 * TRM only shows how to affect regular flash signals, not their 279 * CF/PCMCIA variants... 280 */ 281 pr_debug("%s: cs%d, previous ccs %08x acs %08x\n", driver_name, 282 seg, EMIFS_CCS(seg), EMIFS_ACS(seg)); 283 EMIFS_CCS(seg) = 0x0004a1b3; /* synch mode 4 etc */ 284 EMIFS_ACS(seg) = 0x00000000; /* OE hold/setup */ 285 286 /* CF uses armxor_ck, which is "always" available */ 287 288 pr_debug("%s: sts %04x cfg %04x control %04x %s\n", driver_name, 289 CF_STATUS_REG, CF_CFG_REG, CF_CONTROL_REG, 290 omap_cf_present() ? "present" : "(not present)"); 291 292 cf->socket.owner = THIS_MODULE; 293 cf->socket.dev.dev = dev; 294 cf->socket.ops = &omap_cf_ops; 295 cf->socket.resource_ops = &pccard_static_ops; 296 cf->socket.features = SS_CAP_PCCARD | SS_CAP_STATIC_MAP 297 | SS_CAP_MEM_ALIGN; 298 cf->socket.map_size = SZ_2K; 299 300 status = pcmcia_register_socket(&cf->socket); 301 if (status < 0) 302 goto fail2; 303 304 cf->active = 1; 305 mod_timer(&cf->timer, jiffies + POLL_INTERVAL); 306 return 0; 307 308 fail2: 309 iounmap((void __iomem *) cf->socket.io_offset); 310 release_mem_region(cf->phys_cf, SZ_8K); 311 fail1: 312 free_irq(irq, cf); 313 fail0: 314 kfree(cf); 315 return status; 316 } 317 318 static int __devexit omap_cf_remove(struct device *dev) 319 { 320 struct omap_cf_socket *cf = dev_get_drvdata(dev); 321 322 cf->active = 0; 323 pcmcia_unregister_socket(&cf->socket); 324 del_timer_sync(&cf->timer); 325 iounmap((void __iomem *) cf->socket.io_offset); 326 release_mem_region(cf->phys_cf, SZ_8K); 327 free_irq(cf->irq, cf); 328 kfree(cf); 329 return 0; 330 } 331 332 static struct device_driver omap_cf_driver = { 333 .name = (char *) driver_name, 334 .bus = &platform_bus_type, 335 .probe = omap_cf_probe, 336 .remove = __devexit_p(omap_cf_remove), 337 .suspend = pcmcia_socket_dev_suspend, 338 .resume = pcmcia_socket_dev_resume, 339 }; 340 341 static int __init omap_cf_init(void) 342 { 343 if (cpu_is_omap16xx()) 344 driver_register(&omap_cf_driver); 345 return 0; 346 } 347 348 static void __exit omap_cf_exit(void) 349 { 350 if (cpu_is_omap16xx()) 351 driver_unregister(&omap_cf_driver); 352 } 353 354 module_init(omap_cf_init); 355 module_exit(omap_cf_exit); 356 357 MODULE_DESCRIPTION("OMAP CF Driver"); 358 MODULE_LICENSE("GPL"); 359