1 /*====================================================================== 2 3 Device driver for Intel 82365 and compatible PC Card controllers. 4 5 i82365.c 1.265 1999/11/10 18:36:21 6 7 The contents of this file are subject to the Mozilla Public 8 License Version 1.1 (the "License"); you may not use this file 9 except in compliance with the License. You may obtain a copy of 10 the License at http://www.mozilla.org/MPL/ 11 12 Software distributed under the License is distributed on an "AS 13 IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or 14 implied. See the License for the specific language governing 15 rights and limitations under the License. 16 17 The initial developer of the original code is David A. Hinds 18 <dahinds@users.sourceforge.net>. Portions created by David A. Hinds 19 are Copyright (C) 1999 David A. Hinds. All Rights Reserved. 20 21 Alternatively, the contents of this file may be used under the 22 terms of the GNU General Public License version 2 (the "GPL"), in which 23 case the provisions of the GPL are applicable instead of the 24 above. If you wish to allow the use of your version of this file 25 only under the terms of the GPL and not to allow others to use 26 your version of this file under the MPL, indicate your decision 27 by deleting the provisions above and replace them with the notice 28 and other provisions required by the GPL. If you do not delete 29 the provisions above, a recipient may use your version of this 30 file under either the MPL or the GPL. 31 32 ======================================================================*/ 33 34 #include <linux/module.h> 35 #include <linux/moduleparam.h> 36 #include <linux/init.h> 37 #include <linux/types.h> 38 #include <linux/fcntl.h> 39 #include <linux/string.h> 40 #include <linux/kernel.h> 41 #include <linux/errno.h> 42 #include <linux/timer.h> 43 #include <linux/sched.h> 44 #include <linux/slab.h> 45 #include <linux/ioport.h> 46 #include <linux/delay.h> 47 #include <linux/workqueue.h> 48 #include <linux/interrupt.h> 49 #include <linux/platform_device.h> 50 #include <linux/bitops.h> 51 #include <asm/irq.h> 52 #include <asm/io.h> 53 #include <asm/system.h> 54 55 #include <pcmcia/cs_types.h> 56 #include <pcmcia/ss.h> 57 #include <pcmcia/cs.h> 58 59 #include <linux/isapnp.h> 60 61 /* ISA-bus controllers */ 62 #include "i82365.h" 63 #include "cirrus.h" 64 #include "vg468.h" 65 #include "ricoh.h" 66 67 #ifdef DEBUG 68 static const char version[] = 69 "i82365.c 1.265 1999/11/10 18:36:21 (David Hinds)"; 70 71 static int pc_debug; 72 73 module_param(pc_debug, int, 0644); 74 75 #define debug(lvl, fmt, arg...) do { \ 76 if (pc_debug > (lvl)) \ 77 printk(KERN_DEBUG "i82365: " fmt , ## arg); \ 78 } while (0) 79 #else 80 #define debug(lvl, fmt, arg...) do { } while (0) 81 #endif 82 83 static irqreturn_t i365_count_irq(int, void *, struct pt_regs *); 84 static inline int _check_irq(int irq, int flags) 85 { 86 if (request_irq(irq, i365_count_irq, flags, "x", i365_count_irq) != 0) 87 return -1; 88 free_irq(irq, i365_count_irq); 89 return 0; 90 } 91 92 /*====================================================================*/ 93 94 /* Parameters that can be set with 'insmod' */ 95 96 /* Default base address for i82365sl and other ISA chips */ 97 static unsigned long i365_base = 0x3e0; 98 /* Should we probe at 0x3e2 for an extra ISA controller? */ 99 static int extra_sockets = 0; 100 /* Specify a socket number to ignore */ 101 static int ignore = -1; 102 /* Bit map or list of interrupts to choose from */ 103 static u_int irq_mask = 0xffff; 104 static int irq_list[16]; 105 static int irq_list_count; 106 /* The card status change interrupt -- 0 means autoselect */ 107 static int cs_irq = 0; 108 109 /* Probe for safe interrupts? */ 110 static int do_scan = 1; 111 /* Poll status interval -- 0 means default to interrupt */ 112 static int poll_interval = 0; 113 /* External clock time, in nanoseconds. 120 ns = 8.33 MHz */ 114 static int cycle_time = 120; 115 116 /* Cirrus options */ 117 static int has_dma = -1; 118 static int has_led = -1; 119 static int has_ring = -1; 120 static int dynamic_mode = 0; 121 static int freq_bypass = -1; 122 static int setup_time = -1; 123 static int cmd_time = -1; 124 static int recov_time = -1; 125 126 /* Vadem options */ 127 static int async_clock = -1; 128 static int cable_mode = -1; 129 static int wakeup = 0; 130 131 module_param(i365_base, ulong, 0444); 132 module_param(ignore, int, 0444); 133 module_param(extra_sockets, int, 0444); 134 module_param(irq_mask, int, 0444); 135 module_param_array(irq_list, int, &irq_list_count, 0444); 136 module_param(cs_irq, int, 0444); 137 module_param(async_clock, int, 0444); 138 module_param(cable_mode, int, 0444); 139 module_param(wakeup, int, 0444); 140 141 module_param(do_scan, int, 0444); 142 module_param(poll_interval, int, 0444); 143 module_param(cycle_time, int, 0444); 144 module_param(has_dma, int, 0444); 145 module_param(has_led, int, 0444); 146 module_param(has_ring, int, 0444); 147 module_param(dynamic_mode, int, 0444); 148 module_param(freq_bypass, int, 0444); 149 module_param(setup_time, int, 0444); 150 module_param(cmd_time, int, 0444); 151 module_param(recov_time, int, 0444); 152 153 /*====================================================================*/ 154 155 typedef struct cirrus_state_t { 156 u_char misc1, misc2; 157 u_char timer[6]; 158 } cirrus_state_t; 159 160 typedef struct vg46x_state_t { 161 u_char ctl, ema; 162 } vg46x_state_t; 163 164 struct i82365_socket { 165 u_short type, flags; 166 struct pcmcia_socket socket; 167 unsigned int number; 168 kio_addr_t ioaddr; 169 u_short psock; 170 u_char cs_irq, intr; 171 union { 172 cirrus_state_t cirrus; 173 vg46x_state_t vg46x; 174 } state; 175 }; 176 177 /* Where we keep track of our sockets... */ 178 static int sockets = 0; 179 static struct i82365_socket socket[8] = { 180 { 0, }, /* ... */ 181 }; 182 183 /* Default ISA interrupt mask */ 184 #define I365_MASK 0xdeb8 /* irq 15,14,12,11,10,9,7,5,4,3 */ 185 186 static int grab_irq; 187 static DEFINE_SPINLOCK(isa_lock); 188 #define ISA_LOCK(n, f) spin_lock_irqsave(&isa_lock, f) 189 #define ISA_UNLOCK(n, f) spin_unlock_irqrestore(&isa_lock, f) 190 191 static struct timer_list poll_timer; 192 193 /*====================================================================*/ 194 195 /* These definitions must match the pcic table! */ 196 typedef enum pcic_id { 197 IS_I82365A, IS_I82365B, IS_I82365DF, 198 IS_IBM, IS_RF5Cx96, IS_VLSI, IS_VG468, IS_VG469, 199 IS_PD6710, IS_PD672X, IS_VT83C469, 200 } pcic_id; 201 202 /* Flags for classifying groups of controllers */ 203 #define IS_VADEM 0x0001 204 #define IS_CIRRUS 0x0002 205 #define IS_VIA 0x0010 206 #define IS_UNKNOWN 0x0400 207 #define IS_VG_PWR 0x0800 208 #define IS_DF_PWR 0x1000 209 #define IS_REGISTERED 0x2000 210 #define IS_ALIVE 0x8000 211 212 typedef struct pcic_t { 213 char *name; 214 u_short flags; 215 } pcic_t; 216 217 static pcic_t pcic[] = { 218 { "Intel i82365sl A step", 0 }, 219 { "Intel i82365sl B step", 0 }, 220 { "Intel i82365sl DF", IS_DF_PWR }, 221 { "IBM Clone", 0 }, 222 { "Ricoh RF5C296/396", 0 }, 223 { "VLSI 82C146", 0 }, 224 { "Vadem VG-468", IS_VADEM }, 225 { "Vadem VG-469", IS_VADEM|IS_VG_PWR }, 226 { "Cirrus PD6710", IS_CIRRUS }, 227 { "Cirrus PD672x", IS_CIRRUS }, 228 { "VIA VT83C469", IS_CIRRUS|IS_VIA }, 229 }; 230 231 #define PCIC_COUNT (sizeof(pcic)/sizeof(pcic_t)) 232 233 /*====================================================================*/ 234 235 static DEFINE_SPINLOCK(bus_lock); 236 237 static u_char i365_get(u_short sock, u_short reg) 238 { 239 unsigned long flags; 240 spin_lock_irqsave(&bus_lock,flags); 241 { 242 kio_addr_t port = socket[sock].ioaddr; 243 u_char val; 244 reg = I365_REG(socket[sock].psock, reg); 245 outb(reg, port); val = inb(port+1); 246 spin_unlock_irqrestore(&bus_lock,flags); 247 return val; 248 } 249 } 250 251 static void i365_set(u_short sock, u_short reg, u_char data) 252 { 253 unsigned long flags; 254 spin_lock_irqsave(&bus_lock,flags); 255 { 256 kio_addr_t port = socket[sock].ioaddr; 257 u_char val = I365_REG(socket[sock].psock, reg); 258 outb(val, port); outb(data, port+1); 259 spin_unlock_irqrestore(&bus_lock,flags); 260 } 261 } 262 263 static void i365_bset(u_short sock, u_short reg, u_char mask) 264 { 265 u_char d = i365_get(sock, reg); 266 d |= mask; 267 i365_set(sock, reg, d); 268 } 269 270 static void i365_bclr(u_short sock, u_short reg, u_char mask) 271 { 272 u_char d = i365_get(sock, reg); 273 d &= ~mask; 274 i365_set(sock, reg, d); 275 } 276 277 static void i365_bflip(u_short sock, u_short reg, u_char mask, int b) 278 { 279 u_char d = i365_get(sock, reg); 280 if (b) 281 d |= mask; 282 else 283 d &= ~mask; 284 i365_set(sock, reg, d); 285 } 286 287 static u_short i365_get_pair(u_short sock, u_short reg) 288 { 289 u_short a, b; 290 a = i365_get(sock, reg); 291 b = i365_get(sock, reg+1); 292 return (a + (b<<8)); 293 } 294 295 static void i365_set_pair(u_short sock, u_short reg, u_short data) 296 { 297 i365_set(sock, reg, data & 0xff); 298 i365_set(sock, reg+1, data >> 8); 299 } 300 301 /*====================================================================== 302 303 Code to save and restore global state information for Cirrus 304 PD67xx controllers, and to set and report global configuration 305 options. 306 307 The VIA controllers also use these routines, as they are mostly 308 Cirrus lookalikes, without the timing registers. 309 310 ======================================================================*/ 311 312 #define flip(v,b,f) (v = ((f)<0) ? v : ((f) ? ((v)|(b)) : ((v)&(~b)))) 313 314 static void cirrus_get_state(u_short s) 315 { 316 int i; 317 cirrus_state_t *p = &socket[s].state.cirrus; 318 p->misc1 = i365_get(s, PD67_MISC_CTL_1); 319 p->misc1 &= (PD67_MC1_MEDIA_ENA | PD67_MC1_INPACK_ENA); 320 p->misc2 = i365_get(s, PD67_MISC_CTL_2); 321 for (i = 0; i < 6; i++) 322 p->timer[i] = i365_get(s, PD67_TIME_SETUP(0)+i); 323 } 324 325 static void cirrus_set_state(u_short s) 326 { 327 int i; 328 u_char misc; 329 cirrus_state_t *p = &socket[s].state.cirrus; 330 331 misc = i365_get(s, PD67_MISC_CTL_2); 332 i365_set(s, PD67_MISC_CTL_2, p->misc2); 333 if (misc & PD67_MC2_SUSPEND) mdelay(50); 334 misc = i365_get(s, PD67_MISC_CTL_1); 335 misc &= ~(PD67_MC1_MEDIA_ENA | PD67_MC1_INPACK_ENA); 336 i365_set(s, PD67_MISC_CTL_1, misc | p->misc1); 337 for (i = 0; i < 6; i++) 338 i365_set(s, PD67_TIME_SETUP(0)+i, p->timer[i]); 339 } 340 341 static u_int __init cirrus_set_opts(u_short s, char *buf) 342 { 343 struct i82365_socket *t = &socket[s]; 344 cirrus_state_t *p = &socket[s].state.cirrus; 345 u_int mask = 0xffff; 346 347 if (has_ring == -1) has_ring = 1; 348 flip(p->misc2, PD67_MC2_IRQ15_RI, has_ring); 349 flip(p->misc2, PD67_MC2_DYNAMIC_MODE, dynamic_mode); 350 flip(p->misc2, PD67_MC2_FREQ_BYPASS, freq_bypass); 351 if (p->misc2 & PD67_MC2_IRQ15_RI) 352 strcat(buf, " [ring]"); 353 if (p->misc2 & PD67_MC2_DYNAMIC_MODE) 354 strcat(buf, " [dyn mode]"); 355 if (p->misc2 & PD67_MC2_FREQ_BYPASS) 356 strcat(buf, " [freq bypass]"); 357 if (p->misc1 & PD67_MC1_INPACK_ENA) 358 strcat(buf, " [inpack]"); 359 if (p->misc2 & PD67_MC2_IRQ15_RI) 360 mask &= ~0x8000; 361 if (has_led > 0) { 362 strcat(buf, " [led]"); 363 mask &= ~0x1000; 364 } 365 if (has_dma > 0) { 366 strcat(buf, " [dma]"); 367 mask &= ~0x0600; 368 } 369 if (!(t->flags & IS_VIA)) { 370 if (setup_time >= 0) 371 p->timer[0] = p->timer[3] = setup_time; 372 if (cmd_time > 0) { 373 p->timer[1] = cmd_time; 374 p->timer[4] = cmd_time*2+4; 375 } 376 if (p->timer[1] == 0) { 377 p->timer[1] = 6; p->timer[4] = 16; 378 if (p->timer[0] == 0) 379 p->timer[0] = p->timer[3] = 1; 380 } 381 if (recov_time >= 0) 382 p->timer[2] = p->timer[5] = recov_time; 383 buf += strlen(buf); 384 sprintf(buf, " [%d/%d/%d] [%d/%d/%d]", p->timer[0], p->timer[1], 385 p->timer[2], p->timer[3], p->timer[4], p->timer[5]); 386 } 387 return mask; 388 } 389 390 /*====================================================================== 391 392 Code to save and restore global state information for Vadem VG468 393 and VG469 controllers, and to set and report global configuration 394 options. 395 396 ======================================================================*/ 397 398 static void vg46x_get_state(u_short s) 399 { 400 vg46x_state_t *p = &socket[s].state.vg46x; 401 p->ctl = i365_get(s, VG468_CTL); 402 if (socket[s].type == IS_VG469) 403 p->ema = i365_get(s, VG469_EXT_MODE); 404 } 405 406 static void vg46x_set_state(u_short s) 407 { 408 vg46x_state_t *p = &socket[s].state.vg46x; 409 i365_set(s, VG468_CTL, p->ctl); 410 if (socket[s].type == IS_VG469) 411 i365_set(s, VG469_EXT_MODE, p->ema); 412 } 413 414 static u_int __init vg46x_set_opts(u_short s, char *buf) 415 { 416 vg46x_state_t *p = &socket[s].state.vg46x; 417 418 flip(p->ctl, VG468_CTL_ASYNC, async_clock); 419 flip(p->ema, VG469_MODE_CABLE, cable_mode); 420 if (p->ctl & VG468_CTL_ASYNC) 421 strcat(buf, " [async]"); 422 if (p->ctl & VG468_CTL_INPACK) 423 strcat(buf, " [inpack]"); 424 if (socket[s].type == IS_VG469) { 425 u_char vsel = i365_get(s, VG469_VSELECT); 426 if (vsel & VG469_VSEL_EXT_STAT) { 427 strcat(buf, " [ext mode]"); 428 if (vsel & VG469_VSEL_EXT_BUS) 429 strcat(buf, " [isa buf]"); 430 } 431 if (p->ema & VG469_MODE_CABLE) 432 strcat(buf, " [cable]"); 433 if (p->ema & VG469_MODE_COMPAT) 434 strcat(buf, " [c step]"); 435 } 436 return 0xffff; 437 } 438 439 /*====================================================================== 440 441 Generic routines to get and set controller options 442 443 ======================================================================*/ 444 445 static void get_bridge_state(u_short s) 446 { 447 struct i82365_socket *t = &socket[s]; 448 if (t->flags & IS_CIRRUS) 449 cirrus_get_state(s); 450 else if (t->flags & IS_VADEM) 451 vg46x_get_state(s); 452 } 453 454 static void set_bridge_state(u_short s) 455 { 456 struct i82365_socket *t = &socket[s]; 457 if (t->flags & IS_CIRRUS) 458 cirrus_set_state(s); 459 else { 460 i365_set(s, I365_GBLCTL, 0x00); 461 i365_set(s, I365_GENCTL, 0x00); 462 } 463 i365_bflip(s, I365_INTCTL, I365_INTR_ENA, t->intr); 464 if (t->flags & IS_VADEM) 465 vg46x_set_state(s); 466 } 467 468 static u_int __init set_bridge_opts(u_short s, u_short ns) 469 { 470 u_short i; 471 u_int m = 0xffff; 472 char buf[128]; 473 474 for (i = s; i < s+ns; i++) { 475 if (socket[i].flags & IS_ALIVE) { 476 printk(KERN_INFO " host opts [%d]: already alive!\n", i); 477 continue; 478 } 479 buf[0] = '\0'; 480 get_bridge_state(i); 481 if (socket[i].flags & IS_CIRRUS) 482 m = cirrus_set_opts(i, buf); 483 else if (socket[i].flags & IS_VADEM) 484 m = vg46x_set_opts(i, buf); 485 set_bridge_state(i); 486 printk(KERN_INFO " host opts [%d]:%s\n", i, 487 (*buf) ? buf : " none"); 488 } 489 return m; 490 } 491 492 /*====================================================================== 493 494 Interrupt testing code, for ISA and PCI interrupts 495 496 ======================================================================*/ 497 498 static volatile u_int irq_hits; 499 static u_short irq_sock; 500 501 static irqreturn_t i365_count_irq(int irq, void *dev, struct pt_regs *regs) 502 { 503 i365_get(irq_sock, I365_CSC); 504 irq_hits++; 505 debug(2, "-> hit on irq %d\n", irq); 506 return IRQ_HANDLED; 507 } 508 509 static u_int __init test_irq(u_short sock, int irq) 510 { 511 debug(2, " testing ISA irq %d\n", irq); 512 if (request_irq(irq, i365_count_irq, 0, "scan", i365_count_irq) != 0) 513 return 1; 514 irq_hits = 0; irq_sock = sock; 515 msleep(10); 516 if (irq_hits) { 517 free_irq(irq, i365_count_irq); 518 debug(2, " spurious hit!\n"); 519 return 1; 520 } 521 522 /* Generate one interrupt */ 523 i365_set(sock, I365_CSCINT, I365_CSC_DETECT | (irq << 4)); 524 i365_bset(sock, I365_GENCTL, I365_CTL_SW_IRQ); 525 udelay(1000); 526 527 free_irq(irq, i365_count_irq); 528 529 /* mask all interrupts */ 530 i365_set(sock, I365_CSCINT, 0); 531 debug(2, " hits = %d\n", irq_hits); 532 533 return (irq_hits != 1); 534 } 535 536 static u_int __init isa_scan(u_short sock, u_int mask0) 537 { 538 u_int mask1 = 0; 539 int i; 540 541 #ifdef __alpha__ 542 #define PIC 0x4d0 543 /* Don't probe level-triggered interrupts -- reserved for PCI */ 544 mask0 &= ~(inb(PIC) | (inb(PIC+1) << 8)); 545 #endif 546 547 if (do_scan) { 548 set_bridge_state(sock); 549 i365_set(sock, I365_CSCINT, 0); 550 for (i = 0; i < 16; i++) 551 if ((mask0 & (1 << i)) && (test_irq(sock, i) == 0)) 552 mask1 |= (1 << i); 553 for (i = 0; i < 16; i++) 554 if ((mask1 & (1 << i)) && (test_irq(sock, i) != 0)) 555 mask1 ^= (1 << i); 556 } 557 558 printk(KERN_INFO " ISA irqs ("); 559 if (mask1) { 560 printk("scanned"); 561 } else { 562 /* Fallback: just find interrupts that aren't in use */ 563 for (i = 0; i < 16; i++) 564 if ((mask0 & (1 << i)) && (_check_irq(i, 0) == 0)) 565 mask1 |= (1 << i); 566 printk("default"); 567 /* If scan failed, default to polled status */ 568 if (!cs_irq && (poll_interval == 0)) poll_interval = HZ; 569 } 570 printk(") = "); 571 572 for (i = 0; i < 16; i++) 573 if (mask1 & (1<<i)) 574 printk("%s%d", ((mask1 & ((1<<i)-1)) ? "," : ""), i); 575 if (mask1 == 0) printk("none!"); 576 577 return mask1; 578 } 579 580 /*====================================================================*/ 581 582 /* Time conversion functions */ 583 584 static int to_cycles(int ns) 585 { 586 return ns/cycle_time; 587 } 588 589 /*====================================================================*/ 590 591 static int __init identify(kio_addr_t port, u_short sock) 592 { 593 u_char val; 594 int type = -1; 595 596 /* Use the next free entry in the socket table */ 597 socket[sockets].ioaddr = port; 598 socket[sockets].psock = sock; 599 600 /* Wake up a sleepy Cirrus controller */ 601 if (wakeup) { 602 i365_bclr(sockets, PD67_MISC_CTL_2, PD67_MC2_SUSPEND); 603 /* Pause at least 50 ms */ 604 mdelay(50); 605 } 606 607 if ((val = i365_get(sockets, I365_IDENT)) & 0x70) 608 return -1; 609 switch (val) { 610 case 0x82: 611 type = IS_I82365A; break; 612 case 0x83: 613 type = IS_I82365B; break; 614 case 0x84: 615 type = IS_I82365DF; break; 616 case 0x88: case 0x89: case 0x8a: 617 type = IS_IBM; break; 618 } 619 620 /* Check for Vadem VG-468 chips */ 621 outb(0x0e, port); 622 outb(0x37, port); 623 i365_bset(sockets, VG468_MISC, VG468_MISC_VADEMREV); 624 val = i365_get(sockets, I365_IDENT); 625 if (val & I365_IDENT_VADEM) { 626 i365_bclr(sockets, VG468_MISC, VG468_MISC_VADEMREV); 627 type = ((val & 7) >= 4) ? IS_VG469 : IS_VG468; 628 } 629 630 /* Check for Ricoh chips */ 631 val = i365_get(sockets, RF5C_CHIP_ID); 632 if ((val == RF5C_CHIP_RF5C296) || (val == RF5C_CHIP_RF5C396)) 633 type = IS_RF5Cx96; 634 635 /* Check for Cirrus CL-PD67xx chips */ 636 i365_set(sockets, PD67_CHIP_INFO, 0); 637 val = i365_get(sockets, PD67_CHIP_INFO); 638 if ((val & PD67_INFO_CHIP_ID) == PD67_INFO_CHIP_ID) { 639 val = i365_get(sockets, PD67_CHIP_INFO); 640 if ((val & PD67_INFO_CHIP_ID) == 0) { 641 type = (val & PD67_INFO_SLOTS) ? IS_PD672X : IS_PD6710; 642 i365_set(sockets, PD67_EXT_INDEX, 0xe5); 643 if (i365_get(sockets, PD67_EXT_INDEX) != 0xe5) 644 type = IS_VT83C469; 645 } 646 } 647 return type; 648 } /* identify */ 649 650 /*====================================================================== 651 652 See if a card is present, powered up, in IO mode, and already 653 bound to a (non PC Card) Linux driver. We leave these alone. 654 655 We make an exception for cards that seem to be serial devices. 656 657 ======================================================================*/ 658 659 static int __init is_alive(u_short sock) 660 { 661 u_char stat; 662 kio_addr_t start, stop; 663 664 stat = i365_get(sock, I365_STATUS); 665 start = i365_get_pair(sock, I365_IO(0)+I365_W_START); 666 stop = i365_get_pair(sock, I365_IO(0)+I365_W_STOP); 667 if ((stat & I365_CS_DETECT) && (stat & I365_CS_POWERON) && 668 (i365_get(sock, I365_INTCTL) & I365_PC_IOCARD) && 669 (i365_get(sock, I365_ADDRWIN) & I365_ENA_IO(0)) && 670 ((start & 0xfeef) != 0x02e8)) { 671 if (!request_region(start, stop-start+1, "i82365")) 672 return 1; 673 release_region(start, stop-start+1); 674 } 675 676 return 0; 677 } 678 679 /*====================================================================*/ 680 681 static void __init add_socket(kio_addr_t port, int psock, int type) 682 { 683 socket[sockets].ioaddr = port; 684 socket[sockets].psock = psock; 685 socket[sockets].type = type; 686 socket[sockets].flags = pcic[type].flags; 687 if (is_alive(sockets)) 688 socket[sockets].flags |= IS_ALIVE; 689 sockets++; 690 } 691 692 static void __init add_pcic(int ns, int type) 693 { 694 u_int mask = 0, i, base; 695 int isa_irq = 0; 696 struct i82365_socket *t = &socket[sockets-ns]; 697 698 base = sockets-ns; 699 if (base == 0) printk("\n"); 700 printk(KERN_INFO " %s", pcic[type].name); 701 printk(" ISA-to-PCMCIA at port %#lx ofs 0x%02x", 702 t->ioaddr, t->psock*0x40); 703 printk(", %d socket%s\n", ns, ((ns > 1) ? "s" : "")); 704 705 /* Set host options, build basic interrupt mask */ 706 if (irq_list_count == 0) 707 mask = irq_mask; 708 else 709 for (i = mask = 0; i < irq_list_count; i++) 710 mask |= (1<<irq_list[i]); 711 mask &= I365_MASK & set_bridge_opts(base, ns); 712 /* Scan for ISA interrupts */ 713 mask = isa_scan(base, mask); 714 715 /* Poll if only two interrupts available */ 716 if (!poll_interval) { 717 u_int tmp = (mask & 0xff20); 718 tmp = tmp & (tmp-1); 719 if ((tmp & (tmp-1)) == 0) 720 poll_interval = HZ; 721 } 722 /* Only try an ISA cs_irq if this is the first controller */ 723 if (!grab_irq && (cs_irq || !poll_interval)) { 724 /* Avoid irq 12 unless it is explicitly requested */ 725 u_int cs_mask = mask & ((cs_irq) ? (1<<cs_irq) : ~(1<<12)); 726 for (cs_irq = 15; cs_irq > 0; cs_irq--) 727 if ((cs_mask & (1 << cs_irq)) && 728 (_check_irq(cs_irq, 0) == 0)) 729 break; 730 if (cs_irq) { 731 grab_irq = 1; 732 isa_irq = cs_irq; 733 printk(" status change on irq %d\n", cs_irq); 734 } 735 } 736 737 if (!isa_irq) { 738 if (poll_interval == 0) 739 poll_interval = HZ; 740 printk(" polling interval = %d ms\n", 741 poll_interval * 1000 / HZ); 742 743 } 744 745 /* Update socket interrupt information, capabilities */ 746 for (i = 0; i < ns; i++) { 747 t[i].socket.features |= SS_CAP_PCCARD; 748 t[i].socket.map_size = 0x1000; 749 t[i].socket.irq_mask = mask; 750 t[i].cs_irq = isa_irq; 751 } 752 753 } /* add_pcic */ 754 755 /*====================================================================*/ 756 757 #ifdef CONFIG_PNP 758 static struct isapnp_device_id id_table[] __initdata = { 759 { ISAPNP_ANY_ID, ISAPNP_ANY_ID, ISAPNP_VENDOR('P', 'N', 'P'), 760 ISAPNP_FUNCTION(0x0e00), (unsigned long) "Intel 82365-Compatible" }, 761 { ISAPNP_ANY_ID, ISAPNP_ANY_ID, ISAPNP_VENDOR('P', 'N', 'P'), 762 ISAPNP_FUNCTION(0x0e01), (unsigned long) "Cirrus Logic CL-PD6720" }, 763 { ISAPNP_ANY_ID, ISAPNP_ANY_ID, ISAPNP_VENDOR('P', 'N', 'P'), 764 ISAPNP_FUNCTION(0x0e02), (unsigned long) "VLSI VL82C146" }, 765 { 0 } 766 }; 767 MODULE_DEVICE_TABLE(isapnp, id_table); 768 769 static struct pnp_dev *i82365_pnpdev; 770 #endif 771 772 static void __init isa_probe(void) 773 { 774 int i, j, sock, k, ns, id; 775 kio_addr_t port; 776 #ifdef CONFIG_PNP 777 struct isapnp_device_id *devid; 778 struct pnp_dev *dev; 779 780 for (devid = id_table; devid->vendor; devid++) { 781 if ((dev = pnp_find_dev(NULL, devid->vendor, devid->function, NULL))) { 782 783 if (pnp_device_attach(dev) < 0) 784 continue; 785 786 if (pnp_activate_dev(dev) < 0) { 787 printk("activate failed\n"); 788 pnp_device_detach(dev); 789 break; 790 } 791 792 if (!pnp_port_valid(dev, 0)) { 793 printk("invalid resources ?\n"); 794 pnp_device_detach(dev); 795 break; 796 } 797 i365_base = pnp_port_start(dev, 0); 798 i82365_pnpdev = dev; 799 break; 800 } 801 } 802 #endif 803 804 if (!request_region(i365_base, 2, "i82365")) { 805 if (sockets == 0) 806 printk("port conflict at %#lx\n", i365_base); 807 return; 808 } 809 810 id = identify(i365_base, 0); 811 if ((id == IS_I82365DF) && (identify(i365_base, 1) != id)) { 812 for (i = 0; i < 4; i++) { 813 if (i == ignore) continue; 814 port = i365_base + ((i & 1) << 2) + ((i & 2) << 1); 815 sock = (i & 1) << 1; 816 if (identify(port, sock) == IS_I82365DF) { 817 add_socket(port, sock, IS_VLSI); 818 add_pcic(1, IS_VLSI); 819 } 820 } 821 } else { 822 for (i = 0; i < 8; i += 2) { 823 if (sockets && !extra_sockets && (i == 4)) 824 break; 825 port = i365_base + 2*(i>>2); 826 sock = (i & 3); 827 id = identify(port, sock); 828 if (id < 0) continue; 829 830 for (j = ns = 0; j < 2; j++) { 831 /* Does the socket exist? */ 832 if ((ignore == i+j) || (identify(port, sock+j) < 0)) 833 continue; 834 /* Check for bad socket decode */ 835 for (k = 0; k <= sockets; k++) 836 i365_set(k, I365_MEM(0)+I365_W_OFF, k); 837 for (k = 0; k <= sockets; k++) 838 if (i365_get(k, I365_MEM(0)+I365_W_OFF) != k) 839 break; 840 if (k <= sockets) break; 841 add_socket(port, sock+j, id); ns++; 842 } 843 if (ns != 0) add_pcic(ns, id); 844 } 845 } 846 } 847 848 /*====================================================================*/ 849 850 static irqreturn_t pcic_interrupt(int irq, void *dev, 851 struct pt_regs *regs) 852 { 853 int i, j, csc; 854 u_int events, active; 855 u_long flags = 0; 856 int handled = 0; 857 858 debug(4, "pcic_interrupt(%d)\n", irq); 859 860 for (j = 0; j < 20; j++) { 861 active = 0; 862 for (i = 0; i < sockets; i++) { 863 if (socket[i].cs_irq != irq) 864 continue; 865 handled = 1; 866 ISA_LOCK(i, flags); 867 csc = i365_get(i, I365_CSC); 868 if ((csc == 0) || (i365_get(i, I365_IDENT) & 0x70)) { 869 ISA_UNLOCK(i, flags); 870 continue; 871 } 872 events = (csc & I365_CSC_DETECT) ? SS_DETECT : 0; 873 874 if (i365_get(i, I365_INTCTL) & I365_PC_IOCARD) 875 events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0; 876 else { 877 events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0; 878 events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0; 879 events |= (csc & I365_CSC_READY) ? SS_READY : 0; 880 } 881 ISA_UNLOCK(i, flags); 882 debug(2, "socket %d event 0x%02x\n", i, events); 883 884 if (events) 885 pcmcia_parse_events(&socket[i].socket, events); 886 887 active |= events; 888 } 889 if (!active) break; 890 } 891 if (j == 20) 892 printk(KERN_NOTICE "i82365: infinite loop in interrupt handler\n"); 893 894 debug(4, "interrupt done\n"); 895 return IRQ_RETVAL(handled); 896 } /* pcic_interrupt */ 897 898 static void pcic_interrupt_wrapper(u_long data) 899 { 900 pcic_interrupt(0, NULL, NULL); 901 poll_timer.expires = jiffies + poll_interval; 902 add_timer(&poll_timer); 903 } 904 905 /*====================================================================*/ 906 907 static int i365_get_status(u_short sock, u_int *value) 908 { 909 u_int status; 910 911 status = i365_get(sock, I365_STATUS); 912 *value = ((status & I365_CS_DETECT) == I365_CS_DETECT) 913 ? SS_DETECT : 0; 914 915 if (i365_get(sock, I365_INTCTL) & I365_PC_IOCARD) 916 *value |= (status & I365_CS_STSCHG) ? 0 : SS_STSCHG; 917 else { 918 *value |= (status & I365_CS_BVD1) ? 0 : SS_BATDEAD; 919 *value |= (status & I365_CS_BVD2) ? 0 : SS_BATWARN; 920 } 921 *value |= (status & I365_CS_WRPROT) ? SS_WRPROT : 0; 922 *value |= (status & I365_CS_READY) ? SS_READY : 0; 923 *value |= (status & I365_CS_POWERON) ? SS_POWERON : 0; 924 925 if (socket[sock].type == IS_VG469) { 926 status = i365_get(sock, VG469_VSENSE); 927 if (socket[sock].psock & 1) { 928 *value |= (status & VG469_VSENSE_B_VS1) ? 0 : SS_3VCARD; 929 *value |= (status & VG469_VSENSE_B_VS2) ? 0 : SS_XVCARD; 930 } else { 931 *value |= (status & VG469_VSENSE_A_VS1) ? 0 : SS_3VCARD; 932 *value |= (status & VG469_VSENSE_A_VS2) ? 0 : SS_XVCARD; 933 } 934 } 935 936 debug(1, "GetStatus(%d) = %#4.4x\n", sock, *value); 937 return 0; 938 } /* i365_get_status */ 939 940 /*====================================================================*/ 941 942 static int i365_set_socket(u_short sock, socket_state_t *state) 943 { 944 struct i82365_socket *t = &socket[sock]; 945 u_char reg; 946 947 debug(1, "SetSocket(%d, flags %#3.3x, Vcc %d, Vpp %d, " 948 "io_irq %d, csc_mask %#2.2x)\n", sock, state->flags, 949 state->Vcc, state->Vpp, state->io_irq, state->csc_mask); 950 951 /* First set global controller options */ 952 set_bridge_state(sock); 953 954 /* IO card, RESET flag, IO interrupt */ 955 reg = t->intr; 956 reg |= state->io_irq; 957 reg |= (state->flags & SS_RESET) ? 0 : I365_PC_RESET; 958 reg |= (state->flags & SS_IOCARD) ? I365_PC_IOCARD : 0; 959 i365_set(sock, I365_INTCTL, reg); 960 961 reg = I365_PWR_NORESET; 962 if (state->flags & SS_PWR_AUTO) reg |= I365_PWR_AUTO; 963 if (state->flags & SS_OUTPUT_ENA) reg |= I365_PWR_OUT; 964 965 if (t->flags & IS_CIRRUS) { 966 if (state->Vpp != 0) { 967 if (state->Vpp == 120) 968 reg |= I365_VPP1_12V; 969 else if (state->Vpp == state->Vcc) 970 reg |= I365_VPP1_5V; 971 else return -EINVAL; 972 } 973 if (state->Vcc != 0) { 974 reg |= I365_VCC_5V; 975 if (state->Vcc == 33) 976 i365_bset(sock, PD67_MISC_CTL_1, PD67_MC1_VCC_3V); 977 else if (state->Vcc == 50) 978 i365_bclr(sock, PD67_MISC_CTL_1, PD67_MC1_VCC_3V); 979 else return -EINVAL; 980 } 981 } else if (t->flags & IS_VG_PWR) { 982 if (state->Vpp != 0) { 983 if (state->Vpp == 120) 984 reg |= I365_VPP1_12V; 985 else if (state->Vpp == state->Vcc) 986 reg |= I365_VPP1_5V; 987 else return -EINVAL; 988 } 989 if (state->Vcc != 0) { 990 reg |= I365_VCC_5V; 991 if (state->Vcc == 33) 992 i365_bset(sock, VG469_VSELECT, VG469_VSEL_VCC); 993 else if (state->Vcc == 50) 994 i365_bclr(sock, VG469_VSELECT, VG469_VSEL_VCC); 995 else return -EINVAL; 996 } 997 } else if (t->flags & IS_DF_PWR) { 998 switch (state->Vcc) { 999 case 0: break; 1000 case 33: reg |= I365_VCC_3V; break; 1001 case 50: reg |= I365_VCC_5V; break; 1002 default: return -EINVAL; 1003 } 1004 switch (state->Vpp) { 1005 case 0: break; 1006 case 50: reg |= I365_VPP1_5V; break; 1007 case 120: reg |= I365_VPP1_12V; break; 1008 default: return -EINVAL; 1009 } 1010 } else { 1011 switch (state->Vcc) { 1012 case 0: break; 1013 case 50: reg |= I365_VCC_5V; break; 1014 default: return -EINVAL; 1015 } 1016 switch (state->Vpp) { 1017 case 0: break; 1018 case 50: reg |= I365_VPP1_5V | I365_VPP2_5V; break; 1019 case 120: reg |= I365_VPP1_12V | I365_VPP2_12V; break; 1020 default: return -EINVAL; 1021 } 1022 } 1023 1024 if (reg != i365_get(sock, I365_POWER)) 1025 i365_set(sock, I365_POWER, reg); 1026 1027 /* Chipset-specific functions */ 1028 if (t->flags & IS_CIRRUS) { 1029 /* Speaker control */ 1030 i365_bflip(sock, PD67_MISC_CTL_1, PD67_MC1_SPKR_ENA, 1031 state->flags & SS_SPKR_ENA); 1032 } 1033 1034 /* Card status change interrupt mask */ 1035 reg = t->cs_irq << 4; 1036 if (state->csc_mask & SS_DETECT) reg |= I365_CSC_DETECT; 1037 if (state->flags & SS_IOCARD) { 1038 if (state->csc_mask & SS_STSCHG) reg |= I365_CSC_STSCHG; 1039 } else { 1040 if (state->csc_mask & SS_BATDEAD) reg |= I365_CSC_BVD1; 1041 if (state->csc_mask & SS_BATWARN) reg |= I365_CSC_BVD2; 1042 if (state->csc_mask & SS_READY) reg |= I365_CSC_READY; 1043 } 1044 i365_set(sock, I365_CSCINT, reg); 1045 i365_get(sock, I365_CSC); 1046 1047 return 0; 1048 } /* i365_set_socket */ 1049 1050 /*====================================================================*/ 1051 1052 static int i365_set_io_map(u_short sock, struct pccard_io_map *io) 1053 { 1054 u_char map, ioctl; 1055 1056 debug(1, "SetIOMap(%d, %d, %#2.2x, %d ns, " 1057 "%#lx-%#lx)\n", sock, io->map, io->flags, 1058 io->speed, io->start, io->stop); 1059 map = io->map; 1060 if ((map > 1) || (io->start > 0xffff) || (io->stop > 0xffff) || 1061 (io->stop < io->start)) return -EINVAL; 1062 /* Turn off the window before changing anything */ 1063 if (i365_get(sock, I365_ADDRWIN) & I365_ENA_IO(map)) 1064 i365_bclr(sock, I365_ADDRWIN, I365_ENA_IO(map)); 1065 i365_set_pair(sock, I365_IO(map)+I365_W_START, io->start); 1066 i365_set_pair(sock, I365_IO(map)+I365_W_STOP, io->stop); 1067 ioctl = i365_get(sock, I365_IOCTL) & ~I365_IOCTL_MASK(map); 1068 if (io->speed) ioctl |= I365_IOCTL_WAIT(map); 1069 if (io->flags & MAP_0WS) ioctl |= I365_IOCTL_0WS(map); 1070 if (io->flags & MAP_16BIT) ioctl |= I365_IOCTL_16BIT(map); 1071 if (io->flags & MAP_AUTOSZ) ioctl |= I365_IOCTL_IOCS16(map); 1072 i365_set(sock, I365_IOCTL, ioctl); 1073 /* Turn on the window if necessary */ 1074 if (io->flags & MAP_ACTIVE) 1075 i365_bset(sock, I365_ADDRWIN, I365_ENA_IO(map)); 1076 return 0; 1077 } /* i365_set_io_map */ 1078 1079 /*====================================================================*/ 1080 1081 static int i365_set_mem_map(u_short sock, struct pccard_mem_map *mem) 1082 { 1083 u_short base, i; 1084 u_char map; 1085 1086 debug(1, "SetMemMap(%d, %d, %#2.2x, %d ns, %#lx-%#lx, " 1087 "%#x)\n", sock, mem->map, mem->flags, mem->speed, 1088 mem->res->start, mem->res->end, mem->card_start); 1089 1090 map = mem->map; 1091 if ((map > 4) || (mem->card_start > 0x3ffffff) || 1092 (mem->res->start > mem->res->end) || (mem->speed > 1000)) 1093 return -EINVAL; 1094 if ((mem->res->start > 0xffffff) || (mem->res->end > 0xffffff)) 1095 return -EINVAL; 1096 1097 /* Turn off the window before changing anything */ 1098 if (i365_get(sock, I365_ADDRWIN) & I365_ENA_MEM(map)) 1099 i365_bclr(sock, I365_ADDRWIN, I365_ENA_MEM(map)); 1100 1101 base = I365_MEM(map); 1102 i = (mem->res->start >> 12) & 0x0fff; 1103 if (mem->flags & MAP_16BIT) i |= I365_MEM_16BIT; 1104 if (mem->flags & MAP_0WS) i |= I365_MEM_0WS; 1105 i365_set_pair(sock, base+I365_W_START, i); 1106 1107 i = (mem->res->end >> 12) & 0x0fff; 1108 switch (to_cycles(mem->speed)) { 1109 case 0: break; 1110 case 1: i |= I365_MEM_WS0; break; 1111 case 2: i |= I365_MEM_WS1; break; 1112 default: i |= I365_MEM_WS1 | I365_MEM_WS0; break; 1113 } 1114 i365_set_pair(sock, base+I365_W_STOP, i); 1115 1116 i = ((mem->card_start - mem->res->start) >> 12) & 0x3fff; 1117 if (mem->flags & MAP_WRPROT) i |= I365_MEM_WRPROT; 1118 if (mem->flags & MAP_ATTRIB) i |= I365_MEM_REG; 1119 i365_set_pair(sock, base+I365_W_OFF, i); 1120 1121 /* Turn on the window if necessary */ 1122 if (mem->flags & MAP_ACTIVE) 1123 i365_bset(sock, I365_ADDRWIN, I365_ENA_MEM(map)); 1124 return 0; 1125 } /* i365_set_mem_map */ 1126 1127 #if 0 /* driver model ordering issue */ 1128 /*====================================================================== 1129 1130 Routines for accessing socket information and register dumps via 1131 /sys/class/pcmcia_socket/... 1132 1133 ======================================================================*/ 1134 1135 static ssize_t show_info(struct class_device *class_dev, char *buf) 1136 { 1137 struct i82365_socket *s = container_of(class_dev, struct i82365_socket, socket.dev); 1138 return sprintf(buf, "type: %s\npsock: %d\n", 1139 pcic[s->type].name, s->psock); 1140 } 1141 1142 static ssize_t show_exca(struct class_device *class_dev, char *buf) 1143 { 1144 struct i82365_socket *s = container_of(class_dev, struct i82365_socket, socket.dev); 1145 unsigned short sock; 1146 int i; 1147 ssize_t ret = 0; 1148 unsigned long flags = 0; 1149 1150 sock = s->number; 1151 1152 ISA_LOCK(sock, flags); 1153 for (i = 0; i < 0x40; i += 4) { 1154 ret += sprintf(buf, "%02x %02x %02x %02x%s", 1155 i365_get(sock,i), i365_get(sock,i+1), 1156 i365_get(sock,i+2), i365_get(sock,i+3), 1157 ((i % 16) == 12) ? "\n" : " "); 1158 buf += ret; 1159 } 1160 ISA_UNLOCK(sock, flags); 1161 1162 return ret; 1163 } 1164 1165 static CLASS_DEVICE_ATTR(exca, S_IRUGO, show_exca, NULL); 1166 static CLASS_DEVICE_ATTR(info, S_IRUGO, show_info, NULL); 1167 #endif 1168 1169 /*====================================================================*/ 1170 1171 /* this is horribly ugly... proper locking needs to be done here at 1172 * some time... */ 1173 #define LOCKED(x) do { \ 1174 int retval; \ 1175 unsigned long flags; \ 1176 spin_lock_irqsave(&isa_lock, flags); \ 1177 retval = x; \ 1178 spin_unlock_irqrestore(&isa_lock, flags); \ 1179 return retval; \ 1180 } while (0) 1181 1182 1183 static int pcic_get_status(struct pcmcia_socket *s, u_int *value) 1184 { 1185 unsigned int sock = container_of(s, struct i82365_socket, socket)->number; 1186 1187 if (socket[sock].flags & IS_ALIVE) { 1188 *value = 0; 1189 return -EINVAL; 1190 } 1191 1192 LOCKED(i365_get_status(sock, value)); 1193 } 1194 1195 static int pcic_set_socket(struct pcmcia_socket *s, socket_state_t *state) 1196 { 1197 unsigned int sock = container_of(s, struct i82365_socket, socket)->number; 1198 1199 if (socket[sock].flags & IS_ALIVE) 1200 return -EINVAL; 1201 1202 LOCKED(i365_set_socket(sock, state)); 1203 } 1204 1205 static int pcic_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io) 1206 { 1207 unsigned int sock = container_of(s, struct i82365_socket, socket)->number; 1208 if (socket[sock].flags & IS_ALIVE) 1209 return -EINVAL; 1210 1211 LOCKED(i365_set_io_map(sock, io)); 1212 } 1213 1214 static int pcic_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *mem) 1215 { 1216 unsigned int sock = container_of(s, struct i82365_socket, socket)->number; 1217 if (socket[sock].flags & IS_ALIVE) 1218 return -EINVAL; 1219 1220 LOCKED(i365_set_mem_map(sock, mem)); 1221 } 1222 1223 static int pcic_init(struct pcmcia_socket *s) 1224 { 1225 int i; 1226 struct resource res = { .start = 0, .end = 0x1000 }; 1227 pccard_io_map io = { 0, 0, 0, 0, 1 }; 1228 pccard_mem_map mem = { .res = &res, }; 1229 1230 for (i = 0; i < 2; i++) { 1231 io.map = i; 1232 pcic_set_io_map(s, &io); 1233 } 1234 for (i = 0; i < 5; i++) { 1235 mem.map = i; 1236 pcic_set_mem_map(s, &mem); 1237 } 1238 return 0; 1239 } 1240 1241 static struct pccard_operations pcic_operations = { 1242 .init = pcic_init, 1243 .get_status = pcic_get_status, 1244 .set_socket = pcic_set_socket, 1245 .set_io_map = pcic_set_io_map, 1246 .set_mem_map = pcic_set_mem_map, 1247 }; 1248 1249 /*====================================================================*/ 1250 1251 static struct device_driver i82365_driver = { 1252 .name = "i82365", 1253 .bus = &platform_bus_type, 1254 .suspend = pcmcia_socket_dev_suspend, 1255 .resume = pcmcia_socket_dev_resume, 1256 }; 1257 1258 static struct platform_device *i82365_device; 1259 1260 static int __init init_i82365(void) 1261 { 1262 int i, ret; 1263 1264 ret = driver_register(&i82365_driver); 1265 if (ret) 1266 return ret; 1267 1268 i82365_device = platform_device_alloc("i82365", 0); 1269 if (i82365_device) { 1270 ret = platform_device_add(i82365_device); 1271 if (ret) 1272 platform_device_put(i82365_device); 1273 } else 1274 ret = -ENOMEM; 1275 1276 if (ret) { 1277 driver_unregister(&i82365_driver); 1278 return ret; 1279 } 1280 1281 printk(KERN_INFO "Intel ISA PCIC probe: "); 1282 sockets = 0; 1283 1284 isa_probe(); 1285 1286 if (sockets == 0) { 1287 printk("not found.\n"); 1288 platform_device_unregister(i82365_device); 1289 release_region(i365_base, 2); 1290 driver_unregister(&i82365_driver); 1291 return -ENODEV; 1292 } 1293 1294 /* Set up interrupt handler(s) */ 1295 if (grab_irq != 0) 1296 request_irq(cs_irq, pcic_interrupt, 0, "i82365", pcic_interrupt); 1297 1298 /* register sockets with the pcmcia core */ 1299 for (i = 0; i < sockets; i++) { 1300 socket[i].socket.dev.dev = &i82365_device->dev; 1301 socket[i].socket.ops = &pcic_operations; 1302 socket[i].socket.resource_ops = &pccard_nonstatic_ops; 1303 socket[i].socket.owner = THIS_MODULE; 1304 socket[i].number = i; 1305 ret = pcmcia_register_socket(&socket[i].socket); 1306 if (!ret) 1307 socket[i].flags |= IS_REGISTERED; 1308 1309 #if 0 /* driver model ordering issue */ 1310 class_device_create_file(&socket[i].socket.dev, 1311 &class_device_attr_info); 1312 class_device_create_file(&socket[i].socket.dev, 1313 &class_device_attr_exca); 1314 #endif 1315 } 1316 1317 /* Finally, schedule a polling interrupt */ 1318 if (poll_interval != 0) { 1319 poll_timer.function = pcic_interrupt_wrapper; 1320 poll_timer.data = 0; 1321 init_timer(&poll_timer); 1322 poll_timer.expires = jiffies + poll_interval; 1323 add_timer(&poll_timer); 1324 } 1325 1326 return 0; 1327 1328 } /* init_i82365 */ 1329 1330 static void __exit exit_i82365(void) 1331 { 1332 int i; 1333 1334 for (i = 0; i < sockets; i++) { 1335 if (socket[i].flags & IS_REGISTERED) 1336 pcmcia_unregister_socket(&socket[i].socket); 1337 } 1338 platform_device_unregister(i82365_device); 1339 if (poll_interval != 0) 1340 del_timer_sync(&poll_timer); 1341 if (grab_irq != 0) 1342 free_irq(cs_irq, pcic_interrupt); 1343 for (i = 0; i < sockets; i++) { 1344 /* Turn off all interrupt sources! */ 1345 i365_set(i, I365_CSCINT, 0); 1346 release_region(socket[i].ioaddr, 2); 1347 } 1348 release_region(i365_base, 2); 1349 #ifdef CONFIG_PNP 1350 if (i82365_pnpdev) 1351 pnp_disable_dev(i82365_pnpdev); 1352 #endif 1353 driver_unregister(&i82365_driver); 1354 } /* exit_i82365 */ 1355 1356 module_init(init_i82365); 1357 module_exit(exit_i82365); 1358 MODULE_LICENSE("Dual MPL/GPL"); 1359 /*====================================================================*/ 1360