1 /* 2 * Driver for Intel I82092AA PCI-PCMCIA bridge. 3 * 4 * (C) 2001 Red Hat, Inc. 5 * 6 * Author: Arjan Van De Ven <arjanv@redhat.com> 7 * Loosly based on i82365.c from the pcmcia-cs package 8 */ 9 10 #include <linux/kernel.h> 11 #include <linux/module.h> 12 #include <linux/pci.h> 13 #include <linux/init.h> 14 #include <linux/workqueue.h> 15 #include <linux/interrupt.h> 16 #include <linux/device.h> 17 18 #include <pcmcia/ss.h> 19 #include <pcmcia/cs.h> 20 21 #include <asm/system.h> 22 #include <asm/io.h> 23 24 #include "i82092aa.h" 25 #include "i82365.h" 26 27 MODULE_LICENSE("GPL"); 28 29 /* PCI core routines */ 30 static struct pci_device_id i82092aa_pci_ids[] = { 31 { 32 .vendor = PCI_VENDOR_ID_INTEL, 33 .device = PCI_DEVICE_ID_INTEL_82092AA_0, 34 .subvendor = PCI_ANY_ID, 35 .subdevice = PCI_ANY_ID, 36 }, 37 {} 38 }; 39 MODULE_DEVICE_TABLE(pci, i82092aa_pci_ids); 40 41 static struct pci_driver i82092aa_pci_driver = { 42 .name = "i82092aa", 43 .id_table = i82092aa_pci_ids, 44 .probe = i82092aa_pci_probe, 45 .remove = __devexit_p(i82092aa_pci_remove), 46 }; 47 48 49 /* the pccard structure and its functions */ 50 static struct pccard_operations i82092aa_operations = { 51 .init = i82092aa_init, 52 .get_status = i82092aa_get_status, 53 .set_socket = i82092aa_set_socket, 54 .set_io_map = i82092aa_set_io_map, 55 .set_mem_map = i82092aa_set_mem_map, 56 }; 57 58 /* The card can do upto 4 sockets, allocate a structure for each of them */ 59 60 struct socket_info { 61 int number; 62 int card_state; /* 0 = no socket, 63 1 = empty socket, 64 2 = card but not initialized, 65 3 = operational card */ 66 unsigned int io_base; /* base io address of the socket */ 67 68 struct pcmcia_socket socket; 69 struct pci_dev *dev; /* The PCI device for the socket */ 70 }; 71 72 #define MAX_SOCKETS 4 73 static struct socket_info sockets[MAX_SOCKETS]; 74 static int socket_count; /* shortcut */ 75 76 77 static int __devinit i82092aa_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) 78 { 79 unsigned char configbyte; 80 int i, ret; 81 82 enter("i82092aa_pci_probe"); 83 84 if ((ret = pci_enable_device(dev))) 85 return ret; 86 87 pci_read_config_byte(dev, 0x40, &configbyte); /* PCI Configuration Control */ 88 switch(configbyte&6) { 89 case 0: 90 socket_count = 2; 91 break; 92 case 2: 93 socket_count = 1; 94 break; 95 case 4: 96 case 6: 97 socket_count = 4; 98 break; 99 100 default: 101 printk(KERN_ERR "i82092aa: Oops, you did something we didn't think of.\n"); 102 ret = -EIO; 103 goto err_out_disable; 104 } 105 printk(KERN_INFO "i82092aa: configured as a %d socket device.\n", socket_count); 106 107 if (!request_region(pci_resource_start(dev, 0), 2, "i82092aa")) { 108 ret = -EBUSY; 109 goto err_out_disable; 110 } 111 112 for (i = 0;i<socket_count;i++) { 113 sockets[i].card_state = 1; /* 1 = present but empty */ 114 sockets[i].io_base = pci_resource_start(dev, 0); 115 sockets[i].socket.features |= SS_CAP_PCCARD; 116 sockets[i].socket.map_size = 0x1000; 117 sockets[i].socket.irq_mask = 0; 118 sockets[i].socket.pci_irq = dev->irq; 119 sockets[i].socket.cb_dev = dev; 120 sockets[i].socket.owner = THIS_MODULE; 121 122 sockets[i].number = i; 123 124 if (card_present(i)) { 125 sockets[i].card_state = 3; 126 dprintk(KERN_DEBUG "i82092aa: slot %i is occupied\n",i); 127 } else { 128 dprintk(KERN_DEBUG "i82092aa: slot %i is vacant\n",i); 129 } 130 } 131 132 /* Now, specifiy that all interrupts are to be done as PCI interrupts */ 133 configbyte = 0xFF; /* bitmask, one bit per event, 1 = PCI interrupt, 0 = ISA interrupt */ 134 pci_write_config_byte(dev, 0x50, configbyte); /* PCI Interrupt Routing Register */ 135 136 /* Register the interrupt handler */ 137 dprintk(KERN_DEBUG "Requesting interrupt %i \n",dev->irq); 138 if ((ret = request_irq(dev->irq, i82092aa_interrupt, IRQF_SHARED, "i82092aa", i82092aa_interrupt))) { 139 printk(KERN_ERR "i82092aa: Failed to register IRQ %d, aborting\n", dev->irq); 140 goto err_out_free_res; 141 } 142 143 pci_set_drvdata(dev, &sockets[i].socket); 144 145 for (i = 0; i<socket_count; i++) { 146 sockets[i].socket.dev.parent = &dev->dev; 147 sockets[i].socket.ops = &i82092aa_operations; 148 sockets[i].socket.resource_ops = &pccard_nonstatic_ops; 149 ret = pcmcia_register_socket(&sockets[i].socket); 150 if (ret) { 151 goto err_out_free_sockets; 152 } 153 } 154 155 leave("i82092aa_pci_probe"); 156 return 0; 157 158 err_out_free_sockets: 159 if (i) { 160 for (i--;i>=0;i--) { 161 pcmcia_unregister_socket(&sockets[i].socket); 162 } 163 } 164 free_irq(dev->irq, i82092aa_interrupt); 165 err_out_free_res: 166 release_region(pci_resource_start(dev, 0), 2); 167 err_out_disable: 168 pci_disable_device(dev); 169 return ret; 170 } 171 172 static void __devexit i82092aa_pci_remove(struct pci_dev *dev) 173 { 174 struct pcmcia_socket *socket = pci_get_drvdata(dev); 175 176 enter("i82092aa_pci_remove"); 177 178 free_irq(dev->irq, i82092aa_interrupt); 179 180 if (socket) 181 pcmcia_unregister_socket(socket); 182 183 leave("i82092aa_pci_remove"); 184 } 185 186 static DEFINE_SPINLOCK(port_lock); 187 188 /* basic value read/write functions */ 189 190 static unsigned char indirect_read(int socket, unsigned short reg) 191 { 192 unsigned short int port; 193 unsigned char val; 194 unsigned long flags; 195 spin_lock_irqsave(&port_lock,flags); 196 reg += socket * 0x40; 197 port = sockets[socket].io_base; 198 outb(reg,port); 199 val = inb(port+1); 200 spin_unlock_irqrestore(&port_lock,flags); 201 return val; 202 } 203 204 #if 0 205 static unsigned short indirect_read16(int socket, unsigned short reg) 206 { 207 unsigned short int port; 208 unsigned short tmp; 209 unsigned long flags; 210 spin_lock_irqsave(&port_lock,flags); 211 reg = reg + socket * 0x40; 212 port = sockets[socket].io_base; 213 outb(reg,port); 214 tmp = inb(port+1); 215 reg++; 216 outb(reg,port); 217 tmp = tmp | (inb(port+1)<<8); 218 spin_unlock_irqrestore(&port_lock,flags); 219 return tmp; 220 } 221 #endif 222 223 static void indirect_write(int socket, unsigned short reg, unsigned char value) 224 { 225 unsigned short int port; 226 unsigned long flags; 227 spin_lock_irqsave(&port_lock,flags); 228 reg = reg + socket * 0x40; 229 port = sockets[socket].io_base; 230 outb(reg,port); 231 outb(value,port+1); 232 spin_unlock_irqrestore(&port_lock,flags); 233 } 234 235 static void indirect_setbit(int socket, unsigned short reg, unsigned char mask) 236 { 237 unsigned short int port; 238 unsigned char val; 239 unsigned long flags; 240 spin_lock_irqsave(&port_lock,flags); 241 reg = reg + socket * 0x40; 242 port = sockets[socket].io_base; 243 outb(reg,port); 244 val = inb(port+1); 245 val |= mask; 246 outb(reg,port); 247 outb(val,port+1); 248 spin_unlock_irqrestore(&port_lock,flags); 249 } 250 251 252 static void indirect_resetbit(int socket, unsigned short reg, unsigned char mask) 253 { 254 unsigned short int port; 255 unsigned char val; 256 unsigned long flags; 257 spin_lock_irqsave(&port_lock,flags); 258 reg = reg + socket * 0x40; 259 port = sockets[socket].io_base; 260 outb(reg,port); 261 val = inb(port+1); 262 val &= ~mask; 263 outb(reg,port); 264 outb(val,port+1); 265 spin_unlock_irqrestore(&port_lock,flags); 266 } 267 268 static void indirect_write16(int socket, unsigned short reg, unsigned short value) 269 { 270 unsigned short int port; 271 unsigned char val; 272 unsigned long flags; 273 spin_lock_irqsave(&port_lock,flags); 274 reg = reg + socket * 0x40; 275 port = sockets[socket].io_base; 276 277 outb(reg,port); 278 val = value & 255; 279 outb(val,port+1); 280 281 reg++; 282 283 outb(reg,port); 284 val = value>>8; 285 outb(val,port+1); 286 spin_unlock_irqrestore(&port_lock,flags); 287 } 288 289 /* simple helper functions */ 290 /* External clock time, in nanoseconds. 120 ns = 8.33 MHz */ 291 static int cycle_time = 120; 292 293 static int to_cycles(int ns) 294 { 295 if (cycle_time!=0) 296 return ns/cycle_time; 297 else 298 return 0; 299 } 300 301 302 /* Interrupt handler functionality */ 303 304 static irqreturn_t i82092aa_interrupt(int irq, void *dev) 305 { 306 int i; 307 int loopcount = 0; 308 int handled = 0; 309 310 unsigned int events, active=0; 311 312 /* enter("i82092aa_interrupt");*/ 313 314 while (1) { 315 loopcount++; 316 if (loopcount>20) { 317 printk(KERN_ERR "i82092aa: infinite eventloop in interrupt \n"); 318 break; 319 } 320 321 active = 0; 322 323 for (i=0;i<socket_count;i++) { 324 int csc; 325 if (sockets[i].card_state==0) /* Inactive socket, should not happen */ 326 continue; 327 328 csc = indirect_read(i,I365_CSC); /* card status change register */ 329 330 if (csc==0) /* no events on this socket */ 331 continue; 332 handled = 1; 333 events = 0; 334 335 if (csc & I365_CSC_DETECT) { 336 events |= SS_DETECT; 337 printk("Card detected in socket %i!\n",i); 338 } 339 340 if (indirect_read(i,I365_INTCTL) & I365_PC_IOCARD) { 341 /* For IO/CARDS, bit 0 means "read the card" */ 342 events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0; 343 } else { 344 /* Check for battery/ready events */ 345 events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0; 346 events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0; 347 events |= (csc & I365_CSC_READY) ? SS_READY : 0; 348 } 349 350 if (events) { 351 pcmcia_parse_events(&sockets[i].socket, events); 352 } 353 active |= events; 354 } 355 356 if (active==0) /* no more events to handle */ 357 break; 358 359 } 360 return IRQ_RETVAL(handled); 361 /* leave("i82092aa_interrupt");*/ 362 } 363 364 365 366 /* socket functions */ 367 368 static int card_present(int socketno) 369 { 370 unsigned int val; 371 enter("card_present"); 372 373 if ((socketno<0) || (socketno >= MAX_SOCKETS)) 374 return 0; 375 if (sockets[socketno].io_base == 0) 376 return 0; 377 378 379 val = indirect_read(socketno, 1); /* Interface status register */ 380 if ((val&12)==12) { 381 leave("card_present 1"); 382 return 1; 383 } 384 385 leave("card_present 0"); 386 return 0; 387 } 388 389 static void set_bridge_state(int sock) 390 { 391 enter("set_bridge_state"); 392 indirect_write(sock, I365_GBLCTL,0x00); 393 indirect_write(sock, I365_GENCTL,0x00); 394 395 indirect_setbit(sock, I365_INTCTL,0x08); 396 leave("set_bridge_state"); 397 } 398 399 400 401 402 403 404 static int i82092aa_init(struct pcmcia_socket *sock) 405 { 406 int i; 407 struct resource res = { .start = 0, .end = 0x0fff }; 408 pccard_io_map io = { 0, 0, 0, 0, 1 }; 409 pccard_mem_map mem = { .res = &res, }; 410 411 enter("i82092aa_init"); 412 413 for (i = 0; i < 2; i++) { 414 io.map = i; 415 i82092aa_set_io_map(sock, &io); 416 } 417 for (i = 0; i < 5; i++) { 418 mem.map = i; 419 i82092aa_set_mem_map(sock, &mem); 420 } 421 422 leave("i82092aa_init"); 423 return 0; 424 } 425 426 static int i82092aa_get_status(struct pcmcia_socket *socket, u_int *value) 427 { 428 unsigned int sock = container_of(socket, struct socket_info, socket)->number; 429 unsigned int status; 430 431 enter("i82092aa_get_status"); 432 433 status = indirect_read(sock,I365_STATUS); /* Interface Status Register */ 434 *value = 0; 435 436 if ((status & I365_CS_DETECT) == I365_CS_DETECT) { 437 *value |= SS_DETECT; 438 } 439 440 /* IO cards have a different meaning of bits 0,1 */ 441 /* Also notice the inverse-logic on the bits */ 442 if (indirect_read(sock, I365_INTCTL) & I365_PC_IOCARD) { 443 /* IO card */ 444 if (!(status & I365_CS_STSCHG)) 445 *value |= SS_STSCHG; 446 } else { /* non I/O card */ 447 if (!(status & I365_CS_BVD1)) 448 *value |= SS_BATDEAD; 449 if (!(status & I365_CS_BVD2)) 450 *value |= SS_BATWARN; 451 452 } 453 454 if (status & I365_CS_WRPROT) 455 (*value) |= SS_WRPROT; /* card is write protected */ 456 457 if (status & I365_CS_READY) 458 (*value) |= SS_READY; /* card is not busy */ 459 460 if (status & I365_CS_POWERON) 461 (*value) |= SS_POWERON; /* power is applied to the card */ 462 463 464 leave("i82092aa_get_status"); 465 return 0; 466 } 467 468 469 static int i82092aa_set_socket(struct pcmcia_socket *socket, socket_state_t *state) 470 { 471 unsigned int sock = container_of(socket, struct socket_info, socket)->number; 472 unsigned char reg; 473 474 enter("i82092aa_set_socket"); 475 476 /* First, set the global controller options */ 477 478 set_bridge_state(sock); 479 480 /* Values for the IGENC register */ 481 482 reg = 0; 483 if (!(state->flags & SS_RESET)) /* The reset bit has "inverse" logic */ 484 reg = reg | I365_PC_RESET; 485 if (state->flags & SS_IOCARD) 486 reg = reg | I365_PC_IOCARD; 487 488 indirect_write(sock,I365_INTCTL,reg); /* IGENC, Interrupt and General Control Register */ 489 490 /* Power registers */ 491 492 reg = I365_PWR_NORESET; /* default: disable resetdrv on resume */ 493 494 if (state->flags & SS_PWR_AUTO) { 495 printk("Auto power\n"); 496 reg |= I365_PWR_AUTO; /* automatic power mngmnt */ 497 } 498 if (state->flags & SS_OUTPUT_ENA) { 499 printk("Power Enabled \n"); 500 reg |= I365_PWR_OUT; /* enable power */ 501 } 502 503 switch (state->Vcc) { 504 case 0: 505 break; 506 case 50: 507 printk("setting voltage to Vcc to 5V on socket %i\n",sock); 508 reg |= I365_VCC_5V; 509 break; 510 default: 511 printk("i82092aa: i82092aa_set_socket called with invalid VCC power value: %i ", state->Vcc); 512 leave("i82092aa_set_socket"); 513 return -EINVAL; 514 } 515 516 517 switch (state->Vpp) { 518 case 0: 519 printk("not setting Vpp on socket %i\n",sock); 520 break; 521 case 50: 522 printk("setting Vpp to 5.0 for socket %i\n",sock); 523 reg |= I365_VPP1_5V | I365_VPP2_5V; 524 break; 525 case 120: 526 printk("setting Vpp to 12.0\n"); 527 reg |= I365_VPP1_12V | I365_VPP2_12V; 528 break; 529 default: 530 printk("i82092aa: i82092aa_set_socket called with invalid VPP power value: %i ", state->Vcc); 531 leave("i82092aa_set_socket"); 532 return -EINVAL; 533 } 534 535 if (reg != indirect_read(sock,I365_POWER)) /* only write if changed */ 536 indirect_write(sock,I365_POWER,reg); 537 538 /* Enable specific interrupt events */ 539 540 reg = 0x00; 541 if (state->csc_mask & SS_DETECT) { 542 reg |= I365_CSC_DETECT; 543 } 544 if (state->flags & SS_IOCARD) { 545 if (state->csc_mask & SS_STSCHG) 546 reg |= I365_CSC_STSCHG; 547 } else { 548 if (state->csc_mask & SS_BATDEAD) 549 reg |= I365_CSC_BVD1; 550 if (state->csc_mask & SS_BATWARN) 551 reg |= I365_CSC_BVD2; 552 if (state->csc_mask & SS_READY) 553 reg |= I365_CSC_READY; 554 555 } 556 557 /* now write the value and clear the (probably bogus) pending stuff by doing a dummy read*/ 558 559 indirect_write(sock,I365_CSCINT,reg); 560 (void)indirect_read(sock,I365_CSC); 561 562 leave("i82092aa_set_socket"); 563 return 0; 564 } 565 566 static int i82092aa_set_io_map(struct pcmcia_socket *socket, struct pccard_io_map *io) 567 { 568 unsigned int sock = container_of(socket, struct socket_info, socket)->number; 569 unsigned char map, ioctl; 570 571 enter("i82092aa_set_io_map"); 572 573 map = io->map; 574 575 /* Check error conditions */ 576 if (map > 1) { 577 leave("i82092aa_set_io_map with invalid map"); 578 return -EINVAL; 579 } 580 if ((io->start > 0xffff) || (io->stop > 0xffff) || (io->stop < io->start)){ 581 leave("i82092aa_set_io_map with invalid io"); 582 return -EINVAL; 583 } 584 585 /* Turn off the window before changing anything */ 586 if (indirect_read(sock, I365_ADDRWIN) & I365_ENA_IO(map)) 587 indirect_resetbit(sock, I365_ADDRWIN, I365_ENA_IO(map)); 588 589 /* printk("set_io_map: Setting range to %x - %x \n",io->start,io->stop); */ 590 591 /* write the new values */ 592 indirect_write16(sock,I365_IO(map)+I365_W_START,io->start); 593 indirect_write16(sock,I365_IO(map)+I365_W_STOP,io->stop); 594 595 ioctl = indirect_read(sock,I365_IOCTL) & ~I365_IOCTL_MASK(map); 596 597 if (io->flags & (MAP_16BIT|MAP_AUTOSZ)) 598 ioctl |= I365_IOCTL_16BIT(map); 599 600 indirect_write(sock,I365_IOCTL,ioctl); 601 602 /* Turn the window back on if needed */ 603 if (io->flags & MAP_ACTIVE) 604 indirect_setbit(sock,I365_ADDRWIN,I365_ENA_IO(map)); 605 606 leave("i82092aa_set_io_map"); 607 return 0; 608 } 609 610 static int i82092aa_set_mem_map(struct pcmcia_socket *socket, struct pccard_mem_map *mem) 611 { 612 struct socket_info *sock_info = container_of(socket, struct socket_info, socket); 613 unsigned int sock = sock_info->number; 614 struct pci_bus_region region; 615 unsigned short base, i; 616 unsigned char map; 617 618 enter("i82092aa_set_mem_map"); 619 620 pcibios_resource_to_bus(sock_info->dev, ®ion, mem->res); 621 622 map = mem->map; 623 if (map > 4) { 624 leave("i82092aa_set_mem_map: invalid map"); 625 return -EINVAL; 626 } 627 628 629 if ( (mem->card_start > 0x3ffffff) || (region.start > region.end) || 630 (mem->speed > 1000) ) { 631 leave("i82092aa_set_mem_map: invalid address / speed"); 632 printk("invalid mem map for socket %i: %llx to %llx with a " 633 "start of %x\n", 634 sock, 635 (unsigned long long)region.start, 636 (unsigned long long)region.end, 637 mem->card_start); 638 return -EINVAL; 639 } 640 641 /* Turn off the window before changing anything */ 642 if (indirect_read(sock, I365_ADDRWIN) & I365_ENA_MEM(map)) 643 indirect_resetbit(sock, I365_ADDRWIN, I365_ENA_MEM(map)); 644 645 646 /* printk("set_mem_map: Setting map %i range to %x - %x on socket %i, speed is %i, active = %i \n",map, region.start,region.end,sock,mem->speed,mem->flags & MAP_ACTIVE); */ 647 648 /* write the start address */ 649 base = I365_MEM(map); 650 i = (region.start >> 12) & 0x0fff; 651 if (mem->flags & MAP_16BIT) 652 i |= I365_MEM_16BIT; 653 if (mem->flags & MAP_0WS) 654 i |= I365_MEM_0WS; 655 indirect_write16(sock,base+I365_W_START,i); 656 657 /* write the stop address */ 658 659 i= (region.end >> 12) & 0x0fff; 660 switch (to_cycles(mem->speed)) { 661 case 0: 662 break; 663 case 1: 664 i |= I365_MEM_WS0; 665 break; 666 case 2: 667 i |= I365_MEM_WS1; 668 break; 669 default: 670 i |= I365_MEM_WS1 | I365_MEM_WS0; 671 break; 672 } 673 674 indirect_write16(sock,base+I365_W_STOP,i); 675 676 /* card start */ 677 678 i = ((mem->card_start - region.start) >> 12) & 0x3fff; 679 if (mem->flags & MAP_WRPROT) 680 i |= I365_MEM_WRPROT; 681 if (mem->flags & MAP_ATTRIB) { 682 /* printk("requesting attribute memory for socket %i\n",sock);*/ 683 i |= I365_MEM_REG; 684 } else { 685 /* printk("requesting normal memory for socket %i\n",sock);*/ 686 } 687 indirect_write16(sock,base+I365_W_OFF,i); 688 689 /* Enable the window if necessary */ 690 if (mem->flags & MAP_ACTIVE) 691 indirect_setbit(sock, I365_ADDRWIN, I365_ENA_MEM(map)); 692 693 leave("i82092aa_set_mem_map"); 694 return 0; 695 } 696 697 static int i82092aa_module_init(void) 698 { 699 return pci_register_driver(&i82092aa_pci_driver); 700 } 701 702 static void i82092aa_module_exit(void) 703 { 704 enter("i82092aa_module_exit"); 705 pci_unregister_driver(&i82092aa_pci_driver); 706 if (sockets[0].io_base>0) 707 release_region(sockets[0].io_base, 2); 708 leave("i82092aa_module_exit"); 709 } 710 711 module_init(i82092aa_module_init); 712 module_exit(i82092aa_module_exit); 713 714